CN109411537A - 复合接触蚀刻停止层 - Google Patents

复合接触蚀刻停止层 Download PDF

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CN109411537A
CN109411537A CN201810929762.8A CN201810929762A CN109411537A CN 109411537 A CN109411537 A CN 109411537A CN 201810929762 A CN201810929762 A CN 201810929762A CN 109411537 A CN109411537 A CN 109411537A
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sacrifice
etching stopping
stopping layer
gate structure
grid
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CN109411537B (zh
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黄海苟
丹尼尔·杰格
吴旭昇
高金晟
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GlobalFoundries US Inc
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Abstract

本发明涉及复合接触蚀刻停止层，其中，一复合蚀刻停止层包括形成于一牺牲栅极结构上方的一氧化物层以及形成于该氧化物层上方的一氮化物层。该氧化物层仅设于该牺牲栅极结构的较低部分的上方，而该氮化物层包封该氧化物层，并直接设于该牺牲栅极结构的一顶表面的上方。例如，于该复合蚀刻停止层的上方形成一层间介电质的期间，氮化物层对氧化的敏感性，通过于该牺牲栅极层的上部消除该氧化物层而降低。

Description

复合接触蚀刻停止层
技术领域
本申请通常涉及半导体装置，更具体而言，涉及例如场效应晶体管的晶体管及其制造方法。
背景技术
半导体装置，例如场效应晶体管(FET)的制造通常涉及层的沉积、图案化以及蚀刻的多个步骤，以在一基板上定义各种结构。例如，使用间隔件以及帽层(cap layer)的集成方案可以用于最小化诸如一栅极以及一接触件之类的导电结构之间的泄露，从而生产更高质量的装置。
发明内容
根据本申请的各种实施例，制造半导体装置的方法包括形成一牺牲栅极结构于一半导体基板的上方。该牺牲栅极结构包括一牺牲栅极以及形成于该牺牲栅极上方的一牺牲栅极间隙。该方法还包括形成一侧壁间隔层于该牺牲栅极结构的侧壁的上方，以及形成一第一蚀刻停止层于横向邻接该牺牲栅极的该侧壁间隔层的上方。一第二蚀刻停止层形成于该第一蚀刻停止层的上方以及直接形成于该牺牲栅极帽(cap)的上方。
根据另一种方法，多个牺牲栅极结构形成于一半导体基板的上方。一侧壁间隔层形成于该牺牲栅极结构的侧壁的上方，以及一第一蚀刻停止层形成于该侧壁间隔层的上方以及该牺牲栅极帽的一顶表面的上方。一硬掩膜而后形成于该第一蚀刻停止层的上方，以及该硬掩膜而后被蚀刻以暴露该牺牲栅极帽的该顶表面上方的该第一蚀刻停止层以及凹陷相邻的牺牲栅极结构之间的该硬掩膜。
从该牺牲栅极帽的该顶表面的上方以及从横向邻接该牺牲栅极帽的该侧壁间隔层的表面上方移除该第一蚀刻停止层的暴露部分。然后，从该相邻的牺牲栅极结构之间移除该硬掩膜的剩余部分，以及一第二蚀刻停止层形成于该第一蚀刻停止层的上方以及直接位于该牺牲栅极帽的上方。
附图说明
应与所附的图示进行结合，以最好的理解本申请的具体实施例的详细描述，其中，类似的结构使用类似的参考数字予以表示，其中：
图1是一比较结构的一透射电子显微镜(TEM)显微图，示出了在使用一介电材料填充相邻的牺牲栅极结构之间的间隙之前，设置于该牺牲栅极结构上方的包括氧化物子层以及氮化物子层的一复合接触蚀刻停止层；
图2是图1的该比较结构的一透射电子显微镜(TEM)显微图，示出了在沉积于该相邻的牺牲栅极结构之间的该间隙中的该介电材料的一氧化退火之后的该氮化物子层的击穿；
图3为图2的该比较结构的一透射电子显微镜(TEM)显微图，示出了包括蚀刻该氧化物子层以及随后曝光该牺牲栅极的上部的相邻牺牲栅极结构之间的该介电材料的一凹陷蚀刻；
图4为根据各种实施例所示的一装置架构的一横截面图，示出了沉积一氧化物层于一牺牲栅极结构的上方；
图5为图4在相邻牺牲栅极结构之间以及该氧化物层上方的一硬掩膜的沉积和凹陷蚀刻之后的装置架构的一横截面图；
图6示出了从该牺牲栅极结构的上部移除该暴露的氧化物层；
图7描述了图6在移除该硬掩膜的剩余部分之后的结构；
图8显示了沉积一氮化物层于该氧化物层的剩余部分的上方以及该牺牲栅极结构的上部的上方；以及
图9为一透射电子显微镜(TEM)显微图，示出了包括保持该牺牲栅极结构的上部的上方的氧化物层和氮化物层的相邻牺牲栅极结构之间的层间介电质的一凹陷蚀刻。
主要组件符号说明：
100 半导体基板或基板
120 半导体鳍片或鳍片
210 源/漏结
300 牺牲栅极结构或栅极结构
310 牺牲栅极
320 牺牲栅极帽
410 侧壁间隔件
440 层间介电质或沉积层
460 硬掩膜
610 氧化物层
710 氮化物层
800 间隙
T 顶部区域。
具体实施方式
现将针对本申请的主题的各种实施例进行更详细的描述，其中的一些实施例将在附图中示出。相同参考数字将在整个图示中用于引用相同或相似的部分。
在各种实施例中所揭示的一种制造半导体装置的方法，例如具有一改进的接触蚀刻停止层的一鳍式场效应晶体管(FinFET)。所揭示的方法可以与一后栅极(gate last)，或替换金属栅极(replacement metal gate；RMG)工艺一起实施。制造替换金属栅极(RMG)晶体管的一典型工艺流程包括形成一临时或牺牲栅极，形成附加的晶体管结构，以及然后移除该牺牲栅极，在沉积不同材料层(例如，栅极介电质以及栅极导电材料)的位置留下一沟槽以形成功能栅极。这种方法将栅极形成延迟到工艺之后，否则可能会损坏栅极材料，例如暴露于升高的温度和/或离子植入。如本文所使用的，一“功能栅极”指的是用于控制使用一电场或在某些情况使用一磁场的一半导体装置的输出电流(即，载流子通过沟道的流动)的一结构，并包括一栅极介电质以及栅极导体。
根据各种实施例，该方法涉及形成一复合接触蚀刻停止层(composite contactetch stop layer；CESL)于一牺牲栅极结构(即，牺牲栅极以及牺牲栅极帽)的上方以及源/漏结的上方。该复合接触蚀刻停止层适于在一个或多个蚀刻步骤期间保护各种装置特征，包括一氧化物层以及一覆盖氮化物层两者。特别的，该CESL适于在一接触蚀刻工艺期间，将蚀刻限制到特定区域(例如，相邻栅极结构之间)。该CESL应具有良好的耐化学腐蚀性，其后续用于蚀刻将形成一接触件的区域。
在各种实施例中，形成该复合接触蚀刻停止层(CESL)，使得从该牺牲栅极结构的上部上方省略该氧化物层，而该氮化物层形成于该牺牲栅极结构的上部上方以及直接形成在该牺牲栅极帽的上方。申请人发现，此一复合接触蚀刻停止层，其中该底层氧化物层在该牺牲栅极结构的上部区域中被中断，相较于一连续氧化物/氮化物复合蚀刻停止层，可表现出改进的机械完整性，并在后续工艺期间，阻止所不希望的该牺牲栅极的侵蚀。
参考图1，一透射电子显微镜(transmission electron microscope；TEM)显微图显示了包括设置于一半导体基板100的上方的多个牺牲栅极结构300的一比较装置架构。半导体基板100可为一块状基板或一复合基板，例如一绝缘体上半导体(semiconductor-on-insulator；SOI)基板。例如，半导体基板100可以包括一半导体材料，例如硅(Si)或一含硅材料。含硅材料包括但不限于单晶硅、多晶硅、单晶硅锗(SiGe)、多晶硅锗、掺杂碳的硅(Si:C)、非晶硅、及其组合以及上述材料的复合层。半导体基板100不限于含硅材料，然而，由于基板100可以包括其他半导体材料，包括Ge以及化合物半导体，例如GaAs、InAs和其他类似半导体。半导体基板100的部分可以是非晶的、多晶的、或单晶的。
在各种实施例中，该装置可以包括一鳍式场效应晶体管(FinFET)。在此实施例中，一个或多个半导体鳍片120可以通过图案化以及蚀刻以SOI基板的该半导体层或一块体半导体基板的一顶部而形成。该蚀刻工艺通常包括一各向异性(anisotropic)蚀刻。在某些实施例中，可以使用一干蚀刻工艺，例如，反应离子蚀刻(reactive ion etching；RIE)。在其他实施例中，可以使用一湿化学蚀刻剂。在其他实施例中，可以使用干蚀刻和湿蚀刻的一组合。
举例而言，鳍片120可以使用一侧壁影像转移(sidewall image transfer；SIT)工艺而形成，其包括形成一间隔件材料于一芯轴的侧壁表面上。该间隔件包括与该芯轴具有一不同蚀刻选择性的一材料，使得在间隔件形成之后，通过移除以移除该芯轴。各间隔件而后在定义该鳍片的一后续蚀刻工艺期间被用作一硬掩膜。
半导体鳍片120通常为平行设置，并通过一浅沟槽隔离层(未示出)彼此横向隔离。上升源/漏结210设置在靠近其顶表面的鳍片120(即，源极区域和漏极区域)的部分上方。如本领域技术人员所知，源/漏结210可通过离子植入或选择性外延而形成，可选的，使用牺牲栅极结构300作为一对准掩膜。例如，根据各种实施例，源/漏结210可通过选择性外延至定义在该牺牲栅极结构之间的该鳍片上方的自对准空腔中而形成。也就是说，源/漏结210在一沟道区域的任一侧上形成于鳍片120的源极区域以及漏极区域上方，该沟道区域位于该牺牲栅极结构300的下方。
源/漏结210可包括硅(例如Si)或一含硅材料，例如硅锗(SiGe)。例如，可以将SiGe源/漏结结合到一p-MOS装置中，以向该沟槽提供压缩应力，其可提高载流子迁移率。
多个牺牲栅极结构300跨越该鳍片，即源/漏结210之间的该鳍片的沟槽区域上方。各牺牲栅极结构300包括一牺牲栅极310以及形成于牺牲栅极310上方的一牺牲栅极帽320。牺牲栅极310可以包括非晶或多晶硅，且牺牲栅极帽320可以包括一氮化物层，例如氮化硅。
在图1所述的结构中，侧壁间隔件410设于牺牲栅极结构300的侧壁(垂直表面)上方。侧壁间隔件410可以通过一间隔件材料的覆盖沉积(例如使用原子层沉积)，随后执行一定向蚀刻，例如反应离子蚀刻(RIE)以从水平表面移除该间隔件材料而形成。合适的侧壁材料包括氧化物、氮化物以及氮氧化物，例如二氧化硅、氮化硅、氮氧化硅、以及低介电常数(低k)材料，例如非晶碳、SiOC、SiOCN和SiBCN，以及一低k介电材料。如本文所使用，一低k材料具有小于二氧化硅的介电常数的一介电常数。在某些实施例中，侧壁间隔件410的厚度为4至20纳米，例如，4,10,15或20纳米，包括上述任何值之间的范围。
一共形复合衬垫610,710设置于侧壁间隔件410的上方以及源/漏结210的一顶表面的上方。复合衬垫610,710适合作为一接触蚀刻停止层(CESL)。该复合衬垫包括一氧化物层610以及覆盖氧化物层610的一氮化物层710。
如本文所述，一层或结构的形成或沉积可以涉及一个或多个适于沉积材料或层或形成结构的技术。这些技术包括，但不限于，化学气相沉积(CVD)、低压化学气相沉积(LPCVD)、等离子体增强化学气相沉积(PECVD)、金属有机CVD(MOCVD)、原子层沉积(ALD)、分子束外延(MBE)、电镀、无电镀、离子束沉积、以及物理气相沉积(PVD)技术，例如溅射或蒸发。
在氮化物层710的下方掺入一氧化物层610可以简化后续氮化物层710的移除，从而有利于增加相邻栅极之间的接触开口间隔的尺寸。具体而言，可以相对于氧化物材料选择性地蚀刻氮化物材料。因此，在移除氮化物层710期间，氧化物层610本身可以作为一蚀刻停止层。同时有效的保护注入外延源/漏结210和/或牺牲栅极310的底层结构，这些结构可以用化学剂予以蚀刻以移除氮化物层710。
共形衬垫的各对应的子层610,710可以通过使用原子层沉积的二氧化硅以及氮化硅的覆盖沉积而形成。如图1所示，在源/漏接触件的位置内，共形衬垫形成于侧壁间隔件410的上方以及源/漏结210的上方。在某些实施例中，氧化物层以及氮化物层的厚度可各自在2至6纳米之间，例如，2,4，或6纳米，包括上述任何值之间的范围。共形衬垫的整体厚度可以为4至12纳米，例如，4,6,8,10，或12纳米，包括上述任何值之间的范围，虽然较小以及较大的厚度是预期的。
在各种实施例中，侧壁间隔件410以及复合共形衬垫610,710由可选择性的彼此蚀刻的材料而形成。在特定的实施例中，侧壁间隔件410包括SiOCN，且共形衬垫(即，接触蚀刻停止层)包括二氧化硅的一第一蚀刻停止层610以及氮化硅的一第二蚀刻停止层710。
应了解的是，化合物二氧化硅和氮化硅具有名义上分别表示为SiO2,以及Si3N4的成份。属于二氧化硅以及氮化硅，不仅指这些化学计量组成，而且还涉及不同于该化学计量组成的氧化物以及氮化物组合。
参考图2，一层间介电质440的一层或多层设置于鳍片上方，即相邻牺牲栅极结构300之间以及源/漏结210上方的间隙800内。层间介电质440直接形成在复合衬垫610,710的上方，并可例如包括一可流动的二氧化硅。使用一高密度等离子体(high density plasma；HDP)或一可流动的二氧化硅所沉积的二氧化硅可用于填充(例如完全填充)高纵横比的间隙800。
HDP氧化物通常通过高密度等离子体化学气相沉积(high density plasmachemical vapor deposition；HDP-CVD)在一合适的含硅前体(silicon-containingprecursor)的氧化条件下予以沉积。在各种实施例中，一可流动二氧化硅可使用一个或多个含硅前体以及一氧化气体予以沉积。示例性的硅前体材料包括，但不限于，烷氧基硅烷(alkoxysilanes),例如,四氧甲基环四硅氧烷(tetraoxymethylcyclotetrasiloxane；TOMCTS),八甲基环四硅氧烷(octamethylcyclotetrasiloxane；OMCTS),四乙氧基硅烷(tetraethoxysilane；TEOS),三乙氧基硅烷(triethoxysilane；TES),三甲氧基硅烷(trimethoxysilane；TriMOS),甲基三乙氧基正硅酸盐(methyltriethoxyorthosilicate；MTEOS),四甲基正硅酸盐(tetramethylorthosilicate；TMOS),甲基三甲氧基硅烷(methyltrimethoxysilane；MTMOS),甲基二甲氧基硅烷(dimethyldimethoxysilane；DMDMOS),二乙氧基硅烷(diethoxysilane；DES),二甲氧基硅烷(dimethoxysilane；DMOS),三苯基乙氧基硅烷(triphenylethoxysilane),1-(三乙氧基硅烷基)-2-(二乙氧基甲基硅烷基)乙烷(1-(triethoxysilyl)-2-(diethoxymethylsilyl)ethane),三第三丁氧基硅醇(tri-t-butoxylsilanol)。示例性的氧化气体包括，但不限于，示例性氧化气体包括但不限于臭氧、过氧化氢、氧气、水(蒸汽)和醇，例如甲醇、乙醇和异丙醇。
在可流动材料的沉积期间和/或沉积之后，沉积层440的一部分或全部可以使用例如，一固化/退火工艺予以致密化。根据各种实施例，一固化/退火工艺涉及暴露在一氧化或惰性环境中的一蒸汽、热、紫外线(UV)、电子束(e束)、微波、激光或等离子体源。
已观察到与层间介电质440的沉积和/或致密化相关的氧化条件可能对氮化物层710有不利的影响，从而导致CESL层的蚀刻电阻中的一击穿。仍参考图2，在沉积ILD 400以及一基于蒸汽的致密化步骤之后，氮化物层710已经被氧化并屈曲于该结构的一顶部区域(T)内，即，靠近该结构的一顶表面。不受理论的束缚，覆盖层间介电质440以及底层氧化物层610提供了用于氧化物种(例如分子氧或原子氧)的互补扩散路径，以与介入氮化物层(intervening nitride layer)710反应，并氧化介入氮化物层710。图2中氮化物层710与相邻氧化物层400,610之间的对比度降低表明了氮化物层710被部分或完全氧化，例如，以形成氮氧化硅层或二氧化硅层。
参考图3，图2的比较结构的透射电子显微镜(TEM)显微图示出了相邻牺牲栅极结构300之间的层间介电质440的一后续凹陷蚀刻的影响。值得注意的是，氮化物层710的击穿(breakdown)可能导致氧化物层610的蚀刻及随后的牺牲栅极310的上部的曝光。由于CESL610,710的故障导致牺牲栅极310的损坏可能导致例如间隙800中一后形成源/漏接触件以及栅极接触件之间的相邻接触件之间的一电短路。
形成一改进的CESL架构的方法如图4至图8所描绘。根据各种实施例，在形成氮化物层710之前从该牺牲栅极结构的上部区域移除氧化物层610的位置提供了一复合CESL层。这种改进的架构消除了氧化物种的侵入路径，其有效地破坏了氮化物层710的氧化的机制。
参考图4，其为显示沉积一共形氧化物层610于一牺牲栅极结构300的上方的一横截面图。如图所示，氧化物层610直接形成在相邻牺牲栅极结构300之间的源/漏结210的上方、直接形成在侧壁间隔件410的上方，以及在牺牲栅极帽320的上方延伸。
图5显示可在相邻牺牲栅极结构300之间的一硬掩膜460的沉积以及凹陷蚀刻之后的一对应横截面图。在某些实施例中，凹陷硬掩膜460以暴露横向邻接牺牲栅极帽320的氧化物层610，即，横向邻接牺牲栅极帽320的整体氧化物层610被暴露，使得凹陷的硬掩膜460的高度位于或低于牺牲栅极310的高度。
在各种实施例中，硬掩膜460是一旋涂硬掩膜，并且可以包括例如，非晶碳、SiC、或SiCN。在凹陷蚀刻之前，该硬掩膜可以被平坦化。“平坦化”是一种材料移除工艺，其至少使用机械力(例如摩擦介质)来产生一基本二维表面。一平坦化工艺可以包括化学机械抛光(CMP)或研磨。化学机械抛光(CMP)是一种利用化学反应以及机械力两者的一材料移除工艺，以移除材料并平坦化一表面。
在凹陷蚀刻硬掩膜460之后，暴露氧化物层610的部分。在各种实施例中，硬掩膜460的凹陷蚀刻在牺牲栅极结构300的顶部暴露该氧化物层，包括直接位于牺牲栅极帽320上方的氧化物层610。
参考图6，其示出了从牺牲栅极结构300的顶部上方的暴露的氧化物层610的选择性地移除。在所示的实施例中，氧化物层610的一顶表面与牺牲栅极310的一顶表面共面。
图7描绘了图6在移除硬掩膜的剩余部分之后的结构。参考图8，其示出了沉积一氮化物层710于氧化物层610的剩余部分上方以及牺牲栅极结构300的顶部上方。在所示的实施例中，氮化物层710直接形成在横向邻接牺牲栅极帽320的侧壁间隔层410的上方。值得注意的是，氮化物层710直接形成在横向邻接牺牲栅极310的氧化物层610的上方以及横向邻接牺牲栅极帽320的侧壁间隔层410的上方。
参考图9，一透射电子显微镜(TEM)显微图示出了在包括保留牺牲栅极310的上部上方的氧化物层以及氮化物层610,710的相邻栅极结构300之间的层间介电质440的一凹陷蚀刻之后的一结构。通过保留氮化物层710的蚀刻停止特性，复合CESL 610,710可以保护多晶硅栅极在下游工艺期间免受不必要的蚀刻或侵蚀。
所揭示的方法提供了一复合接触蚀刻停止层(CESL)架构。使用接触蚀刻停止层架构制造的装置具有一降低的牺牲栅极侵蚀倾向和较少的接触间电短路的发生率。使用即时方法制造的集成电路具有改进的可靠性和性能，栅极以及源/漏接触件之间的泄露最小化，并减少了电路故障的情况。
在本文使用的单数形式的“一”、“一个”和“该”包括复数指称，除非上下文有清楚的规定。因此，例如，一“牺牲栅极结构”的指称包括具有两个或多个这样的“牺牲栅极结构”的示例，除非上下文有清楚的指示。
除非另有明文规定，否则不应将本文阐述的任何方法解释为要求其步骤按照特定的顺序执行。因此，如果一个方法权利要求没有实际上引用一个遵循其步骤的命令，或者在权利要求书或说明书中没有特别说明这些步骤被限制在一特定的顺序上，那么就不可能推断出任何特定的顺序。在任何一权利要求中引用的单个或多个特征或方面可以与任何其他权利要求中的任何引用的特征或方面相结合或置换。
应理解的是，当诸如一层、区域、或基板之类的一元件被称为形成、沉积或设置在另一元件“上”或“上方”时，其可直接在另一个元件上，也可以存在中间元件。相反，当一个元件被称为直接位于另一元件上或上方，则不存在中间元件。
虽然可以使用“包含”的过渡短语来揭示特定实施例的各种特征，元件或步骤，当应理解的是，替代实施例隐含包括使用“组成”或“基本上由”的过渡短语来描述的替代性实施例。因此，例如，包括二氧化硅以及氮化硅的一接触蚀刻停止层的隐含替代实施例包括一接触蚀刻停止层基本上由二氧化硅以及氮化硅组成的实施例，以及一接触蚀刻停止层由二氧化硅以及氮化硅组成的实施例。
对于本领域的技术人员来说，在不背离本发明的精神和范围的前提下，可以对本发明进行各种修改和变化，因此，本领域技术人员可以对所揭示的实施例进行修改、组合、自组合以及各种变化，本发明应被解释为包括在所附权利要求及其等价范围内。

Claims (19)

1.一种制造装置的方法，其特征在于，包括：
形成一牺牲栅极结构于一半导体基板的上方，其中，该牺牲栅极结构包括一牺牲栅极以及形成于该牺牲栅极的一顶表面的上方的一牺牲栅极间隙；
形成一侧壁间隔层于该牺牲栅极结构的侧壁上方；
形成一第一蚀刻停止层于横向邻接该牺牲栅极的该侧壁间隔层的上方；以及
形成一第二蚀刻停止层于该第一蚀刻停止层的上方以及直接位于该牺牲栅极帽的上方。
2.根据权利要求1所述的方法，其特征在于，该第一蚀刻停止层以及第二蚀刻停止层通过原子层沉积而形成。
3.根据权利要求1所述的方法，其特征在于，该第一蚀刻停止层包括二氧化硅，且该第二蚀刻停止层包括氮化硅。
4.根据权利要求1所述的方法，其特征在于，该第一蚀刻停止层的一顶表面与该牺牲栅极的该顶表面共面。
5.根据权利要求1所述的方法，其特征在于，该第二蚀刻停止层直接形成在横向邻接该牺牲栅极帽的该侧壁间隔层的上方。
6.根据权利要求1所述的方法，其特征在于，该第二蚀刻停止层直接形成在横向邻接该牺牲栅极的该第一蚀刻停止层的上方，以及直接形成在横向邻接该牺牲栅极帽的该侧壁间隔层的上方。
7.根据权利要求1所述的方法，其特征在于，形成该牺牲栅极结构包括形成多个牺牲栅极结构在该半导体基板的上方。
8.根据权利要求7所述的方法，其特征在于，该方法还包括形成一源/漏结于相邻的牺牲栅极结构之间的该半导体基板的上方。
9.根据权利要求8所述的方法，其特征在于，该第一蚀刻停止层直接形成于该源/漏结的上方。
10.一种制造装置的方法，其特征在于，包括：
形成多个牺牲栅极结构于一半导体基板的上方，其中，各该牺牲栅极结构包括一牺牲栅极以及形成于该牺牲栅极的一顶表面上方的一牺牲栅极间隙；
形成一侧壁间隔层于该牺牲栅极结构的侧壁上方；
形成一第一蚀刻停止层于该侧壁间隔层的上方以及该牺牲栅极帽的一顶表面的上方；
形成一硬掩膜于该第一蚀刻停止层的上方；
蚀刻该硬掩膜以暴露该牺牲栅极帽的该顶表面上方的该第一蚀刻停止层，以及凹陷相邻的牺牲栅极结构之间的该硬掩膜；
从该牺牲栅极帽的该顶表面的上方以及横向邻接该牺牲栅极帽的该侧壁间隔层的表面上方移除该第一蚀刻停止层的暴露部分；
从该相邻的牺牲栅极结构之间移除该硬掩膜的剩余部分；以及
形成一第二蚀刻停止层于该第一蚀刻停止层的上方以及直接位于该牺牲栅极帽的上方。
11.根据权利要求10所述的方法，其特征在于，该第一蚀刻停止层包括二氧化硅，且该第二蚀刻停止层包括氮化硅。
12.根据权利要求10所述的方法，其特征在于，该硬掩膜包括一旋涂硬掩膜。
13.根据权利要求10所述的方法，其特征在于，该方法还包括在凹陷该相邻的牺牲栅极结构之间的该硬掩膜之前平坦化该硬掩膜。
14.根据权利要求10所述的方法，其特征在于，该第一蚀刻停止层的一顶表面与该牺牲栅极的该顶表面共面。
15.根据权利要求10所述的方法，其特征在于，该第二蚀刻停止层直接形成于横向邻接该牺牲栅极帽的该侧壁间隔层的上方。
16.根据权利要求10所述的方法，其特征在于，该第二蚀刻停止层直接形成于横向邻接该牺牲栅极的该第一蚀刻停止层的上方，以及直接形成于横向邻接该牺牲栅极帽的该侧壁间隔层的上方。
17.根据权利要求10所述的方法，其特征在于，该方法还包括形成一源/漏结于该相邻的栅极结构之间的该半导体基板的上方。
18.根据权利要求17所述的方法，其特征在于，该第一蚀刻停止层直接形成于该源/漏结的上方。
19.根据权利要求10所述的方法，其特征在于，该方法还包括从该半导体基板形成多个鳍片以及形成多个牺牲栅极结构于该多个鳍片的上方。
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