CN109378704B

CN109378704B - Circuit and method for driving laser diode

Info

Publication number: CN109378704B
Application number: CN201810245696.2A
Authority: CN
Inventors: 弗兰科·米尼奥利; 毛里齐奥·加尔瓦诺; 安德烈娅·洛朱代斯
Original assignee: Infineon Technologies AG
Current assignee: Infineon Technologies AG
Priority date: 2017-03-23
Filing date: 2018-03-23
Publication date: 2020-11-03
Anticipated expiration: 2038-03-23
Also published as: DE102018106861B4; US20180278017A1; US10574026B2; CN109378704A; DE102018106861A1

Abstract

Driver circuits and methods for driving laser diodes are described herein. According to a first exemplary embodiment, a driver circuit includes: a first electronic switch connected to an output node, the output node configured to be operably connected to a laser diode. The electrical connection between the first electronic switch and the output node has a first inductance. The driver circuit also includes a bypass circuit coupled to the output node and configured to receive a current provided to the output node via the first electronic switch when activated, thereby magnetizing the first inductor.

Description

Circuit and method for driving laser diode

Technical Field

The present disclosure relates generally to the field of driver circuits for laser diodes, and in particular to driver circuits that allow generation of short laser pulses for laser radar (LIDAR) systems.

Background

Light detection and light ranging (LIDAR) relates to a measurement method for measuring the distance to an object, called target, by illuminating the target with a pulsed laser light, wherein the distance information can be obtained from the time of flight (TOF) of a light pulse travelling from a light source to the target and back to a detector. This time of flight is sometimes also referred to as Round Trip Delay Time (RTDT); the measured distance is essentially the product between the RTDT and the speed of light. For example, LIDAR is used in so-called time-of-flight cameras (TOF cameras), which allow mapping depth information to a single pixel and simultaneously capturing the entire scene within the field of view of the TOF camera. In contrast, scanning LIDAR scans a scene point-by-point by deflecting the laser light with, for example, a mirror such as a micro-scanner (also referred to as a micro-scanning mirror).

The irradiance (power per unit area) of the reflected light pulses reaching the detector decreases with increasing target distance. In order to reach a measuring range of up to tens or hundreds of meters, the radiation power of the emitted laser light (and thus the electrical power of the laser diode) is rather high. However, to ensure that the laser pulse is not harmful to the eye of a person standing nearby, the laser pulse must be relatively short to limit the radiant energy of the laser pulse. For a rectangular pulse (power over time), the pulse energy will be proportional to the product of the pulse width and the power. In a practical example, the peak power of the laser pulse may be as high as 80W or higher with a pulse width in the range of 1ns to 100 ns. To generate such short pulses, the driver electronics for driving the laser diode should be able to switch the load current of the laser diode with very short rise and fall times.

Disclosure of Invention

Driver circuits for driving laser diodes are described herein. According to a first exemplary embodiment, a driver circuit includes: a first electronic switch connected to an output node, the output node configured to be operably connected to a laser diode. The electrical connection between the first electronic switch and the output node has a first inductance. The driver circuit also includes a bypass circuit coupled to the output node and configured to receive a current provided to the output node via the first electronic switch when activated, thereby magnetizing the first inductor.

According to a second exemplary embodiment, the driver circuit includes first and second transistor half bridges forming an H-bridge having first and second output nodes configured to operatively couple a laser diode therebetween. Each transistor half-bridge consists of a high-side transistor and a low-side transistor. The control circuit is configured to turn on the high-side and low-side transistors of the first and second transistor half-bridges in a pre-charge phase to magnetize any inductance coupled in series with the high-side and low-side transistors. The control circuit is configured to turn off the low-side transistor of the first transistor half-bridge and the high-side transistor of the second transistor half-bridge during the ramp-up phase, thereby directing current through the high-side transistor of the first transistor half-bridge and the low-side transistor of the second transistor half-bridge and through an inductor coupled in series with the high-side transistor of the first transistor half-bridge and the low-side transistor of the second transistor half-bridge through the laser diode via the first output node and the second output node.

Further, methods for driving laser diodes are described herein. According to one exemplary embodiment, the method includes directing a first current via a first electronic switch to an output node operatively coupled to a laser diode. Thereby, the effective first inductance between the first electronic switch and the output node is magnetized. The method also includes drawing a first current from the output node by activating the bypass circuit. Thereby, the laser diode is bypassed. Further, the method includes directing the first current to the laser diode via the output node by deactivating the bypass circuit.

Drawings

The invention may be better understood with reference to the following description and accompanying drawings. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views. In the drawings:

fig. 1 shows (fig. 1 (a)) a circuit diagram of a laser diode and an electronic switch for switching the laser diode, and (fig. 1 (b)) a schematic diagram of a corresponding chip package.

Fig. 2 shows an electrical equivalent circuit of a laser diode package including a parasitic inductance.

Fig. 3 is a circuit diagram showing a first example of a driver circuit for driving a laser diode.

Fig. 4 includes a timing diagram illustrating the functionality of the circuit of fig. 3.

Fig. 5 is a circuit diagram showing a second example of a driver circuit for driving a laser diode.

Fig. 6 includes a timing diagram illustrating the functionality of the circuit of fig. 5.

Fig. 7 is a circuit diagram showing a third example of a driver circuit for driving a laser diode.

Fig. 8 includes a timing diagram illustrating the function of the circuit of fig. 7.

Fig. 9 is a circuit diagram showing a fourth example of a driver circuit for driving a laser diode.

Fig. 10 is a flow chart illustrating one exemplary method for driving a laser diode.

Detailed Description

Fig. 1 shows a laser diode and a part of a driving circuit for driving the laser diode. FIG. 1 (a) shows a laser diode D_LAnd for switching on and off the laser diode D_LElectronic switch T_HSA circuit diagram of (a). Thus, the laser diode D_LAnd an electronic switch T_HSIs coupled between a ground terminal GND and a supply terminal at which a supply voltage V is applied_S. At least one capacitor (in this example capacitor C)₁And C₂Parallel circuit of) parallel connection to the laser diode D_LAnd an electronic switch T_HSSo as to buffer the supply voltage V_SAnd supplies a load current to the laser diode D_L. Electronic switch T_HSWhich may be a MOSFET or any other suitable transistor type (e.g., BJT). In the present example, an electronic switch T_HSIs marked ON. Usually need to be composed of a capacitor C₁And C₂A buffer capacitor is provided to enable fast transients in the load current.

Fig. 1 (b) is a schematic diagram of a laser diode module 1, the laser diode module 1 having a chip package 10 including the circuit of fig. 1 (a). Thus, the chip package comprises: comprising an electronic switch T_HSA first semiconductor die comprising a laser diode D_LAnd at least a third semiconductor die providing a buffer capacitance. Corresponding to (a) in fig. 1, a separate capacitor is used in this example. The lead frame 11 is provided with power supply terminals (electricity)Pressure V_S) A ground terminal GND and a control terminal ON, wherein the middle terminal is a power supply terminal. Comprising a buffer capacitor C₁And C₂Is bonded (e.g., soldered) directly (i.e., without the use of bond wires) to the lead frame 11 and provides a buffer capacitance between the pins representing the ground and power terminals. Comprising a MOSFET T_HSRepresents the drain electrode of the MOSFET and is directly bonded to a pin representing the power supply terminal. MOSFET T_HSIs connected to a pin representing the control terminal ON via a bonding wire. Similarly, MOSFET T_HSIs connected to the laser diode D via a bonding wire 12_LThe anode electrode on the top surface of the substrate. Laser diode D_LIs directly bonded to the lead frame 11.

Fig. 2 shows a simplified electrical equivalent circuit of the laser diode module 1 of fig. 1. In addition, the circuit of fig. 2 includes a gate driver circuit 41 coupled to the MOSFET T_HSAnd is configured to be dependent on the logic signal S_ONGenerating MOSFETs T adapted to be switched on and off_HSThe drive signal of (1). Removing gate driver 41 except for inductor L₁、L_CAnd L_GExcept that the circuit of FIG. 2 is substantially the same as that of FIG. 1 (a), L₁、L_CAnd L_GRespectively, the parasitic inductances (corresponding to the inductances L) of the bonding wires 12₁) Capacitor C₁And C₂And a laser diode D_LParasitic inductance (corresponding to inductance L) of the electrical connection therebetween_C) And control terminal ON and MOSFET T_HSCorresponding to the inductance L, of the parasitic inductance (corresponding to the inductance L) of the electrical connection (e.g. bonding wire) between the actual control electrodes_G). Gate driver 41 and electronic switch T_HSTogether can be considered to be used to drive a laser diode D_LThe driver circuit 4 of (1).

In LIDAR systems, the measurement range depends on the radiation power of the laser pulses. However, to limit the pulse energy (to protect the eyes of people in the environment of the LIDAR system), the laser pulse needs to be rather short. Effective parasiticInductor L_EFF(L_EFF＝L_C+L₁) Voltage drop V across_LEFFGiven by:

V_LEFF＝L_EFF·Δi_L/t_{rise up}And V_LEFF＝L_EFF·Δi_L/t_Descend

Wherein Δ i_LIs the change in load current (e.g. from 0A to 40A or from 40A to 0A), t_{Rise up}Is the corresponding rise time and t_DescendIs the corresponding fall time. Assume an effective inductance of 5nH and a rise time of 2ns produces a voltage drop of 100V. Thus, the system comprising the capacitor must be designed for voltages in excess of 110V (assuming a voltage drop of 10V across the laser diode and the MOSFET) in order to achieve the desired peak current within the desired rise time. It should be noted that for some applications a 2ns rise time may be too long. With the integration method as shown in fig. 1 (b)), the inductance L_EFFCan be significantly reduced (e.g., less than 2nH or even less than 1 nH). The residual inductance is mainly used for connecting the MOSFET T_HSAnd a laser diode D_LIs caused by the bond wire 12. For example, when the load current ramps up to 40A in a rise time of 0.5ns, at the inductor L_EFFIn the case of a reduction to 1nH, the voltage drop V_LEFFStill 80V.

One understanding from the above analysis is that a relatively high voltage (compared to the forward voltage of the laser diode) is required to produce a fast current transient (steep current ramp within a very short rise time or fall time) of the load current through the laser diode. Higher voltages cause increased complexity and cost of the driver circuit. For example, transistors and buffer capacitors with comparable breakdown voltages are needed; a charge pump may be required to charge the buffer capacitor to the desired voltage. The driver circuit described herein is designed to generate a steep current ramp in order to drive the laser diode at a relatively low supply voltage.

FIG. 3 is a view showing a driving circuit for driving a laser diode D_LIs provided in the first example of the driver circuit 4. As in the example of fig. 2And a laser diode D_LThe parasitic inductance associated with the generation of the current ramp is shown in fig. 3. The driver circuit thus comprises a transistor half-bridge consisting of a high-side transistor T_HSAnd a low-side transistor T_LSAnd (4) forming. These transistors T_HSAnd T_LSCoupled in series across which a supply voltage V is applied_SAnd is at a reference potential V_GNDGround node GND (e.g., 0V). The circuit node forming the center tap of the transistor half-bridge is denoted as OUT. Connecting the circuit node OUT and the transistor T_HSAnd T_LSIs composed of an inductor L₁And L₂And (4) showing. As discussed above, the mentioned bonding wires or any other wires contacting the transistor electrodes may generate significant inductance. As can be seen in FIG. 3, the laser diode D_LConnected between circuit node OUT and ground GND. Furthermore, one or more buffer capacitors, collectively represented by capacitor C, are connected between the power supply node SUP and ground GND. As in the example of fig. 2, an inductor L connected in series with a capacitor C_CRepresenting the parasitic inductance created by wires in contact with one or more capacitors. In the present example, the transistor T_HSAnd T_LSIs an n-channel MOSFET. However, any other transistor type (e.g., bipolar junction transistor) may be used in other implementations. When MOSFETs are used, the high-side transistor T_HSBut may also be implemented as p-channel MOS transistors.

The clamp circuits CL1 and CL2 are coupled to the transistor T respectively_HSAnd T_LS. When the transistor T_HSWhen turned off, the clamp circuit CL1 is configured to receive a pass through inductor L₁Of the inductor current i₁. Thus, the transistor T_HSIs (re) activated for a short period of time (or delays deactivation for a short period of time), thereby allowing the inductor L to be used for a short period of time₁"discharge" (demagnetization). Similarly, when the transistor T is turned on_LSWhen turned off, the clamp circuit CL2 is configured to receive a pass through inductor L₂Of the inductor current i₂. Similarly, the transistor T_LSIs (re) activated (or delays deactivation for a short time period)Segment) allowing the inductor L to be used₂"discharge" (demagnetization). Mentioned transistor T during clamping_HSAnd T_LSIs controlled by a transistor T_HSAnd T_LSThe drain-source voltage across exceeds the clamping voltage defined by the zener diode included in the clamping circuit. In addition to current commutation, the clamp circuits CL1 and CL2 may limit the voltage across the gate dielectric to protect the transistor T, respectively_HSAnd T_LS(in the case of MOS transistors).

In this example, the clamp circuit CL1 is connected at the transistor T_HSAnd a supply node SUP and comprises a zener diode D_Z1A、D_Z1BAnd a normal diode D₁The series circuit of (1). At the time of making the inductor current i₁When reversing, diode D₁Forward biased and zener diode D_Z1AAnd D_Z1BOperating in zener or avalanche breakdown and thus conducting in reverse. Zener diode D_Z1AConnected to a transistor T_HSTo limit the gate-source voltage and protect the transistor T_HSThe gate dielectric of (a). Diode D₁And a Zener diode D_Z1BConnected to a transistor T_HSAnd a power supply node SUP. The clamp circuit CL2 includes a transistor T coupled to_LSBetween the drain and the gate of (2) a zener diode D_Z2BAnd a normal diode D₂And coupled to the transistor T_LSAnother zener diode D between the gate and the source of_Z2A. At the time of making the inductor current i₂When reversing, diode D₂Forward biased, Zener diode D_Z2BOperating in zener or avalanche breakdown and thus conducting in reverse. Connected to a transistor T_LSBetween the drain and the gate of diode D₂And D_Z2BThe transistor T can thus be switched_LSIs pulled up to a high level sufficient to delay the complete turn-off of the transistor for a short time interval, during which the inductor L is pulled up to the above-mentioned clamping voltage of, for example, 40V₂Demagnetization is possible. The clamp circuit CL1 is substantially identicalOperate in the manner described above.

It should be noted that the clamp circuits CL1 and CL2 are only suitable for the n-channel MOS transistor T_HSAnd T_LSAn exemplary embodiment of (1). Other implementations of the clamp circuit may be used depending on the application. When the transistor T_HSAnd T_LSWhen turned on, the diode D₁And D₂Respectively blocking pass transistors T_HSAnd T_LSBetween the gate and the drain of (2) a zener diode D_Z1BAnd D_Z2BThe current path of (1). As described above, the primary purpose of the clamp circuits CL1 and CL2 is to clamp, i.e., receive, inductor current when the respective transistors are turned off, so as to delay the actual turning off of the respective transistors and allow demagnetization of the respective inductors. It should be noted that the gate driver (see fig. 2, gate driver 41) is omitted in the example of fig. 3 in order to keep the illustration concise. Suitable gate driver circuits are known per se and will therefore not be described in more detail.

The function of the driver circuit of fig. 3 will now be explained with reference to the timing diagram shown in fig. 4. In LIDAR systems, a series of successive current (and light) pulses are typically generated to obtain a sequence of corresponding range measurements. The timing diagram shows that throughout one pulse period (i.e., time t)₀To time t₄) Of the inductor current i₁And i₂And through the laser diode D_LLoad current i_D(diode current). According to the present example, the diode current i is actually switched on_DFormerly, inductor i₁And i₂Are "pre-charged" (i.e., magnetized) with magnetic flux. Fig. 4 (a) shows an inductor current i₁An exemplary waveform of (b) in fig. 4 shows an inductor current i₂And (c) in fig. 4 shows the diode current i_DAn exemplary waveform of (a).

According to the example of fig. 4, the pulse period may be divided into five phases. In the first phase (time t)₀Before and at time t₃And t₄In between), the transistor T_HSAnd T_LSBoth are turned off, andinductor current i₁And i₂And a diode current i_DZero (off phase). The second phase is at time t₀(or t in the subsequent pulse period₄) A preliminary precharge phase during which the transistor T is activated_HSAnd T_LSBoth are conductive (on). Inductor L₁And L₂(and their intrinsic series resistance) form a voltage divider and are designed such that the voltage V at the center tap OUT of the transistor half-bridge (which is also the center tap of the voltage divider)_DNot exceeding the laser diode D_LA forward voltage (e.g., 2.2V). Thus, the diode current i_DRemains substantially zero during the precharge phase while the inductor current i₁And i₂(i₁＝i₂，i_D0) is ramped up as shown in (a) and (b) of fig. 4. Thereby, the inductor current i₁And i₂Slope k of₁Is k₁＝(V₁+V₂)/(L₁+L₂) In which V is₁And V₂Respectively shown in the inductor L₁And L₂The voltage drop across it. At time t₁Stored in the inductor L₁And L₂Energy E in₁And E₂Are each E₁＝(L₁·i₁ ²) [ 2 ] and E₁＝(L₂·i₂ ²)/2. Voltage V across the inductor₁+V₂Relatively low, e.g., 2V to 5V. It should be noted that the low-side transistor T_LSCan be regarded as a bypass circuit configured to receive via the high-side transistor T when activated_HSSupplied inductor current i₁(Note that during the precharge phase i₁＝i₂) And during this phase the diode current i_DRemains substantially zero.

The third stage is at time t₁A ramp-up phase of the start during which the transistor T_HSRemains on while the transistor T_LSAt time t₁And (6) turning off. When passing through the transistor T_LSWhen the current path of (i) is no longer available, the inductor current i₁Is led out via a laser diode, and the diodeCurrent i_DRamp up very sharply in a very short rise time, while the inductor current i₂Is commutated fairly quickly by the clamp circuit CL 2. During this phase, in the inductor L₂Voltage V across₂Can drop to about-40V. The fourth phase is called the switch-on phase and is at the time t₂At the beginning, at time t₂At the inductor current i₂Reaches zero and the inductor L₂Is completely demagnetized. The switch-on phase continues until the time t₂'. The fifth stage is at time t₂' initial ramp-down phase during which the transistor T_LSRemains off with the transistor T_HSAt time t₂' is also turned off. When passing through the transistor T_HSWhen the current path of (i) is no longer available, the inductor current i₁Commutation takes place relatively quickly by the clamp circuit CL 1. As mentioned above, the Zener diode D_Z1AEnsures the transistor T_HSDoes not become too high, protecting the gate dielectric. At this stage, in the inductor L₁Voltage V across₁Possibly down to about-40V. At time t₃Inductor current i₁Down to zero ampere (i.e. inductor L)₁Fully demagnetized), the ramp-down phase ends and the mentioned turn-off phase begins until at time t₄A new precharge phase is started.

FIG. 5 is a view showing a driving circuit for driving a laser diode D_LIs used for driving the driver circuit 4. In the present example, the driver circuit comprises four transistors connected to a two transistor half bridge and thus forming a transistor H-bridge. Thus, the first half-bridge is formed by the high-side transistor T₁And a low-side transistor T₁₁And (4) forming. Circuit node OUT1 is the center tap of the first half bridge. Similarly, the second half-bridge is formed by a high-side transistor T₂₂And a low-side transistor T₂And (4) forming. Circuit node OUT2 is the center tap of the second half bridge. Both half-bridges are connected to a supply voltage V_SBetween power supply node SUP and ground node GND. Laser diode D_LConnected between circuit nodes OUT1 and OUT 2. Circuit node OUT1 and transistor T₁And T₁₁The inductances of the wires therebetween are respectively formed by inductors L₁And L₁₁And (4) showing. Similarly, circuit node OUT2 and transistor T₂And T₂₂The inductances of the wires therebetween are respectively formed by inductors L₂And L₂₂And (4) showing. Each transistor T₁、T₂、T₁₁、T₂₂Respectively by Zener diodes D_Z1、D_Z2、D_Z11、D_Z22Respective clamp circuits are shown coupled. It should be noted that the clamp circuit is simplified in this example, and may be more complex in other examples (e.g., as in fig. 3).

The function of the driver circuit of fig. 5 will now be explained with reference to the timing diagram of fig. 6. It should be noted, however, that the principle of operation of this example is similar to that of the previous example shown in fig. 3. Thus, during the pre-charge phase, the inductor L₁And L₁₁And L₂And L₂₂Is precharged, wherein all transistors T₁、T₁₁、T₂、T₂₂Conducting (switching on). This phase is shown in the timing diagram of fig. 6 at time t₀And t₁In the meantime. The first four diagrams in fig. 6 (from the top) show the application to the transistor T₁、T₁₁、T₂、T₂₂Exemplary waveforms of the gate signal of (1). The bottom diagram of fig. 6 shows the inductor current i₁And diode current i_DExemplary waveforms of (a). It can be seen that the inductor current i₁＝i₁₁And at time t₀(at which time all transistors are on) and time t₁And rises in between. In a symmetrical arrangement, the voltages at circuit nodes OUT1 and OUT2 are the same during the precharge phase, and thus at laser diode D_LVoltage V across_DLIs zero; the inductor currents being the same, i.e. i₁＝i₂＝i₁₁＝i₂₂. As in the previous example of FIG. 3, the transistor T₁₁(and a transistor T₂₂) Can be viewed as a bypass circuit configured to provide a current path for the inductor current to bypass laser two when activated during the precharge phasePolar tube D_L. When deactivated (at the beginning of the subsequent ramp-up phase), the bypass is closed and current is forced through the laser diode.

At time t₁By triggering the transistor T₁₁And T₂₂To initiate the ramp-up phase. Thus, the inductor current i₁And i₂Is laser diode D_LReceive, and therefore diode current i_DAt a very short rise time t_{Rise up}＝t₂-t₁Internal ramp up, and inductor current i₁₁And i₂₂By a Zener diode D_Z11And D_Z22(the clamp circuits CL11 and CL 22). In addition to the example of fig. 3, a transistor T₁And T₂At time t₂And t₂In between (i.e. at time t)₂During the' previous on-phase) remains on, triggering the transistor T at the beginning of the ramp-down phase₁And T₂Is turned off. During the ramp-down phase (time t)₂' and t₃In between), inductor current i₁And i₂Zener diode D_Z1And D_Z2(the clamp circuits CL1 and CL2) receive and the current drops to zero (see FIG. 6, time t)₃). The following phase is a shutdown phase that continues until a new precharge phase is triggered.

FIG. 7 is a view showing a driving circuit for driving a laser diode D_LIs used for driving the driver circuit 4. The example of fig. 7 is a variation of the previous example of fig. 3, with an additional security feature. As mentioned above, the maximum radiated power of a laser diode is rather high (up to e.g. 40W and more) in order to achieve a significant measurement range in a LIDAR system. However, in order to limit the pulse energy (radiation power multiplied by pulse width) to a value that is not harmful to the human eye (for a given pulse repetition frequency), the duration of the pulse (pulse width) must be sufficiently short. When using a driver circuit as shown in fig. 3, when the high-side switch T is switched_HSWithout turning off the diode current i_DA dangerous situation may arise (for whatever reason). In this case, the laser diode will be operated as a laser diode with a radiation power of a few wattsA Continuous Wave (CW) laser (which would correspond to a class 3B or class 4 laser) operates.

The example of fig. 7 is substantially the same as the example of fig. 3, with the circuit node OUT (by transistor T)_HSAnd T_LSCenter tap of the formed half-bridge) and laser diode D_LWith an additional capacitor C interposed₀. By a high-side transistor T_HSParasitic inductance caused by wires between the inductor L and the circuit node OUT₁And (4) showing. Composed of a circuit node OUT and a capacitor C₀Parasitic inductance caused by the wire therebetween is caused by the inductor L₂And (4) showing. Capacitor C₀Making the high-side transistor T_HS(thereby providing a supply voltage V_SPower supply node) is decoupled from the laser diode with respect to DC current. Therefore, even a high-side transistor may cause the circuit node OUT and the power supply node (voltage V)_S) Short circuit therebetween, laser diode D_LIs also operated by the capacitor C₀Blocking, capacitor C₀Blocking light from the laser diode D_LOf the DC current of (1). For safely turning off the laser diode D_LThe other low-side switch T can be switched_LS' parallel coupling to laser diode D_L. By a laser diode D_LAnd a transistor T_LSThe parasitic inductance caused by the wire between is caused by the inductance L₃Represents, inductance L₃Can have a relatively low inductance.

The function of the driver circuit of fig. 7 will now be explained with reference to the timing diagram of fig. 8. Thus, at time t₀And t₁In the first phase in between (precharge phase), the high-side transistor T_HSAnd an additional low-side transistor T_LS' conductive, low-side transistor T_LSAnd (6) turning off. Thus, through the inductor L₁、L₂And L₃And a capacitor C₀Of the inductor current i₁Ramping up as in the example of fig. 3. Stored in the inductor L₁+L₂+L₃Energy E in₁₂₃Is E₁₂₃＝((L₁+L₂+L₃)·i₁ ²)/2. During the second phase (energy transfer phase), the determined energy E in the inductance₁₂₃Is transferred to the capacitor C₀Is caused to pass through a capacitor C₀And when the transistor T is in a transient state_LSAt time t₁(see second timing diagram in fig. 8) is turned off, the transient current flows through the laser diode D_LIs drawn out. A corresponding radiant power output is produced by the laser diode. Capacitor C₀May be at time t₃Is discharged in the initial third stage, at t₃At the moment, two low-side transistors T_LSAnd T_LS' is turned on. When a new pulse period is triggered, the transistor T_LSCan remain on until time t₄. In other words, the transistor T_LSIs activated at the end of the generated (current and corresponding light) pulse to cause the capacitor C to be charged₀Is completely discharged, ensuring the same defined initial conditions (capacitor C)₀Discharge) to generate a pulse.

As can be seen in the timing diagrams shown in fig. 4, 6 and 8, the timing of the switching moments of the various transistors determines the pulse width of the radiant power output produced by the laser diode. The example of fig. 9 is the same as the previous example of fig. 3. However, the present example additionally shows a method for separately generating a transistor T for use in a transistor_HSAnd T_LSGate voltage V of_GHSAnd V_GLSThe

gate driver circuits

41a and 41 b. The

gate drivers

41a and 41b are configured to be ON according to (binary) logic signals, respectively_HSAnd ON_LSTo generate a gate voltage V_GHSAnd V_GLS. According to the present example, the

programmable delay circuits

42a, 42b may be coupled to the inputs of the

gate drivers

41a and 41b, respectively. The

delay circuits

42a, 42b are configured to turn the logic signal ON_HSAnd ON_LSThe delay is up to a defined (adjustable) delay time. Using the

delay circuits

42a, 42b, the logic signal ON can be fine tuned_HSAnd ON_LS(further, the gate voltage V can be trimmed_GHSAnd V_GLS) Timing of (2). In some applications, such trimming may be required, for example, to compensate for variations in parasitic inductance, and may be performed at the end of production during production testing using, for example, automatic test equipment. The delay may be stored in a one-time programmable (O)TP) memory, EPROM, etc. Logic signal ON_HSAnd ON_LSMay be generated by the controller circuit CTRL and the generation of these signals may be triggered by the input signal IN (logic signal). It will be appreciated that the controller circuit CTRL may be any suitable logic circuit, and may be implemented, for example, using programmable logic circuits, a microcontroller executing software instructions, or the like. It should be understood that in any of the examples described herein, the gate voltages supplied to the high-side and low-side transistors may be generated in a similar manner to the present example of fig. 9.

FIG. 10 is a flow chart illustrating an exemplary method for driving a laser diode. The method may be implemented using any of the driver circuits described herein. First, during the precharge phase, via the first electronic switch (see fig. 3 and 7, the high-side transistor T)_HS(ii) a And FIG. 5, transistor T₁₁) The current (see, e.g., fig. 3, 5 and 7, inductor current i)₁) To the output node (node OUT or OUT1) coupled to the laser diode (fig. 10, step 81). Thus, the effective first inductance between the first electronic switch and the output node is magnetized. In addition, during the precharge phase, the low-side transistor T is switched on by means of an activated bypass circuit (see fig. 3, 5 and 7, respectively_LS、T₁₁And T_LS') will current i₁From the output node (fig. 10, step 82). Thus, the laser diode is bypassed and the diode current is substantially zero, while the inductor is magnetized (pre-charged). In the subsequent ramp-up phase, the low-side transistor T is switched off by deactivating the bypass circuit (see fig. 3, 5 and 7, respectively_LS、T₁₁And T_LS') will current i₁To the laser diode via the output node (fig. 10, step 83). Since the effective inductance in the current path has been magnetized, the diode current can ramp up very sharply, resulting in a relatively short rise time.

Although the invention has been illustrated and described with respect to one or more implementations, alterations and/or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular regard to the various functions performed by the above described components or structures (units, assemblies, devices, circuits, systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention. .

In addition, while a particular feature of the invention may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms "includes," including, "" includes, "" having, "" has, "" with, "or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term" comprising.

In summary, in embodiments according to the present invention, the present invention provides the following examples.

Example 1a driver circuit for driving a laser diode, comprising:

a first electronic switch connected to an output node, the output node configured to be operably connected to the laser diode; the electrical connection between the first electronic switch and the output node has a first inductance;

a bypass circuit coupled to the output node and configured to receive a current provided to the output node via the first electronic switch when activated, thereby magnetizing the first inductor.

Example 2. according to the driver circuit of example 1,

wherein an electrical connection between the output node and the bypass circuit has a second inductance that is also magnetized when the bypass circuit is activated.

Example 3. the driver circuit of examples 1 or 2, further comprising:

a clamping circuit coupled to the first electronic switch, the clamping circuit configured to limit a voltage drop across the first electronic switch according to a clamping voltage.

Example 4. the driver circuit of any of examples 1 to 3, further comprising:

a clamp circuit coupled to the first electronic switch, the clamp circuit configured to delay the turn-off during the turn-off of the first electronic switch to demagnetize the first inductor.

Example 5. the driver circuit of any of examples 1 to 4, further comprising:

a first driver coupled to a control electrode of the first electronic switch, the first driver configured to generate a drive signal to turn the first electronic switch on or off in accordance with a first control signal.

Example 6. the driver circuit of example 5, further comprising:

a first delay circuit coupled to the first driver and configured to delay the first control signal by an adjustable delay time.

Example 7. the driver circuit according to any one of examples 1 to 6,

wherein the bypass circuit comprises a second electronic switch connected to the output node, the electrical connection between the second electronic switch and the output node having a second inductance.

Example 8, according to the driver circuit of example 7,

wherein the bypass circuit further comprises a clamp circuit coupled to the second electronic switch, the clamp circuit configured to receive current through the second inductor when the second electronic switch is turned off.

Example 9. the driver circuit of examples 7 or 8, further comprising:

a second driver coupled to a control electrode of the second electronic switch, the second driver configured to generate a drive signal to turn the second electronic switch on or off in accordance with a second control signal.

Example 10. the driver circuit of example 9, further comprising:

a second delay circuit coupled to the second driver and configured to delay the second control signal by an adjustable delay time.

Example 11 the driver circuit of any of examples 1 to 10, further comprising:

a capacitor coupled between the first electronic switch and the output node to block DC current flowing from the first electronic switch to the output node.

Example 12. the driver circuit of example 11, further comprising:

a third electronic switch operably connected in parallel with the laser diode.

Example 13. the driver circuit of any of examples 1 to 12, further comprising:

a half bridge including a third electronic switch and a fourth electronic switch, the half bridge coupled between a power supply node and a ground node, a center tap of the half bridge forming another output node configured to be operably coupled to the laser diode such that the laser diode is coupled between the output node and the another output node.

Example 14, according to the driver circuit of example 13,

wherein the electrical connection between the third electronic switch and the further output node has a third inductance; and

wherein an electrical connection between the fourth electronic switch and the further output node has a fourth inductance.

Example 15. the driver circuit of example 14, further comprising:

a clamp circuit coupled to the third electronic switch, the clamp circuit configured to receive current through the third inductor when the third electronic switch is turned off; and

another clamp circuit coupled to the fourth electronic switch, the other clamp circuit configured to receive current through the fourth inductor when the fourth electronic switch is turned off.

Example 16. a driver circuit for driving a laser diode, comprising:

first and second transistor half bridges forming an H-bridge having first and second output nodes configured to operably couple a laser diode therebetween; each transistor half-bridge consists of a high-side transistor and a low-side transistor; and

a control circuit configured to:

during a pre-charge phase, turning on high-side and low-side transistors of the first and second transistor half-bridges to magnetize any inductors coupled in series with the high-side and low-side transistors; and

during a ramp-up phase, the low-side transistor of the first transistor half-bridge and the high-side transistor of the second transistor half-bridge are turned off, thereby directing current through the high-side transistor of the first transistor half-bridge and the low-side transistor of the second transistor half-bridge and through an inductor coupled in series to the high-side transistor of the first transistor half-bridge and the low-side transistor of the second transistor half-bridge through the laser diode via the first output node and the second output node.

Example 17 a method for driving a laser diode, comprising:

directing a first current through a first electronic switch to an output node operatively coupled to the laser diode, thereby magnetizing an effective first inductance between the first electronic switch and the output node;

bypassing the laser diode by activating a bypass circuit to draw the first current from the output node;

directing the first current to the laser diode via the output node by deactivating the bypass circuit.

Claims

1. A driver circuit for driving a laser diode, comprising:

2. The driver circuit as set forth in claim 1,

3. The driver circuit according to claim 1 or 2, further comprising:

4. The driver circuit according to claim 1 or 2, further comprising:

5. The driver circuit according to claim 1 or 2, further comprising:

6. The driver circuit of claim 5, further comprising:

7. The driver circuit as set forth in claim 1,

8. The driver circuit as set forth in claim 7,

9. The driver circuit according to claim 7 or 8, further comprising:

10. The driver circuit of claim 9, further comprising:

11. The driver circuit according to claim 1 or 2, further comprising:

12. The driver circuit of claim 11, further comprising:

a third electronic switch operably connected in parallel with the laser diode.

13. The driver circuit according to claim 1 or 2, further comprising:

14. The driver circuit as set forth in claim 13,

15. The driver circuit of claim 14, further comprising:

16. A driver circuit for driving a laser diode, comprising:

a control circuit configured to:

during a pre-charge phase, turning on high-side and low-side transistors of the first and second transistor half-bridges to magnetize any inductors coupled in series with the high-side and low-side transistors of the first and second transistor half-bridges; and

17. A method for driving a laser diode, comprising: