CN109314126A - LED module and its manufacturing method - Google Patents
LED module and its manufacturing method Download PDFInfo
- Publication number
- CN109314126A CN109314126A CN201780035169.2A CN201780035169A CN109314126A CN 109314126 A CN109314126 A CN 109314126A CN 201780035169 A CN201780035169 A CN 201780035169A CN 109314126 A CN109314126 A CN 109314126A
- Authority
- CN
- China
- Prior art keywords
- chip
- led
- mentioned
- led chip
- transfer belt
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 61
- 239000000758 substrate Substances 0.000 claims abstract description 135
- 239000000853 adhesive Substances 0.000 claims abstract description 31
- 230000001070 adhesive effect Effects 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 31
- 238000010023 transfer printing Methods 0.000 claims abstract description 12
- 238000003825 pressing Methods 0.000 claims abstract description 10
- 230000003313 weakening effect Effects 0.000 claims abstract description 6
- 241001062009 Indigofera Species 0.000 claims description 4
- 238000002360 preparation method Methods 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 description 58
- 239000011159 matrix material Substances 0.000 description 36
- 229910052594 sapphire Inorganic materials 0.000 description 33
- 239000010980 sapphire Substances 0.000 description 33
- 238000004020 luminiscence type Methods 0.000 description 12
- 238000005096 rolling process Methods 0.000 description 9
- 238000000926 separation method Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 238000005530 etching Methods 0.000 description 6
- 238000000059 patterning Methods 0.000 description 6
- 238000003466 welding Methods 0.000 description 6
- 238000003491 array Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 238000005452 bending Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000033001 locomotion Effects 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 210000004209 hair Anatomy 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000011218 segmentation Effects 0.000 description 3
- 229910002601 GaN Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 239000010437 gem Substances 0.000 description 2
- 229910001751 gemstone Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 101001045744 Sus scrofa Hepatocyte nuclear factor 1-beta Proteins 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
- H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68354—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
- H01L2221/68386—Separation by peeling
- H01L2221/68395—Separation by peeling using peeling wheel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8121—Applying energy for connecting using a reflow oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/95001—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/951—Supplying the plurality of semiconductor or solid-state bodies
- H01L2224/9511—Supplying the plurality of semiconductor or solid-state bodies using a rack or rail
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/951—Supplying the plurality of semiconductor or solid-state bodies
- H01L2224/95115—Supplying the plurality of semiconductor or solid-state bodies using a roll-to-roll transfer technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/9512—Aligning the plurality of semiconductor or solid-state bodies
- H01L2224/95136—Aligning the plurality of semiconductor or solid-state bodies involving guiding structures, e.g. shape matching, spacers or supporting members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
Abstract
The present invention discloses the manufacturing method of LED module.The manufacturing method of the LED module includes: chip carrier manufacture craft, makes chip carrier, and said chip carrier includes the chip maintaining part with horizontal adhesive surface, and multiple LED chips of the adhesive surface bonded-electrode pad in said chip maintaining part;Transfer printing process, the substrate positioned at other positions is transferred to by certain arrangement from said chip maintaining part by above-mentioned multiple LED chips, wherein, above-mentioned transfer printing process includes: first time step of exposure, the transfer belt is regionally exposed in the light for weakening the bonding force of transfer belt, to form adhesion area in above-mentioned transfer belt at predetermined intervals;And chip picks up step, by the pressing of above-mentioned transfer belt on the above-mentioned LED chip in said chip maintaining part, electrode pad while so that each above-mentioned LED chip is attached to each of above-mentioned transfer belt above-mentioned adhesion area, from said chip holding part from above-mentioned LED chip.
Description
Technical field
The present invention relates to LED module and its manufacturing methods, in more detail, are related to a kind of utilize and transfer (transfer
Printing) and face-down bonding (flip bonding) manufacture LED module method.
Background technique
The each LED for proposing a kind of transmitting different wave length is grouped to form the full color LED display device of pixel to take
LED is used as the display device of backlight by generation.At this point, each pixel is made of red LED, green LED and blue led, or
It is made of red LED, green LED, blue led and White LED.In this LED display, each red LED, green LED
Encapsulation unit is fabricated to blue led and is assemblied on substrate, in this case, due to constituting the LED of each pixel each other
Separation, therefore, it is difficult to obtain the resolution ratio of high quality.In addition, when constituting pixel with the LED of encapsulation unit, it is difficult to apply them
In the micro- LED display for causing concern recently.Also, a kind of LED pixel unit was proposed in the past, wherein constituting a picture
Red LED, green LED and the blue led assembly of element are in a package.In this case, although LED in a pixel
Between interval, i.e., interval between sub-pixel reduces, it can be difficult to reducing the interval between pixel.Also, red LED,
It is possible to generate the interference of light between green LED and blue led.
Therefore, the present inventor has attempted by the way that array includes red LED core in PCB substrate in the matrix form
The group of piece, green LED chip and blue LED die realizes LED display module, to reduce the interval between pixel.However, difficult
Will have the LED chip of the fine sizes of units of micrometers with certain altitude and certain intervals assembly on substrate.It is assemblied in base
The difference in height and/or interval difference of LED chip on plate can reduce colorrendering quality.Also, in order on substrate electrode pad and
Electrical connection between LED chip needs wire bonding (Wire bonding), due to this wire bonding, manufactures a kind of product need
Will at least tens Dao several hundred hours activity duration.In particular, during several hundred a LED chips are arrived in assembly tens on substrate,
When LED chip is not positioned accurately at desired position, the luminous pattern of design object can not achieve, and occur serious
Misalignment.In particular, recently using it is a kind of by AM matrix base plate array having a size of several microns to several hundred microns of micro- LED
It manufactures the technology of the LED module for display, but is difficult to manufacture accurate and high quality by traditional chip assembling method
Display module.
Summary of the invention
The technical problem to be solved in the present invention
In this regard, the LED chip by using full transfer (total transfer printing) by array at an arbitrary position
The technology being transferred on other substrates can become the solution for solving problem of the prior art.However, even if passing through transfer
Top is transferred to array on substrate equipped with the LED chip of electrode pad, if desired as the individual of wire bonding adds
Technique, then number of processes increases, and the production cost increases, and arranges at random, and quality can significantly deteriorate.Therefore, work as electrode pad
When being transferred on substrate with the flip chip bonding direct type LED chip that state directed downwardly arranges, do not need individual such as wire bonding
Additional process, and the arrangement as caused by additional process can be prevented at random.Furthermore, it is desirable to have with required arrangement selection several
Micron arrives the LED chip of several hundred microns of required size, and by transferring come array.
Therefore, technical problem to be solved by the invention is to provide a kind of manufacturing methods of LED module, wherein from certain
Arrangement does not keep dispersedly the chip maintaining part of multiple LED chips that multiple LED chips are transferred on substrate, then will be multiple
On LED chip face-down bonding to substrate, to manufacture LED module.
Technical solution
The manufacturing method of LED module according to an aspect of the present invention, comprising: chip carrier manufacture craft makes core
Piece carrier, said chip carrier include the chip maintaining part with horizontal adhesive surface, and in the viscous of said chip maintaining part
Multiple LED chips of conjunction face bonded-electrode pad;Transfer printing process presses one from said chip maintaining part by above-mentioned multiple LED chips
Fixed arrangement is transferred to the substrate positioned at other positions, wherein above-mentioned transfer printing process includes: first time step of exposure, by above-mentioned turn
It is exposed in the light for weakening the bonding force of transfer belt to print region property, to be formed in above-mentioned transfer belt at predetermined intervals viscous
Close region;And chip picks up step, and above-mentioned transfer belt is pressed the above-mentioned LED chip in said chip maintaining part, so that
While each above-mentioned LED chip is attached to each of above-mentioned transfer belt above-mentioned adhesion area, from said chip holding part from
The electrode pad of above-mentioned LED chip.
It is covered in above-mentioned first time step of exposure by using the light for being formed with multiple light-transmissive windows according to an embodiment
Film passes light through above-mentioned light-transmissive window and is exposed to above-mentioned transfer belt.
According to an embodiment, the manufacturing method of above-mentioned LED module further include: second of step of exposure, said chip are picked up
Integrally weaken the bonding force for being attached with the above-mentioned transfer belt of above-mentioned LED chip after step;Step is placed, by above-mentioned multiple LED cores
The above-mentioned transfer belt that piece is integrally weakened from bonding force is transferred to aforesaid substrate.
It according to an embodiment, is picked up in step in said chip, the pick-up roller rotated by single roll is by above-mentioned transfer
Band is pressed on the above-mentioned LED chip bonded in said chip maintaining part.
According to an embodiment, in above-mentioned placement step, using placing the above-mentioned LED that will be attached in above-mentioned transfer belt of roller
Chip is pressed on aforesaid substrate, so that the electrode pad of above-mentioned LED chip is attached to one be previously formed on aforesaid substrate
To salient point.
According to an embodiment, in above-mentioned placement step, the bonding force of above-mentioned transfer belt, which is less than, is previously placed in above-mentioned a pair
The bonding force of adhesive on salient point.
According to an embodiment, said chip carrier manufacture craft includes: the chip maintaining part for preparing to have horizontal adhesive surface
The step of;The step of preparing multiple LED chips;And above-mentioned multiple LED chips are bonded on above-mentioned adhesive surface, so that constituting one
The chip attachment steps of a above LED chip array, wherein in above-mentioned preparation multiple LED chips the step of, prepare N-shaped
Multiple LED chips that electrode pad and p-type electrode pad extend downwardly, in said chip attachment steps, by above-mentioned n-type electrode
Pad and above-mentioned p-type electrode pad are directly bonded to above-mentioned adhesive surface.
According to an embodiment, in said chip attachment steps, above-mentioned multiple LED chips are attached to above-mentioned adhesive surface,
So that the spacing in above-mentioned LED chip array in said chip maintaining part is to be transferred to above-mentioned base by above-mentioned transfer printing process
1/n times of spacing in the LED chip array of plate, wherein n is greater than 1 natural number, and above-mentioned spacing is adjacent two
Horizontal distance in LED chip between the center of LED chip and the center of another LED chip.
The LED module of one aspect according to the present invention, comprising: multiple LED chips, one side has electrode pad, another
Side has the face contacted with transfer belt, and shifts simultaneously forming array from external chip maintaining part;And substrate, have with
Multiple salient points of above-mentioned electrode pad face-down bonding, wherein above-mentioned transfer belt is by from external irradiation to the another of above-mentioned LED chip
The primary light of side and be divided into exposed region and non exposed region, above-mentioned LED chip is bonded and is picked up as adhesion area
Above-mentioned non exposed region.
According to an embodiment, the above-mentioned adhesion area of above-mentioned transfer belt is by being irradiated to above-mentioned LED chip from said external
Second of light of the other side and bonding force is lowered so that being separated with above-mentioned LED chip.
According to an embodiment, the above-mentioned adhesion area of above-mentioned transfer belt is not exposed to by photomask from said external
It is irradiated to the region of the first time light of the other side of above-mentioned LED chip.
According to an embodiment, when carrying out above-mentioned pickup, above-mentioned transfer belt is pressed into above-mentioned LED chip using rod and is rotated
Roller, to pick up LED chip.
According to an embodiment, after above-mentioned LED chip is aligned with the riding position on aforesaid substrate, rotated by the pressing of roller
And it is separated from above-mentioned transfer belt.
According to an embodiment, said chip maintaining part includes horizontal adhesive surface, and the side of above-mentioned multiple LED chips
Each electrode pad extend downwardly and be directly bonded to said chip maintaining part.
According to an embodiment, on the basis of the adhesive surface of said chip maintaining part, above-mentioned multiple LED chips all have identical
Highly.
According to an embodiment, the spacing in above-mentioned LED chip array in said chip maintaining part is to be transferred to above-mentioned base
1/n times of spacing in the LED chip array of plate, wherein n is greater than 1 natural number, and above-mentioned spacing is adjacent two
Horizontal distance in LED chip between the center of LED chip and the center of another LED chip.
According to an embodiment, the bonding force of said chip maintaining part is less than the viscous of the above-mentioned non exposed region of above-mentioned transfer belt
With joint efforts, the bonding force of the above-mentioned exposed region and greater than above-mentioned transfer belt.
According to an embodiment, array said chip maintaining part above-mentioned multiple LED chips all only by identical LED
The LED chip of chip manufacturing process and any class in the red LED chips, green LED chip or the blue LED die that manufacture
It constitutes.
According to an embodiment, array above-mentioned multiple LED chips of said chip maintaining part include red LED chips, it is green
Color LED chip and blue LED die.
According to an embodiment, said chip maintaining part be can be with film flexible.
Beneficial effect
According to the present invention, select all or part of in multiple LED chips of array preparatory at an arbitrary position, and utilize with
Transfer modes of the desired arranged array in target base plate can manufacture LED of multiple LED chips accurately to it on substrate
Module.
By following explanation, other effects of the invention may be better understood.
Detailed description of the invention
Fig. 1 is the flow chart for illustrating the manufacturing method of LED module according to an embodiment of the invention.
Fig. 2 is the figure for illustrating the transfer printing process in the manufacturing method of LED module according to an embodiment of the invention.
Fig. 3 is for illustrating that in the manufacturing method of LED module according to an embodiment of the invention include blue LED die
Chip carrier (chip-on-carrier) manufacture craft figure.
Fig. 4 is for illustrating that in the manufacturing method of LED module according to an embodiment of the invention include green LED chip
Chip carrier manufacture craft figure.
Fig. 5 is for illustrating that in the manufacturing method of LED module according to an embodiment of the invention include red LED chips
Chip carrier manufacture craft figure.
Fig. 6 is for illustrating to include according to alternate embodiment red LED chips, green LED chip and blue led core
The figure of the chip carrier manufacture craft of piece.
Fig. 7 is to show the display module substrates of other embodiments according to the present invention and on aforesaid substrate with matrix arrangement
The top view of the array of the electrode pattern of formation.
Fig. 8 is the display mould for showing the LED chip group including being arranged in electrode pattern shown in Fig. 7 with matrix arrangement
The top view of block.
Fig. 9 is the cross-sectional view for LED chip group shown in explanatory diagram 8.
Figure 10 is the top view for the alternative of explanatory diagram 7 to LED module shown in Fig. 9.
Figure 11 is the figure for the manufacturing method of explanatory diagram 7 to LED module shown in Figure 10.
Figure 12 is for illustrating that LED chip is transferred in substrate in order to manufacture LED module shown in Fig. 7 to Figure 10
Method figure.
Figure 13 is the manufacturer using the LED module selectively transferred for illustrating further embodiment according to the present invention
The flow chart of method.
Figure 14 is that the chip in the manufacturing method for LED module shown in explanatory diagram 13 picks up (picking up
Chip) the figure of step.
Figure 15 is the figure for expanding the circle " A " for showing Figure 14.
Figure 16 is chip moving step in the manufacturing method for LED module shown in explanatory diagram 15 and in chip
The figure for the step of weakening the bonding force of carrier band (carrier tape) before placing (placing).
Figure 17 is the figure of the chip placement step in the manufacturing method for LED module shown in explanatory diagram 16.
Figure 18 is the figure for the circle " B " in explanatory diagram 17.
The figure for the LED chip pick-up operation that Figure 19 is used to illustrate to transfer entirely.
Figure 20 a and Figure 20 b are for illustrating to carry out the multiple exemplary of LED chip pick-up operation by selectivity transfer
Figure.
Specific embodiment
Bonding force by the transfer belt 3 of 2 UV step of exposure S23, which is less than, is previously placed in substrate 5 (more specifically, a pair of
Salient point 5a, 5b) on adhesive bonding force.Roller 270 is placed to roll the LED chip 1 for being attached to transfer belt 3 in a manner of pressing
It is dynamic to rotate on substrate 5, it is rotated on a pair of of salient point 5a, 5b on substrate 5 more specifically, rolling, so that LED chip 1 is attached
To on substrate 5.It places roller 270 and flexible tilting blanket (blanket) is set on the peripheral side of the roller main body in conjunction with axis, make
When obtaining LED chip 1 and rotate and can preferably place downwards by placing the rolling of roller, and can also prevent from being rotated by rolling
The damage of LED chip 1 caused by pressing.Also, the second estrade (stage) 290 can rise, to help to place roller 270
Pressing.Then, the strip step S25 for removing transfer belt 3 from LED chip 1, the LED core then placed on the substrate 5 are executed
Piece 1 can be welded on substrate by subsequent reflow soldering (reflow soldering) technique.
As shown in figure 3, the chip carrier manufacture craft comprising blue LED die 1B includes: LED wafer making step S11-
B, for making including sapphire (sapphire) substrate 10B and being grown in partly leading on above-mentioned sapphire substrate 10B including N-shaped
The blue led of the gallium nitride epitaxial layer of body layer 12B, active layer (active layer) 13B and p-type semiconductor layer 14B is brilliant
Piece WB;Wafer patterning step S12-B, by above-mentioned extension pattern layers, so that all opposite sides in sapphire substrate 10B are wrapped
Multiple blue hairs of the exposed region of exposed region and n-type semiconductor layer 12B containing the p-type semiconductor layer 14B for being in segment difference
Light unit (light emitting cell) CB is formed with matrix arrangement;Pad forming step S13-B, in p-type semiconductor layer
The exposed region of 14B forms p-type electrode pad 142B, and forms n-type electrode weldering in the exposed region of n-type semiconductor layer 12B
Disk 122B;Above-mentioned LED wafer WB is split by chip separation step S14-B as unit of luminescence unit CB
(singulation) to make multiple blue LED die 1B, blue LED die 1B includes sapphire substrate 10B, above-mentioned indigo plant
Wafer layer 12B, 13B, 14B on jewel substrate 10B and be formed in above-mentioned sapphire substrate 10B opposite side wafer layer 12B,
P-type electrode pad 142B and n-type electrode pad 122B on 13B, 14B;And chip attachment steps S15-B, overturn multiple indigo plants
Color LED chip 1B is simultaneously attached in the chip maintaining part 2 with bonding force, so that p-type electrode pad 142B and n-type electrode pad
122B downward, and is arranged in a matrix multiple blue LED die 1B.The bonding force of said chip maintaining part 2 is less than above-mentioned
The bonding force of transfer belt 3 before UV exposure, less than the bonding force of the transfer belt 3 after UV exposure.
In blue led wafer fabrication step S11-B, make outer layer growth, so that active layer 13B includes InxGa (1-x)
N well layer, and the amount of In is suitably adjusted to obtain blue LED die 1B.In above-mentioned wafer patterning step S12-B, pass through
Etching forms multiple line direction paddy (valleys) and multiple column direction paddy on epitaxial layer, thus elder generation in sapphire substrate 10B or
Formed on lattice matching layers 11B on it includes the multiple of n-type semiconductor layer 12B, active layer 13B and p-type semiconductor layer 14B
Then luminescence unit CB partly etches the p-type semiconductor layer 14B and active layer 13B that remove each luminescence unit CB to expose n
Type semiconductor layer 12B.In pad forming step S13-B, p-type electrode pad is formed in the exposed region of p-type semiconductor layer 14B
142B, n-type semiconductor layer 12B exposed region formed n-type electrode pad 122B, and above-mentioned n-type electrode pad 122B and
Above-mentioned p-type electrode pad 142B is formed to have the thickness for compensating above-mentioned segment difference, so that from the bottom surface of sapphire substrate 10B to n
The height of the upper surface of type electrode pad 122B is equal to from the bottom surface of sapphire substrate 10B to the upper table of p-type electrode pad 142B
The distance in face.In said chip segmentation step S14-B, by using such as blade (blade) or the cutting tool T of saw (saw)
Or above-mentioned blue led wafer W B is divided into the unit of above-mentioned luminescence unit CB to make multiple blue LED die 1B by laser.Directly
To the step, n-type electrode pad 122B and p-type electrode pad 142B are towards upside, and sapphire substrate 10B is towards downside.?
In chip attachment steps S15-B, overturns above-mentioned multiple blue LED die 1B and multiple LED chip 1B are attached to chip holding
On portion 2B, so that n-type electrode pad 122B and p-type electrode pad 142B are adhered on the horizontal adhesive surface of chip maintaining part 2B.
At this point, the upper surface of LED chip 1 becomes the basal plane of sapphire substrate 10B, and the height of all blue LED die 1B is opposite
In the adhesive surface of chip maintaining part 2B be constant.All blue LED die 1B of the chip carrier made in this way are protected in chip
It holds and is aligned to be formed multiple row arrays or column array on the 2B of part.Preferably, chip maintaining part 2B is that with flexibility and have
The chip of horizontal adhesive surface keeps film.Bond and be maintained at specific one column of the horizontal adhesive surface of said chip maintaining part 2B
The chip chamber of blue LED die 1B in array is by a column array above-mentioned for transferring array on substrate away from P
Blue LED die chip chamber away from 1/n, at this point, n is greater than 1 natural number.In this specification, chip chamber is away from being defined
For the horizontal distance in two adjacent LED chips between a LED chip center and another LED chip center.
As shown in figure 4, the chip carrier manufacture craft comprising green LED chip 1G includes: LED wafer making step S11-
G, for make include sapphire substrate 10G and be grown on above-mentioned sapphire substrate 10G include n-type semiconductor layer 12G, have
The green LED wafer W G of the gallium nitride epitaxial layer of active layer 13G and p-type semiconductor layer 14G;Wafer patterning step S12-G,
By above-mentioned extension pattern layers, so that all opposite sides in sapphire substrate 10G include the p-type semiconductor layer for being in segment difference
Multiple green emitting unit CG of the exposed region of the exposed region and n-type semiconductor layer 12G of 14G are formed with matrix arrangement;Weldering
Disk forming step S13-G forms p-type electrode pad 142G in the exposed region of p-type semiconductor layer 14G, and in n-type semiconductor
The exposed region of layer 12G forms n-type electrode pad 122G;Chip separation step S14-G shines above-mentioned LED wafer WG single
First CG is that unit is split (singulation) to make multiple green LED chip 1G, and green LED chip 1G includes indigo plant
Jewel substrate 10G, wafer layer 12G, 13G, 14G on above-mentioned sapphire substrate 10G and it is formed in above-mentioned sapphire substrate 10G
Opposite side wafer layer 12G, 13G, 14G on p-type electrode pad 142G and n-type electrode pad 122G;And chip attachment step
Rapid S15-G overturns multiple green LED chip 1G and is attached in the chip maintaining part 2 with bonding force, so that p-type electrode welds
Disk 142G and n-type electrode pad 122G downward, and are arranged in a matrix multiple green LED chip 1G.
In green LED wafer fabrication step S11-G, make outer layer growth, so that active layer 13G includes InxGa (1-x)
N well layer, and with it is above-mentioned production blue LED die when compared be turned up In composition ratio to obtain green LED chip 1G.
In above-mentioned wafer patterning step S12-G, multiple line direction paddy and multiple are formed by etching on epitaxial layer
Column direction paddy, so that first being formed on lattice matching layers 11G in sapphire substrate 10G or on it includes n-type semiconductor layer
Then multiple luminescence unit CG of 12G, active layer 13G and p-type semiconductor layer 14G partly etch each luminescence unit of removal
The p-type semiconductor layer 14G and active layer 13G of CG is with exposing n-type semiconductor layer 12G.In pad forming step S13-G, in p-type
The exposed region of semiconductor layer 14G forms p-type electrode pad 142G, forms N-shaped electricity in the exposed region of n-type semiconductor layer 12G
Pole pad 122G, and above-mentioned n-type electrode pad 122G and above-mentioned p-type electrode pad 142G are formed to have the above-mentioned segment difference of compensation
Thickness so that the height from the bottom surface of sapphire substrate 10G to the upper surface of n-type electrode pad 122G is equal to from process for sapphire-based
Distance of the bottom surface of plate 10G to the upper surface of p-type electrode pad 142G.In said chip segmentation step S14-G, by using
As above-mentioned LED wafer WG is divided into the unit of above-mentioned luminescence unit CG more to make by the cutting tool T or laser of blade or saw
A green LED chip 1G.Until the step, n-type electrode pad 122G and p-type electrode pad 142G are towards upside, and sapphire
Substrate 10G is towards downside.In chip attachment steps S15-G, above-mentioned multiple green LED chip 1G are overturn and by multiple LED cores
Piece 1G is attached on chip maintaining part 2G, so that n-type electrode pad 122G and p-type electrode pad 142G are adhered to chip maintaining part
On the horizontal adhesive surface of 2G.At this point, the upper surface of green LED chip 1G becomes the basal plane of sapphire substrate 10G, and all green
The height of color LED chip 1G is constant relative to the adhesive surface of chip maintaining part 2G.The chip carrier made in this way owns
Green LED chip 1G is aligned to form multiple row arrays or column array on chip holding part 2G.Preferably, chip is kept
Portion 2G is to keep film with flexible and chip with horizontal adhesive surface.Bond and be maintained at the level of said chip maintaining part 2G
The chip chamber of green LED chip 1G in specific one column array of adhesive surface away from P is existed by transfer array above-mentioned
The chip chamber of the green LED chip in a column array on substrate away from 1/n, at this point, n is greater than 1 natural number.
As shown in figure 5, the chip carrier manufacture craft comprising red LED chips includes: LED wafer making step S11-R,
It include sapphire substrate 10R and to be welded on above-mentioned sapphire substrate 10R include p-type semiconductor layer 12R, active for making
The red LED wafer W R of the epitaxial layer of layer 13R and n-type semiconductor layer 14R;Wafer patterning step S12-R, by above-mentioned extension
Pattern layers, so that being divided into multiple red hairs of first area a1 and second area a2 by p-type semiconductor layer exposure slot 120R
Light unit CR is formed with matrix arrangement;Pad forming step S13-R, the shape on the n-type semiconductor layer 14R of above-mentioned first area a1
P-type electrode pad 122R is formed at the n-type electrode pad 142R for being connected to n-type semiconductor layer 14R, and in second area a2,
The upside electrically isolated and in n-type semiconductor layer 14R by insulating layer R and n-type semiconductor layer 14R the p-type electrode pad 122R
It is contacted with wiring layer L (extending from p-type semiconductor layer exposure slot 120R);Chip separation step S14-R, by above-mentioned LED wafer WR
(sinRulation) is split as unit of luminescence unit CR to make multiple red LED chips 1R, the red LED chips
1R includes sapphire substrate 10R, the wafer layer being welded on above-mentioned sapphire substrate and above-mentioned p-type electrode pad 122R and n
Type electrode pad 142R;And chip attachment steps S15-R, it overturns multiple red LED chips 1R and is attached to bonding force
Chip maintaining part 2R on so that p-type electrode pad 122R and n-type electrode pad 142R are downward, and make multiple red LED cores
Piece 1R is arranged in a matrix.
Above-mentioned red LED wafer fabrication step S11-R includes: to grow on GaAs substrate GS including n-type semiconductor layer
The step of epitaxial layer of 14R, active layer 13R and p-type semiconductor layer 12R, and across SiO2Welding layer 11R is partly led in p-type
Body layer 12R welds the sapphire substrate 10R as supporting substrates, and separates from n-type semiconductor layer 14R as life in its opposite side
The step of GaAs substrate GS of long substrate, wherein above-mentioned n-type semiconductor layer 14R includes n-AlGaInP layers and n- covering (n-
Cladding layer), above-mentioned active layer 13R includes MQW, and above-mentioned p-type semiconductor layer 12R includes p- covering and p-GaP layers.
In above-mentioned wafer patterning step S12-R, by above-mentioned epitaxial layer etch formed multiple line direction paddy and
Multiple column direction paddy, so that being formed on welding layer 11R first in sapphire substrate 10R or on it includes p-type semiconductor layer
Multiple luminescence unit CR of 12R, active layer 13R and n-type semiconductor layer 14R, then pass through etching in each luminescence unit CR
To the p-GaP layer of p-type semiconductor layer 12R depth and formed p-type semiconductor layer exposure slot 120R so that each luminescence unit CR
Upper area include first area a1 and second area a2.In above-mentioned pad forming step S13-R, the a1 in first area
N-type electrode pad 142R is formed on n-type semiconductor layer 14R, so that n-type electrode pad 142R and n-type semiconductor layer 14R directly connect
It connects, forms p-type electrode pad 122R on the n-type semiconductor layer 14R of second area a2, and p-type electrode pad 122R passes through
The wiring layer L for extending to p-type semiconductor layer exposure slot 120R is connected to p-type semiconductor layer 12R.From the bottom of sapphire substrate 10R
Face is to the distance (i.e. the welding surface height of n-type electrode pad 142R) of n-type electrode pad 142R and from the bottom of sapphire substrate 10R
The distance (i.e. the welding surface height of p-type electrode pad 122R) of face to p-type electrode pad 122R are equal.In said chip segmentation step
In rapid S14-R, above-mentioned LED wafer WR is split to make multiple red LED chips as unit of above-mentioned luminescence unit CR
1R.Until the step, n-type electrode pad 142R and p-type electrode pad 122R are towards upside, and sapphire substrate 10R is downwards
Side.In chip attachment steps S14-R, overturns above-mentioned multiple red LED chips 1R and be attached to multiple red LED chips 1R
On chip maintaining part 2R, so that the level that n-type electrode pad 142R and p-type electrode pad 122R are adhered to chip maintaining part 2R is viscous
On conjunction face.At this point, the upper surface of red LED chips 1R becomes the basal plane of sapphire substrate 10R in the chip carrier of production, and
And the height of all LED chip 1R is constant relative to the adhesive surface of chip maintaining part 2R.At this point, chip carrier is all red
Color LED chip 1R is aligned to form multiple row arrays or column array on chip holding part 2R.
As shown in Figure 6, it is also contemplated that red LED chips 1R, green LED core are successively attached in chip maintaining part 2
The chip carrier of piece 1G and blue LED die 1B.This chip carrier can disposably will be red by transfer printing process above-mentioned
LED chip, green LED chip 1G and blue LED die 1B are transferred on substrate.
[second of LED module manufacturing technology]
Referring to Fig. 7 to Fig. 9, LED module 100 according to an embodiment of the invention includes: the substrate 110 of rectangle;Above-mentioned
The multiple electrodes pattern 130 with certain altitude formed on substrate 110 with matrix arrangement;To correspond to above-mentioned electrode pattern
130 mode is arranged in multiple LED chip groups 150 on aforesaid substrate 110 with matrix arrangement.
Aforesaid substrate 110 is the object for being formed with electrode pattern 130 and assembling LED chip 151,153 or 155 on it,
And in order to assemble multiple LED chips 151,153,155 with certain altitude, use flat substrate.Therefore, if base
Plate 110 has flat surfaces, then substrate 110 can be rigidity (rigid) type, is also possible to flexible (flexible) type.
Specifically, aforesaid substrate 110 can be plastic base, ceramic substrate or glass substrate with rigidity, or as printed electricity
The flexible base board of road plate (FPCB).
As previously mentioned, multiple electrodes pattern 130 is formed on aforesaid substrate 110 with matrix arrangement, and whole height phase
Deng.For example, remove to be formed in the partially electronically conductive property metal film on a flat surface for substrate 100 divided by certain altitude using etching,
Or form the conductive metal film with certain pattern with certain altitude on a flat surface for substrate 100 using exposure mask,
To form the multiple electrodes pattern 130 with certain altitude.
Also, above-mentioned multiple electrodes pattern 130 is formed as including horizontal and vertical matrix arrangement, the description of the present embodiment
In, the direction definition parallel with the line Lx of Fig. 7 and Fig. 8 is that laterally, the direction definition parallel with the line Ly of Fig. 7 and Fig. 8 is longitudinal.
Each above-mentioned electrode pattern 130 includes: and is parallel to the first longitudinal end line EL ' of above-mentioned matrix arrangement to it
Public electrode pad 139;Be parallel to the second end line EL of above-mentioned first end line EL ' to it and be located at above-mentioned first end line EL '
The first single electrode pad (firstindividual electrode pad) 131, second between above-mentioned second end line EL
Single electrode pad 132 and third single electrode pad 133.
At this point, above-mentioned first single electrode pad 131, the second single electrode pad 132 and third single electrode pad 133
The unshowned input power being individually connected in finished circuit (finished electric circuit), to realize
The independent control for the LED chip that will be described in detail below.
Also, above-mentioned public electrode pad 139 includes: on the basis of above-mentioned first end line EL ' and with rectangular shape
Three branches (branch) that two slots and shape being recessed inwardly are defined by above-mentioned two slot, i.e. the first branch
136, the second branch 137 and third branch 138.Above-mentioned first branch 136, the second branch 137 and third branch 138 limit respectively
The soldered region of the pedestal of the side of each LED chip, this helps to prevent from LED chip being welded into flip-chip
Circuit defect caused by undesirable bending or sliding of the Shi Keneng by pedestal etc..
Above-mentioned first single electrode pad 131, the second single electrode pad 132 and third single electrode pad 133 are with one
Fixed interval is concurrently formed, so as to the LED chip for the different wave length that will be described in detail below, i.e. the first LED chip 151, the
Two LED chips 153 and third LED chip 155 can parallel arrays at certain intervals.Above-mentioned first single electrode pad 131,
The pedestal that two single electrode pads 132 and third single electrode pad 133 limit each LED chip other side respectively is welded
The region connect.
Also, above-mentioned first single electrode pad 131, above-mentioned second single electrode pad 132 and above-mentioned third are individually electric
Pole pad 133 includes: side end 131b, 132b, 133b consistent with above-mentioned the second end EL;Its opposite side with it is above-mentioned
Public electrode pad 139 adjacent end side 131c, 132c, 133c;And be parallel to lateral side 131a, 132a,
133a.Also, above-mentioned first single electrode pad 131, above-mentioned second single electrode pad 132 and the weldering of above-mentioned third single electrode
Disk 133 include positioned at the above-mentioned side end side 131b, 132b, 133b narrow width part and be located at above-mentioned end side 131c,
The wide width portion of the side 132c, 133c (width is greater than above-mentioned narrow width part).The position for forming salient point is set on wide width part.
End side 131c, 132c, 133c of above-mentioned single electrode pad 131,132,133 are parallel and adjacent to be located at
136 ', 137 ', 138 ' place of end of the branch 136,137,138 of the public electrode pad 130 consistent with the first end line EL '.
As shown in figure 8, each above-mentioned multiple LED chip groups 150 include arranging and can not emit one along above-mentioned longitudinal array
The first LED chip 151, the second LED chip 153 and the third LED chip 155 of the light of co-wavelength.In the present embodiment, above-mentioned first
LED chip 151 can be the red LED chips that the substantially light of red band is issued by applying electric power, above-mentioned second LED core
Piece 153 can be the green LED chip for issuing the light of green band, and above-mentioned third LED chip 155 can be sending blue wave band
Light blue LED die.
Above-mentioned first LED chip 151 is in having on one side towards aforesaid substrate 110: passing through 1-1 salient point 171a (1st
First bump) it is welded in the 1-1 electrode 151a (1stfirst electrode) of above-mentioned first single electrode pad 131;
And the first branch 136 of above-mentioned public electrode pad 139 is welded in by 1-2 salient point 171b (1st second bmup)
1-2 electrode 151b (1st second electrode).
Above-mentioned second LED chip 153 is in having on one side towards aforesaid substrate 110: passing through 2-1 salient point 173a (2nd
First bump) it is welded in the 2-1 electrode 153a (2nd first electrode) of above-mentioned first single electrode pad 132;
And the second branch 137 of above-mentioned public electrode pad 139 is welded in by 2-2 salient point 173b (2nd second bmup)
2-2 electrode 153b (2nd second electrode).
Above-mentioned third LED chip 155 is in having on one side towards aforesaid substrate 110: passing through 3-1 salient point 175a (3rd
First bump) it is welded in the 3-1 electrode 155a (3rd first electrode) of above-mentioned third single electrode pad 133;
And the third branch 138 of above-mentioned public electrode pad 139 is welded in by 3-2 salient point 175b (3rd second bmup)
3-2 electrode 155b (3rd second electrode).
It is welded into flip-chip on substrate 110 and needs essence with all LED chips of matrix arrangement 151,153,155
Identical height is to obtain expected colorrendering quality.For this purpose, including above-mentioned first LED chip 151, above-mentioned second LED chip
152 is identical with the height of all LED chips of above-mentioned third LED chip 153, is formed in the one side one of the first LED chip 151
Side, the second LED chip 152 the while side and on virtual same straight line when side and third LED chip 153
1-1 electrode 151a, above-mentioned 2-1 electrode 153a are identical with the height of above-mentioned 3-1 electrode 155a, and are formed in first
LED chip 151 the other side, the second LED chip 152 while the other side and third LED chip 153 the other side on one side
And the height of the 1-2 electrode 151b, 2-2 electrode 153b and above-mentioned 3-2 electrode 155b on virtual same straight line
It is roughly the same.
Also, above-mentioned 1-1 salient point 171a, above-mentioned 2-1 salient point 173a and above-mentioned 3-1 salient point 175a are pressed finally
There is the first certain height, above-mentioned 1-2 salient point 171b, above-mentioned 2-2 salient point 173b and above-mentioned 3-2 are convex in the state of contracting
Point 175b has the second certain height under final compressed state, and above-mentioned first height and above-mentioned second height can
To be set as mutually different, to compensate due to above-mentioned first LED chip 151, above-mentioned second LED chip 153 and above-mentioned third
Difference in height caused by segment difference between LED chip 155.
By etching removal from include translucency growth substrate (especially sapphire substrate), the first conductive type semiconductor layer,
The epitaxial structure (epilayer structure) of the laminar structure of active layer and the second conductive type semiconductor layer is sudden and violent to downside
Second semiconductor layer of dew and the partial region of the active layer to connect with it, expose the first conductive type semiconductor layer to downside,
To form the segment difference of each LED chip 151,153,155.
Furthermore, it is possible to which the height for making to be provided in two electrodes on LED chip is different from each other, to reduce since etching causes
Segment difference can also have subtle segment difference but in this case.In this case, above-mentioned 1-1 salient point 171a, on
2-1 salient point 173a and above-mentioned 3-1 salient point 175a are stated under no compressed state, keeps its height and above-mentioned 1-2 convex
Point 171b, above-mentioned 2-2 salient point 173b are identical with the height of above-mentioned 3-2 salient point 175b.But above-mentioned salient point is pressed finally
In the state of contracting, in order to compensate for the segment difference in view of the LED chip of electrode height being provided in each LED chip, above-mentioned the
1-1 salient point 171a, above-mentioned 2-1 salient point 173a and above-mentioned 3-1 salient point 175a are first high under final compressed state
Degree and above-mentioned 1-2 salient point 171b, above-mentioned 2-2 salient point 173b and above-mentioned 3-2 salient point 175b are in final compressed state
Under height can be different.
Also, each above-mentioned 1-1 salient point 171a, above-mentioned 2-1 salient point 173a and above-mentioned 3-1 salient point 175a are being pressed
In the state of shortening above-mentioned first height into, relative to the first single electrode pad 131, the second single electrode pad 132 and third
The top surface area of the wide width part of single electrode pad 133, with 50~80% bond area.Also, above-mentioned 1-2 salient point
171b, above-mentioned 2-2 salient point 173b and above-mentioned 3-2 salient point 175b are under final compressed state, relative to above-mentioned first
Each top surface area of branch 136, the second branch 137 and above-mentioned third branch 138, with 50~80% bond area.
As described above, each salient point 171a, 173a, 175a, 171b, 173b or 175b are relative to each single electrode pad
Or the top surface area of each branch of public electrode pad, there are 50~80% bonding areas, even if from its bonding area is corresponded to
Region be detached from and engage, can also inhibit with other adjacent bump contacts, in this way can prevent short circuit (shortage)
Occur.That is, even if the engaging zones of pre-set salient point 171a, 173a, 175a, 171b, 173b or 175b, in reality
In the technique of border or there can be a possibility that salient point tends to other salient point sides adjacent thereto by subtle bending or sliding,
But as described above, if bonding area is limited within 80%, though in actual process salient point 171a, 173a,
175a, 171b, 173b or 175b sliding or bending, will not contact with adjacent salient point etc., so as to prevent the hair of short circuit
It is raw.On the other hand, in the case where bonding area is less than 50%, it can not achieve reliable engagement, it is therefore preferred that salient point is most
The area for being joined to single electrode pad or branch eventually is at least 50% or more.
Above-mentioned first branch 136, the second branch 137 and third branch 138 respectively as public electrode pad a part,
Limit the soldered region above-mentioned 1-2 salient point 171b, above-mentioned 2-2 salient point 173b and above-mentioned 3-2 salient point 175b, and from root
Preventing on this in flip-chip welding procedure may be by above-mentioned 1-2 salient point 171b, above-mentioned 2-2 salient point 173b and above-mentioned the
Caused circuit defect is slided in the bending of 3-2 salient point 175b.That is, being welded by slot in public electrode if be not provided with
The first branch 136, the second branch 137 and the third branch 138 of the side separation of disk 139, then in flip-chip welding procedure
Above-mentioned 1-2 salient point 171b, above-mentioned 2-2 salient point 173b and above-mentioned 3-2 salient point 175b can be on above-mentioned public electrode pads
Sliding or bending, so as to cause circuit defect etc., but if there is above-mentioned first branch 136, the second branch 137 and third
Branch 138 can then limit above-mentioned 1-2 salient point 171b, above-mentioned 2-2 salient point 173b and above-mentioned 3-2 salient point 175b upper
Sliding or curved region on public electrode pad 139 are stated, thus it can be prevented that defect as described above.
As described above, the multiple LED chips 151,152,153 for being welded into flip-chip on aforesaid substrate 110 are grouped
At with multiple LED chip groups 150 of matrix arrangement, and multiple LED chip groups 150 all by along longitudinally disposed at certain intervals
The first LED chip 151, the second LED chip 153 and third LED chip 155 constitute.By by 1-1 electrode 151a, above-mentioned
2-1 electrode 153a and above-mentioned 3-1 electrode 155a and the first single electrode pad 131, the second single electrode pad 132 and
Three single electrode pads 133 electrical connection, by above-mentioned 1-2 electrode 151b, above-mentioned 2-2 electrode 153b and above-mentioned 3-2 electrode
155b is electrically connected with public electrode pad 130, can independently control each LED chip group 150 the first LED chip 151,
Two LED chips 153 and third LED chip 155.
On the other hand, each lateral separation and longitudinal direction of the LED chip group 150 of matrix are arranged on aforesaid substrate 110
Interval is identical respectively.In addition, the lateral separation of LED chip group 150 is identical with the longitudinal gap of above-mentioned LED chip group 150.For
This, the lateral separation of the electrode pattern 130 formed on aforesaid substrate 110 with matrix arrangement and longitudinal gap are also identical, so as to
Corresponding to above-mentioned LED chip group 150.Moreover it is preferred that lateral separation and the above-mentioned electrode pattern 130 of above-mentioned electrode pattern 130
Longitudinal gap it is identical.
Also, interval and above-mentioned 2nd LED between above-mentioned first LED chip 151 and above-mentioned second LED chip 153
Chip chamber between chip 153 and above-mentioned third LED chip 155 is every identical, preferably about 0.3~1.5mm.For example, in FHD
In the case where grade LED module, said chip interval can be fabricated to about 0.75mm, in the case where UHD grades of LED modules, on
Chip chamber is stated every about 0.375mm can be fabricated to.
Referring now to Figure 10, explanation further includes other other LED modules constituted compared with preceding example.
LED module 100 ' shown in Figure 10 include be formed on substrate 110 with stop adjacent LED chip 151,153,
The barrier (barrier) 190 of the interference of light between 155.In the present embodiment, above-mentioned barrier 190 includes: in each LED chip group
In 150 between adjacent the first LED chip 151 and the second LED chip 153 and in the second LED chip 153 and third LED core
The smooth reflecting wall 191 of first formed between piece 155;Between longitudinally adjacent LED chip group 150,150 and with transverse direction
The the second smooth reflecting wall 193 formed between adjacent LED chip group 150,150.
Above-mentioned first smooth reflecting wall 191 and above-mentioned second smooth reflecting wall 193 can prevent output light in each adjacent LED core
Interfered between the adjacent LED chip of adjacent LED chipset 150,150 between adjacent LED chip in piece group, so that drop
The quality of low output light.It can be used and absorb light between LED chip 151,153,155 or between LED chip group 150 to stop
The barrier of the interference of light come replace include light reflecting wall barrier 190.
1 and Figure 12 referring to Fig.1, the manufacturing method of explanatory diagram 7 to LED module shown in Fig. 9.
Referring to Fig. 7, Fig. 8, Fig. 9, Figure 11 and Figure 12, the manufacturing method of LED module according to the present invention includes: electrode pattern
Forming step S01, being formed as shown in Figure 7 on substrate 110 with matrix arrangement includes the first single electrode pad 131, second
The electrode pattern 130 of single electrode pad 132, third single electrode pad 133 and public electrode pad 139;Salient point load
Step S02, as shown in figure 8, it is single that 1-1 salient point 171a, 2-1 salient point 173a, 3-1 salient point 175a are loaded into above-mentioned first
A electrode pad 131, above-mentioned second single electrode pad 132 and above-mentioned third electrode pad 133, and by 1-2 salient point
171b, 2-2 salient point 173b and 3-2 salient point 175b are loaded into the first branch 136, second of above-mentioned public electrode pad 139
Branch 137 and third branch 138;Step S03, as shown in figure 11, the first LED including the optical wavelength characteristics with different wave length
Multiple LED chips of chip 151, the second LED chip 153 and third LED chip 155 are assemblied in substrate with certain altitude together
On 110, thus by multiple LED chip groups 150 with matrix arrangement on substrate 110.
In particular, with step S03 of the matrix arrangement on substrate 110 including utilizing roll-to-roll (roll by LED chip group 150
To roll) mode transfer technique by the multiple LED chip groups 151 being arranged on supporting mass B with certain matrix arrangement,
153, it 155 is transferred on substrate 110 and assembles with original alignment.
Such as detailed description below, the roll-to-roll transfer technique of LED chip 151,153,155 is utilized: bonding carrier;
The pick-up roller 40 of pressing bonding carrier when picking up LED chip 151,153,155;It is assembled to by LED chip 151,153,155
The chip that LED chip 151,153,155 is pressed when substrate 110 places roller 50 etc..Pick-up roller 40 and chip place roller 50 relative to
Carrier is bonded, is fitted to each other operating in chip pick-up position and chip rigging position, so that LED chip 151,153,155 is with original
Begin to arrange and shifts and be assembled on substrate 110 from supporting mass B.Above-mentioned bonding carrier be can by multiple LED chips 151,153,
155 elements with bonding force for bonding and shifting, above-mentioned pick-up roller 40 are to make position by pressing bonding carrier to LED chip
It is adhered to the element of bonding carrier in multiple LED chips 151,153,155 on supporting mass B, it is to use that said chip, which places roller 50,
In the element that the multiple LED chips 151,153,155 for being bonded in bonding carrier are pressed into original alignment to substrate 110.In addition,
The device of the bonding force of partial reduction bonding carrier before picking up LED chip using pick-up roller 40 can be additionally utilized, or
Integrally weaken bonding carrier before substrate 110 placing roller 50 by using chip and assembling LED chip 151,153,155
The device of bonding force.
Such as above-mentioned brief description, the step S03 packet by above-mentioned LED chip group 150 with matrix arrangement on substrate 110
Include: step S1, S3 will include the first LED chip 151 for having 1-1 electrode 151a and 1-2 electrode 151b, have 2-1
The second LED chip 153 of electrode 153a and 2-2 electrode 153b and the third LED chip 155 for having 3-2 electrode 155b
LED chip with matrix arrangement be adhered to partially with bonding force relief regions bonding carrier 10 ';It is mobile to bond carrier
Step S4, mobile above-mentioned bonding carrier, so that each above-mentioned 1-1 electrode 151a, above-mentioned 2-1 electrode 153a and above-mentioned 3-
1 electrode 155a respectively for above-mentioned 1-1 salient point 171a, above-mentioned 2-1 salient point 173a and above-mentioned 3-1 salient point 175a, and
Each above-mentioned 1-2 electrode 151b, above-mentioned 2-2 electrode 153b and above-mentioned 3-2 electrode 155b are convex respectively for above-mentioned 1-2
Point 171b, 2-2 salient point 173b and 3-2 salient point 175b;Chip places (chip placing down) step S7, with certain
Pressure presses above-mentioned first LED chip 151, above-mentioned second LED chip 153 and above-mentioned third LED chip 155, so that above-mentioned the
1-1 salient point 171a, 2-1 salient point 173a, 3-1 salient point 175a are compressed to the first height, above-mentioned 1-2 salient point 171b, 2-2
Salient point 173b and 3-2 salient point 175b is compressed to the second height.
With step S1, S3 that matrix arrangement bonds include: step S1 by above-mentioned LED chip, to above-mentioned bonding carrier 10 into
Row the 1st time exposure, to manufacture the bonding carrier 10 ' for being formed with bonding force relief regions and the non-relief regions of bonding force;Step S3,
Above-mentioned non-relief regions are pressed into above-mentioned LED chip 151,153,155 using the pick-up roller 40 of rotation, so that above-mentioned LED core
Piece 151,153,155 is adhered to above-mentioned bonding carrier 10 '.
Firstly, before LED chip 151,153,155 is attached to bonding carrier with matrix arrangement, LED chip 151,153,
155 with matrix arrangement on supporting mass B.Here LED chip 151 in the matrix arrangement and subsequent technique of LED chip, 153,
155 are attached to matrix arrangement and the dress of LED chip 151,153,155 when the bonding carrier 10 ' with bonding force relief regions
Matrix arrangement when fitting over substrate 110 is compared, and horizontal spacing and longitudinal pitch are all equal.By LED chip 151,153,155 with square
Battle array arrangement is attached to before bonding carrier, do not carry out bonding force weaken processing bonding carrier 10 be located at LED chip 151,153,
155 upside, the upside of bonding carrier 10 can be set the photomask 20 for carrying out the 1st exposure to bonding carrier 10 and expose
Ray machine 30.
In the whole region of bonding carrier 10, it is necessary to weaken and the not corresponding region of LED chip 151,153,155
Bonding force, for this purpose, exposure machine 30 exports ultraviolet light, also, ultraviolet light passes through photomask in above-mentioned 1st step of exposure S1
20 through hole is only radiated at the region that LED chip 151,153,155 is not corresponded in the whole region of bonding carrier 10.It is ultraviolet
Light is acted under 200 DEG C of steady temperatures below on bonding carrier 10, to weaken the bonding of the partial region of bonding carrier 10
Power.It is all set intermittently formed with the bonding carrier 10 ' of bonding force relief regions as a result,.
Picked up in step S3 in said chip, LED chip 151,153,155 is attached to bonding force relief regions and
The non-relief regions of bonding force of the bonding carrier 10 of the non-relief regions of bonding force.Bonding with bonding force relief regions is set
Pick-up roller 40 on the upside of carrier 10 ' makes bonding carrier 10 ' be pressed into LED chip 151,153,155.At this point, bonding carrier 10 ' and
Supporting mass B is kept fixed state respectively, and the whole region for bonding carrier 10 ' is successively pressed into LED by rotation by pick-up roller 40
Chip 151,153,155.By this movement of pick-up roller 40, LED chip 151,153,155 can be prevented to be detached from setting position
And bonding carrier 10 ' is adsorbed onto when skidding off.
Also, before said chip places step S7, it is preferable that there is the bonding of bonding force relief regions to a part
Carrier 10 ' carries out the 2nd exposure, to manufacture 2 step of exposure S5 of the bonding carrier 10 " that bonding force integrally weakens.Also,
Said chip is placed in step S7, is placed roller 50 using the chip rotated on the bonding carrier 10 " that bonding force integrally weakens, is used
Certain pressure presses above-mentioned LED chip 151,153,155.Then it executes from LED chip 151,153,155 and separates bonding force entirety
The separating step S9 of the bonding carrier 10 " of decrease.
When rotary chip placement roller 50 is pressed, bonding carrier 10 " will be bonded in by placing roller 50 by rotary chip
LED chip 151,153,155 is in turn attached on substrate 110.At this point it is possible to by salient point above-mentioned be heated to certain temperature with
On.By the placement roller 50 of rotation, LED chip 151,153,155 is securely fitted into base with preset height and interval
The setting position of plate 110.
By this method, a large amount of LED chips 151,153,155 can be assembled on substrate 110 in a short time, and
And under this assembled state, the first LED chip 151, the second LED chip 153 and third LED chip of different wave length are issued
155 can be grouped as unit of the LED chip group of respective pixel, these groups are aligned to certain matrix arrangement and composition
LED module.After being bonded together due to the LED chip arranged in advance with certain matrix arrangement by bonding carrier, turn as former state
Substrate 110 is moved and be assembled to, therefore the alignment between LED chip 151,153,155 and interval can be accurately controlled.
The LED module of chip array as described above with different wave length LED is not limited to the composition of above-described embodiment
And drive manner.Above-described embodiment can with by selectively combine each embodiment all or part of and carry out a variety of
The mode of deformation is constituted.
[the third LED module manufacturing technology]
Referring to Fig.1 3, the manufacturing method of LED module includes: flip chip (Chip On Film) production (or preparation) step
S1, wherein above-mentioned flip chip include that there is the chip of bonding force to keep film and be bonded in multiple on said chip holding film
LED chip;Chip picks up step S2, the chip maintaining part transfer LED chip with bonding force to carrier band (carrier tape);
Chip moving step S3 brings mobile LED chip by the way that movement is above-mentioned;Chip places step S4, from above-mentioned carrier band to substrate
(especially circuit board or AM active-matrix substrate) shifts LED chip.
Said chip pickup step S2, chip moving step S3 and chip placement step S4 are devoted to will be following
The chip array device of introduction is simultaneously successively performed, and is held in advance before the chip array technique using chip array device
Row flip chip making step S1.
As shown in Figure 14 and Figure 15, above-mentioned flip chip making step S1 includes keeping film 2 in the chip with adhesiveness
On with it is certain arrangement attachment pre-production multiple flip chip bonding direct type LED chip 1 the step of.Above-mentioned LED chip 1 includes: the bottom of at
Face has the emitting semiconductor portion 10 of two regions 1a, 1b distinguishing by segment difference;Be respectively formed at above-mentioned two region 1a,
The first conductive type electrode pad 112 and the second conductive type electrode pad 142 of 1b.Above-mentioned emitting semiconductor portion 10 includes substrate base
Plate 11, the first conductive type semiconductor layer 12, active layer 13 and the second conductive type semiconductor layer 14.Basal substrate 11 can be including
The sapphire of the outer layer growth of above-mentioned the first conductive type semiconductor layer 12, active layer 13 and the second conductive type semiconductor layer 14 is raw
Long substrate, or can be the supporting substrates for being attached with epitaxial layer.Above-mentioned segment difference is formed as above-mentioned the first conductive type semiconductor layer
12 and the exposed region of the second conductive type semiconductor layer 14 be formed on bottom surface, and the formation of the first conductive type electrode pad 112
Exposed region 1a in 12 side of the first conductive type semiconductor layer, the second conductive type electrode pad 142 are formed in the second conductive type half
The exposed region 1b of 14 side of conductor layer.
Above-mentioned 1 array of multiple LED chips at, make above-mentioned the first conductive type electrode pad 112 and above-mentioned the second conductive type electricity
Pole pad 142 is joined to downwards the adhesive surface that chip keeps film 2.Said chip holding film 2 is configured to its adhesiveness and passes through UV light
It irradiates and weakens.Therefore, it keeps the specific region on film 2 to irradiate UV light in said chip, opposite can weaken the specific region
Adhesiveness.
On the other hand, as shown in Figure 14 to Figure 18, said chip picks up step S2, chip moving step S3 and chip
Placing step S4 can be successively performed by chip array device, and wherein the chip array device includes 3, pick-up table of carrier band
210, photomask 220, film expose with UV scanning group 230, pick-up roller 240, place roller 260 and with exposure UV light source 250.
Referring to Fig.1 4, it is picked up in step S1 in said chip, keeps film 2 and battle array including the chip adhesive with bonding force
The flip chip c1 for being listed in multiple LED chips 1 thereon is arranged in pick-up table 210.At this point, chip keeps the LED core on film 2
Chip arrays spacing (pitch) is set as different from the spacing of the LED chip array on the substrate 5 as final goal.In other words
It says, relative to LED chip quantity (the i.e. electrode in the LED chip array on the substrate 5 (7 and Figure 18 referring to Fig.1) of final goal
Pair quantity), chip keep film 2 on above-mentioned LED chip array in LED chip quantity be set as 1:n (1 or more from
So number).Chip keeps being attached with the LED chip 1 for being equivalent to and being arranged on substrate 5 (7 and Figure 18 referring to Fig.1) in film 2 as a result,
The LED chip 1 of n times of quantity, and one can be optionally sequestered from the LED chip 1 being attached on chip holding film 2
Divide LED chip 1 and is attached on substrate 5.Here, substrate 5 can be the substrate for being formed with circuit, more specifically, can be AM
Substrate (Active Matrix substrate).
After the UV transmission upper plate 211 of pick-up table 210 is arranged in flip chip c1, in order to keep film 2 selections simultaneously from chip
The LED chip 1 of specific position is picked up, executes and is only selected accompanying by specific LED chip 1 in each region that chip keeps film 2
Region to weaken bonding force the step of.For this purpose, using the photomask 220 and film that are located at immediately below above-mentioned UV transmission upper plate 211
Exposure UV scanning group 230, and multiple UV transmissive windows 222 are formed in photomask 220.
Film exposure uses UV scanning group 230 to include film exposure UV light source 234 and uses UV light source 234 for exposing film
It is moved to the light source moving portion 232 in multiple UV transmissive windows 222 corresponding to the position of certain UV transmissive window 222.Positioned at certain UV
The UV light source 234 of the underface of transmissive window 222, which is executed, to be kept by UV transmissive window 222 to the chip for being attached with specific LED chip 1
The UV exposure of the specific region irradiation UV of film 2, and exposed by the UV, film 2 is kept for the chip of specific LED chip 1
Bonding force is weakened.Multiple UV transmissive windows 222 can be arranged in X-direction and perpendicular Y direction, and above-mentioned light source is mobile
It portion 232 can be to X-direction and the mobile above-mentioned UV light source 234 of Y direction.
While weakening the bonding force for the chip holding film 2 of the LED chip 1 as above selected, pick-up roller 240 is unidirectionally rolled
Carrier band 3 is simultaneously pressed the LED chip 1 in above-mentioned selection by dynamic rotation, and the LED chip 1 of above-mentioned selection is attached to above-mentioned carrier band
3.The rolling of pick-up roller 240 can be realized by the translational motion of the pick-up roller 240 itself of rotation, can also pass through pick-up roller
240 during being rotated on its position the translational motion of pick-up table 210 realize.
The chip for being exposed to UV light keeps a region of film 2, i.e. the bonding force of bonding force relief regions is less than carrier band 3
Bonding force, therefore, the LED chip 1 of above-mentioned selection are attached to carrier band 3.Even if chip keeps the specific LED chip array on film 2
Interior all LED chips 1 touch carrier band 3 by the pressing of the rolling rotation of pick-up roller 240, and only chip keeps film 2
Weakening the LED chip 1 in the region of bonding force in region by UV exposure, i.e. the LED chip of selection is attached to carrier band 3, and
Remaining LED chip 1, that is, the LED chip 1 being not exposed in the non-relief regions of bonding force of UV light are then retained in chip and keep film
2.Being retained in chip keeps the LED chip 1 of film 2 that can pick up step by other chips in the subsequent technique executed repeatedly
Suddenly, film 2 is kept to separate from chip.
On the other hand, pick-up roller 240 has tilting blanket 242 flexible in the peripheral side of the roller main body 241 in conjunction with axis
(blanket), it better adheres to LED chip 1 on carrier band 3, and also prevents the LED chip as caused by pressure
1 damage.
By light source moving portion 232 along X-axis or Y direction moving film exposure UV light source 234, so that film exposes UV light
The adhering zone of the UV transmissive window 222 and the LED chip 1 to be picked up of source 234 and photomask 220 is in virtually same always
On line, to select the LED chip 1 to be picked up.By mode as above, chip is kept in the specific LED chip array on film 1
1 spacing of LED chip and the spacing for the electrode pair being equipped on the substrate of LED chip become different, and chip is kept on film 2 as a result,
Specific LED chip array in LED chip arrangement ratio: the arrangement of electrode of substrate pair is than (i.e. as on the substrate of target
LED chip array LED chip arranges ratio) become n:1.(placing is picked up and placed in such a case, it is possible to repeat n and return
down)。
Referring next to Figure 16, chip moving step S3 is executed by the one-way flow of the carrier band 3 of pickup LED chip 1.It carries
Band 3 has defined bonding force to LED chip 1.Also, above-mentioned carrier band 3 passes through the shifting such as feed roller (feed roller) and guide reel
It starts section, to adhere to and keep the state of LED chip 1 to be moved.It can be set with exposure UV light source 250 in carrier band 3
It among flow path or places near roller 260, which can weaken carrier band 3 by irradiating UV light to carrier band 3 with whole
Bonding force.
7 and Figure 18 referring to Fig.1 places roller 260 and a pair is convex in a region of the carrier band 1 for being attached with LED chip 1
Point 5a, 5b is moved between preformed substrate 5.It is set in advance at this point, the bonding force for being exposed to the carrier band 3 of UV light is less than
In the bonding force of the adhesive on substrate 5 (more specifically, a pair of of salient point 5a, 5b).Place the LED that roller 260 will be attached to carrier band 3
Chip 1 is rolled in a manner of pressing to be rotated on substrate 5, more specifically, rolling a pair of of salient point 5a, the 5b rotated on substrate 5
On, so that LED chip 1 is attached on substrate 5.Roller 260 is placed to be provided on the peripheral side of the roller main body 261 in conjunction with axis
Flexible tilting blanket 262 (blanket) places LED chip 1 preferably by placing the rolling rotation of roller, and can
The damage of LED chip 1 caused by pressure when preventing as rolling rotation.The LED chip 1 placed on the substrate 5 can pass through
Solder reflow process is welded on 1 on substrate.
Figure 19, Figure 20 a and Figure 20 b are the LED cores that the LED chip for transferring more entirely is picked up and selectively transferred
The figure that piece picks up.
Referring to Fig.1 9, when picking up mode using the LED chip transferred entirely, chip can successively be pressed by pick-up roller 240
It keeps all LED chips 1 in the respective array a1 on film 2 and one is shifted and is attached in transfer belt 3 with not leaking.At this point, core
On the substrate that piece keeps the spacing of the LED chip 1 in the respective array a1 on film 2 and the LED chip 1 to be transferred in array
Spacing is identical, and chip keeps the quantity of the LED chip array of film 2 and substrate arrangement to liken to 1:1.
On the other hand, referring to Figure 20 a and Figure 20 b, when picking up mode using the LED chip selectively transferred, even if passing through
The rolling of pick-up roller 260 rotates to press all LED chips 1 in array a1, is also only covered using UV scanning group 230 and light
The LED chip 1 that film 220 is selected and reduces the region of the bonding force of chip holding film 2 is picked transfer belt 3.
As illustrated in fig. 20, the LED chip 1 in an array a1 can be picked up with 1 pick-up operation, such as Figure 20 b institute
Show, the LED chip 1 in more than two array a1, a2 can also be picked up simultaneously with 1 pick-up operation.Although also, not scheming
Show, the present invention can be advantageously used for selectively picking up and protect in addition to being attached to chip with the complex pattern other than matrix arrangement
Hold the LED chip 1 on film 2.
Claims (20)
1. a kind of manufacturing method of LED module characterized by comprising
Chip carrier manufacture craft, production include having the chip maintaining part of horizontal adhesive surface and in the chip maintaining part
Adhesive surface bonded-electrode pad multiple LED chips chip carrier;
Transfer printing process is transferred to by certain arrangement positioned at other positions from the chip maintaining part by the multiple LED chip
Substrate,
Wherein, the transfer printing process includes:
The transfer belt is regionally exposed in the light for weakening the bonding force of transfer belt by first time step of exposure, thus with
Specified interval forms adhesion area in the transfer belt;And
Chip picks up step, and the transfer belt is pressed the LED chip in the chip maintaining part, so that each described
While LED chip is attached to each of the transfer belt adhesion area, from the chip holding part from the LED core
The electrode pad of piece.
2. the manufacturing method of LED module according to claim 1, which is characterized in that
In the first time step of exposure, by using the photomask for being formed with multiple light-transmissive windows, the light is passed light through
Transmissive window and be exposed to the transfer belt.
3. the manufacturing method of LED module according to claim 1, which is characterized in that after the chip picks up step, also wrap
It includes:
Second of step of exposure, it is whole to weaken the bonding force for being attached with the transfer belt of the LED chip;
Step is placed, the transfer belt that multiple LED chips are integrally weakened from bonding force is transferred to the substrate.
4. the manufacturing method of LED module according to claim 1, which is characterized in that
It picks up in step in the chip, the transfer belt is pressed into the chip by the pick-up roller that single roll rotates
On the LED chip bonded in maintaining part.
5. the manufacturing method of LED module according to claim 3, which is characterized in that
In the placement step, the LED chip for being attached to the transfer belt is pressed into the substrate using roller is placed
On, so that the electrode pad of the LED chip is attached to a pair of of the salient point being pre-formed on the substrate.
6. the manufacturing method of LED module according to claim 5, which is characterized in that
In the placement step, the bonding force of the transfer belt is less than the bonding for being previously placed in the adhesive of the pair of salient point
Power.
7. the manufacturing method of LED module according to claim 1, which is characterized in that
The chip carrier manufacture craft includes: to prepare have the step of chip maintaining part of horizontal adhesive surface;Prepare multiple
The step of LED chip;And the multiple LED chip is bonded on the adhesive surface, so that constituting more than one LED chip
The chip attachment steps of array,
Wherein, in the preparation multiple LED chips the step of, prepare n-type electrode pad and p-type electrode pad extends downwardly
The n-type electrode pad and the p-type electrode pad are directly bonded to by multiple LED chips in the chip attachment steps
The adhesive surface.
8. the manufacturing method of LED module according to claim 7, which is characterized in that
In the chip attachment steps, the multiple LED chip is attached to the adhesive surface, so that the chip maintaining part
On the LED chip array in spacing be to be transferred to by the transfer printing process in the LED chip array of the substrate
1/n times of spacing, wherein n is greater than 1 natural number,
Wherein, the spacing is the center at the center of a LED chip and another LED chip in two adjacent LED chips
Between horizontal distance.
9. a kind of LED module characterized by comprising
Multiple LED chips, one side have electrode pad, and the other side has the face contacted with transfer belt, and the core from outside
The transfer of piece maintaining part and forming array;And
Substrate has multiple salient points with the electrode pad face-down bonding,
Wherein, the transfer belt by from external irradiation to the other side of the LED chip first time light and be divided into exposure
Region and non exposed region, the LED chip bond and pick up the non exposed region as adhesion area.
10. LED module according to claim 9, which is characterized in that
The adhesion area of the transfer belt by from the external irradiation to the other side of the LED chip second of light and
Bonding force is lowered, so that separating with the LED chip.
11. LED module according to claim 9, which is characterized in that
The adhesion area of the transfer belt is not exposed to by photomask from the external irradiation to the LED chip
The other side first time light region.
12. LED module according to claim 9, which is characterized in that
When carrying out the pickup, the transfer belt is pressed into the LED chip and rotating roller using rod, to pick up LED chip.
13. LED module according to claim 10, which is characterized in that
After the LED chip is aligned with the riding position on the substrate, divided by the pressing rotation of roller from the transfer belt
From.
14. LED module according to claim 9, which is characterized in that
The chip maintaining part includes horizontal adhesive surface, and each electrode pad of the side of the multiple LED chip to
Lower extension is simultaneously directly bonded to the chip maintaining part.
15. LED module according to claim 14, which is characterized in that
On the basis of the adhesive surface of the chip maintaining part, the multiple LED chip all has identical height.
16. LED module according to claim 9, which is characterized in that
The spacing in the LED chip array in the chip maintaining part is transferred in the LED chip array of the substrate
1/n times of spacing, wherein n is greater than 1 natural number,
Wherein, the spacing is the center at the center of a LED chip and another LED chip in two adjacent LED chips
Between horizontal distance.
17. LED module according to claim 9, which is characterized in that
The bonding force of the chip maintaining part is less than the bonding force of the non exposed region of the transfer belt, and is greater than described
The bonding force of the exposed region of transfer belt.
18. LED module according to claim 9, which is characterized in that
The chip maintaining part forming array the multiple LED chip all only by identical LED chip manufacturing process
And the LED chip of red LED chips, green LED chip or any class in blue LED die manufactured is constituted.
19. LED module according to claim 9, which is characterized in that
It include red LED chips, green LED chip and indigo plant in the multiple LED chip of the chip maintaining part forming array
Color LED chip.
20. LED module according to claim 9, which is characterized in that
The chip maintaining part is that have film flexible.
Applications Claiming Priority (11)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2016-0102239 | 2016-08-11 | ||
KR20160102239 | 2016-08-11 | ||
KR10-2016-0157045 | 2016-11-24 | ||
KR1020160157045A KR20180018246A (en) | 2016-08-11 | 2016-11-24 | Display module comprising an array of led chip groups |
KR1020170030395A KR20180103441A (en) | 2017-03-10 | 2017-03-10 | method for making LED module using selective transfer printing |
KR10-2017-0030395 | 2017-03-10 | ||
KR1020170032955A KR20180105803A (en) | 2017-03-16 | 2017-03-16 | method for fabricating LED module |
KR10-2017-0032955 | 2017-03-16 | ||
KR1020170032900A KR20180105782A (en) | 2017-03-16 | 2017-03-16 | chip on carrier for fabricating LED module and method for making the same |
KR10-2017-0032900 | 2017-03-16 | ||
PCT/KR2017/008269 WO2018030695A1 (en) | 2016-08-11 | 2017-08-01 | Led module and method for preparing same |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109314126A true CN109314126A (en) | 2019-02-05 |
Family
ID=65225717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201780035169.2A Pending CN109314126A (en) | 2016-08-11 | 2017-08-01 | LED module and its manufacturing method |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN109314126A (en) |
DE (1) | DE112017004029T5 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110034224A (en) * | 2019-04-26 | 2019-07-19 | 中国科学院长春光学精密机械与物理研究所 | A kind of transfer method based on bar shaped Micro-LED |
CN110098289A (en) * | 2019-05-07 | 2019-08-06 | 京东方科技集团股份有限公司 | A kind of production method of transfer device and display base plate |
CN113809114A (en) * | 2021-09-13 | 2021-12-17 | 深圳市洲明科技股份有限公司 | Manufacturing method of LED display module and LED display module |
US11955506B2 (en) | 2020-07-27 | 2024-04-09 | Au Optronics Corporation | Fabrication method of display device |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102019118270B4 (en) * | 2019-07-05 | 2021-10-07 | X-Fab Semiconductor Foundries Gmbh | Process for the production of semiconductor components to increase the yield in microtransfer printing |
CN113410344A (en) * | 2020-03-16 | 2021-09-17 | 重庆康佳光电技术研究院有限公司 | LED chip set, display screen and manufacturing method thereof |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002280613A (en) * | 2001-03-19 | 2002-09-27 | Matsushita Electric Ind Co Ltd | Method and member for manufacturing illuminating device |
CN1447958A (en) * | 2000-07-18 | 2003-10-08 | 索尼株式会社 | Image display unit and prodn. method for image display unit |
JP2003332184A (en) * | 2002-05-13 | 2003-11-21 | Sony Corp | Element transferring method |
JP2003332523A (en) * | 2002-05-17 | 2003-11-21 | Sony Corp | Transferring method and arraying method for element, and manufacturing method for image display device |
US6694707B2 (en) * | 2000-08-04 | 2004-02-24 | Infineon Technologies Ag | Apparatus and method for populating transport tapes |
CN105129259A (en) * | 2015-05-15 | 2015-12-09 | 友达光电股份有限公司 | Method for transmitting micro-assembly and method for manufacturing display panel |
-
2017
- 2017-08-01 CN CN201780035169.2A patent/CN109314126A/en active Pending
- 2017-08-01 DE DE112017004029.9T patent/DE112017004029T5/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1447958A (en) * | 2000-07-18 | 2003-10-08 | 索尼株式会社 | Image display unit and prodn. method for image display unit |
US6694707B2 (en) * | 2000-08-04 | 2004-02-24 | Infineon Technologies Ag | Apparatus and method for populating transport tapes |
JP2002280613A (en) * | 2001-03-19 | 2002-09-27 | Matsushita Electric Ind Co Ltd | Method and member for manufacturing illuminating device |
JP2003332184A (en) * | 2002-05-13 | 2003-11-21 | Sony Corp | Element transferring method |
JP2003332523A (en) * | 2002-05-17 | 2003-11-21 | Sony Corp | Transferring method and arraying method for element, and manufacturing method for image display device |
CN105129259A (en) * | 2015-05-15 | 2015-12-09 | 友达光电股份有限公司 | Method for transmitting micro-assembly and method for manufacturing display panel |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110034224A (en) * | 2019-04-26 | 2019-07-19 | 中国科学院长春光学精密机械与物理研究所 | A kind of transfer method based on bar shaped Micro-LED |
CN110098289A (en) * | 2019-05-07 | 2019-08-06 | 京东方科技集团股份有限公司 | A kind of production method of transfer device and display base plate |
US11955506B2 (en) | 2020-07-27 | 2024-04-09 | Au Optronics Corporation | Fabrication method of display device |
CN113809114A (en) * | 2021-09-13 | 2021-12-17 | 深圳市洲明科技股份有限公司 | Manufacturing method of LED display module and LED display module |
Also Published As
Publication number | Publication date |
---|---|
DE112017004029T5 (en) | 2019-05-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10756070B2 (en) | LED module and method for fabricating the same | |
CN109314126A (en) | LED module and its manufacturing method | |
JP6170232B1 (en) | Display module including an array of LED chip groups and manufacturing method thereof | |
KR20180105803A (en) | method for fabricating LED module | |
CN101989573A (en) | Method for manufacturing semiconductor light emitting device | |
JP4450067B2 (en) | Electronic component, method for manufacturing the same, and image display apparatus using the same | |
JP2002344011A (en) | Display element and display unit using the same | |
CN213878148U (en) | Display panel and display device | |
KR20180018246A (en) | Display module comprising an array of led chip groups | |
JP4120223B2 (en) | Electronic component manufacturing method and image display apparatus using the same | |
KR20210116456A (en) | Light emitting element transfer method for display and display device | |
CN109390368B (en) | Micro-display device, preparation method thereof and display panel | |
JP2022093393A (en) | Display panel and method for manufacturing display panel | |
TWI685987B (en) | Micro-die module transfer method | |
JP4182661B2 (en) | Image display device and manufacturing method thereof | |
JP2003005674A (en) | Display element and image display device | |
KR20180105782A (en) | chip on carrier for fabricating LED module and method for making the same | |
WO2020175819A1 (en) | Micro led transfer method and display device using same | |
CN114256399A (en) | Red light LED assembly, display panel and preparation method | |
CN114744005A (en) | Chip structure with paramagnetic light-emitting component and manufacturing method thereof | |
CN113948502A (en) | LED chip, preparation method thereof and preparation method of LED display module | |
KR20200007739A (en) | Light emitting element and method for manufacturing the same | |
KR20190037931A (en) | Led display apparatus and method for fabricating the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20190205 |
|
WD01 | Invention patent application deemed withdrawn after publication |