CN109313616B - 异步反馈训练 - Google Patents

异步反馈训练 Download PDF

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Publication number
CN109313616B
CN109313616B CN201680085672.4A CN201680085672A CN109313616B CN 109313616 B CN109313616 B CN 109313616B CN 201680085672 A CN201680085672 A CN 201680085672A CN 109313616 B CN109313616 B CN 109313616B
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CN
China
Prior art keywords
transmitter
receiver
supercycle
training sequence
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201680085672.4A
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English (en)
Chinese (zh)
Other versions
CN109313616A (zh
Inventor
斯坦利·艾姆斯·小拉基
达蒙·托希迪
格拉德·R·塔尔伯特
爱德华多·普莱特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ATI Technologies ULC
Advanced Micro Devices Inc
Original Assignee
ATI Technologies ULC
Advanced Micro Devices Inc
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Filing date
Publication date
Application filed by ATI Technologies ULC, Advanced Micro Devices Inc filed Critical ATI Technologies ULC
Publication of CN109313616A publication Critical patent/CN109313616A/zh
Application granted granted Critical
Publication of CN109313616B publication Critical patent/CN109313616B/zh
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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1689—Synchronisation and timing concerns
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0072—Error control for data other than payload data, e.g. control data
    • H04L1/0073—Special arrangements for feedback channel
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H04L1/242—Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H04L1/244—Testing correct operation by comparing a transmitted test signal with a locally generated replica test sequence generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/0033—Correction by delay
    • H04L7/0037—Delay of clock signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/043—Pseudo-noise [PN] codes variable during transmission

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Quality & Reliability (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Memory System (AREA)
  • Communication Control (AREA)
CN201680085672.4A 2016-06-23 2016-09-08 异步反馈训练 Active CN109313616B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/191,322 2016-06-23
US15/191,322 US10103837B2 (en) 2016-06-23 2016-06-23 Asynchronous feedback training
PCT/US2016/050591 WO2017222576A1 (en) 2016-06-23 2016-09-08 Asynchronous feedback training

Publications (2)

Publication Number Publication Date
CN109313616A CN109313616A (zh) 2019-02-05
CN109313616B true CN109313616B (zh) 2024-03-29

Family

ID=60678079

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680085672.4A Active CN109313616B (zh) 2016-06-23 2016-09-08 异步反馈训练

Country Status (5)

Country Link
US (1) US10103837B2 (enExample)
JP (1) JP6725692B2 (enExample)
KR (1) KR102429405B1 (enExample)
CN (1) CN109313616B (enExample)
WO (1) WO2017222576A1 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10541841B1 (en) * 2018-09-13 2020-01-21 Advanced Micro Devices, Inc. Hardware transmit equalization for high speed

Citations (10)

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CA2432751A1 (en) * 2003-06-20 2004-12-20 Emanoil Maciu Enhanced method and apparatus for integrated alarm monitoring system based on sound related events
CN1902596A (zh) * 2003-12-31 2007-01-24 英特尔公司 串行点到点链路的可编程测量模式
CN101626352A (zh) * 2008-07-07 2010-01-13 英特尔公司 带有恒定误比特率的高速链路的可调整发射器功率
US7802153B1 (en) * 2006-12-07 2010-09-21 3Par, Inc. Trainable link
CN102577161A (zh) * 2009-10-23 2012-07-11 马维尔国际贸易有限公司 用于wlan的训练序列指示
CN104335197A (zh) * 2012-05-22 2015-02-04 超威半导体公司 用于存储器访问延迟训练的方法和装置
CN104737147A (zh) * 2012-10-22 2015-06-24 英特尔公司 高性能互连物理层
CN105122720A (zh) * 2013-02-21 2015-12-02 高通股份有限公司 用于在10gbase-t系统中数据辅助定时恢复的方法和装置
CN105677572A (zh) * 2016-02-04 2016-06-15 华中科技大学 基于自组织映射模型云软件性能异常错误诊断方法与系统
CN105706069A (zh) * 2013-09-04 2016-06-22 英特尔公司 用于未匹配信号接收器的周期训练

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US6141765A (en) * 1997-05-19 2000-10-31 Gigabus, Inc. Low power, high speed communications bus
US6292911B1 (en) * 1998-12-17 2001-09-18 Cirrus Logic, Inc. Error detection scheme for a high-speed data channel
US7519874B2 (en) * 2002-09-30 2009-04-14 Lecroy Corporation Method and apparatus for bit error rate analysis
KR100543925B1 (ko) * 2003-06-27 2006-01-23 주식회사 하이닉스반도체 지연 고정 루프 및 지연 고정 루프에서의 클럭 지연 고정방법
US7072355B2 (en) 2003-08-21 2006-07-04 Rambus, Inc. Periodic interface calibration for high speed communication
US7404115B2 (en) * 2004-02-12 2008-07-22 International Business Machines Corporation Self-synchronising bit error analyser and circuit
US7836386B2 (en) * 2006-09-27 2010-11-16 Qimonda Ag Phase shift adjusting method and circuit
US8065597B1 (en) * 2007-07-06 2011-11-22 Oracle America, Inc. Self test of plesiochronous interconnect
US20110040902A1 (en) 2009-08-13 2011-02-17 Housty Oswin E Compensation engine for training double data rate delays
US8681839B2 (en) * 2010-10-27 2014-03-25 International Business Machines Corporation Calibration of multiple parallel data communications lines for high skew conditions
JP2013034133A (ja) * 2011-08-02 2013-02-14 Fujitsu Ltd 送信装置、送受信システムおよび制御方法
US9413497B2 (en) * 2013-03-07 2016-08-09 Viavi Solutions Deutschland Gmbh Bit error pattern analyzer and method
GB2542148B (en) * 2015-09-09 2019-12-04 Imagination Tech Ltd Synchronising devices
US9710329B2 (en) * 2015-09-30 2017-07-18 Sandisk Technologies Llc Error correction based on historical bit error data

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2432751A1 (en) * 2003-06-20 2004-12-20 Emanoil Maciu Enhanced method and apparatus for integrated alarm monitoring system based on sound related events
CN1902596A (zh) * 2003-12-31 2007-01-24 英特尔公司 串行点到点链路的可编程测量模式
US7802153B1 (en) * 2006-12-07 2010-09-21 3Par, Inc. Trainable link
CN101626352A (zh) * 2008-07-07 2010-01-13 英特尔公司 带有恒定误比特率的高速链路的可调整发射器功率
CN102577161A (zh) * 2009-10-23 2012-07-11 马维尔国际贸易有限公司 用于wlan的训练序列指示
CN104335197A (zh) * 2012-05-22 2015-02-04 超威半导体公司 用于存储器访问延迟训练的方法和装置
CN104737147A (zh) * 2012-10-22 2015-06-24 英特尔公司 高性能互连物理层
CN105122720A (zh) * 2013-02-21 2015-12-02 高通股份有限公司 用于在10gbase-t系统中数据辅助定时恢复的方法和装置
CN105706069A (zh) * 2013-09-04 2016-06-22 英特尔公司 用于未匹配信号接收器的周期训练
CN105677572A (zh) * 2016-02-04 2016-06-15 华中科技大学 基于自组织映射模型云软件性能异常错误诊断方法与系统

Also Published As

Publication number Publication date
US20170373788A1 (en) 2017-12-28
JP6725692B2 (ja) 2020-07-22
JP2019519029A (ja) 2019-07-04
CN109313616A (zh) 2019-02-05
US10103837B2 (en) 2018-10-16
WO2017222576A1 (en) 2017-12-28
KR20190012158A (ko) 2019-02-08
KR102429405B1 (ko) 2022-08-05

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