CN109300773A - The surface treatment method of wafer - Google Patents
The surface treatment method of wafer Download PDFInfo
- Publication number
- CN109300773A CN109300773A CN201810927558.2A CN201810927558A CN109300773A CN 109300773 A CN109300773 A CN 109300773A CN 201810927558 A CN201810927558 A CN 201810927558A CN 109300773 A CN109300773 A CN 109300773A
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- Prior art keywords
- wafer
- charge
- treatment method
- accumulation
- surface treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
Abstract
The invention discloses a kind of surface treatment method of wafer, include the following steps: that accumulation has charge on the surface of wafer Step 1: providing a wafer；Step 2: the surface to wafer carries out lighting process, the charge of crystal column surface accumulation is reduced or eliminated by lighting process；Step 3: the front to wafer eliminates in chemical solution treatment process in wafer front the characteristics of carrying out chemical solution processing, be reduced or eliminated using the charge that crystal column surface described after lighting process accumulates forms defect.The present invention can eliminate or reduce the charge of wafer frontside accumulation before the front chemical solution processing for carrying out wafer, so as to the defect for preventing the high energy reaction for building up charge and chemical solution in chemical solution treatment process and thereby elimination is formed by high energy reaction, so as to improve the yield of product, the present invention also has the characteristics that process costs are low.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit manufacture methods, more particularly to a kind of surface treatment side of wafer
Method.
Background technique
It is the device junction composition in each step of the surface treatment method of existing wafer as shown in Figure 1A to Fig. 1 D, it is existing
Method
It is the device junction composition in each step of existing method, the cleaning method of existing wafer 101 as shown in Figure 1A to Fig. 1 D
Include the following steps:
Step 1: as shown in Figure 1A, providing a wafer 101.In general, the wafer 101 is made of monocrystalline substrate disk.
It is formed with silicon dioxide layer 102 in the front face surface of the wafer 101, accumulation has first to lead in the silicon dioxide layer 102
Electric type charge 103；Alternatively, the front face surface in the wafer 101 is formed with silicon nitride layer, accumulated on the silicon nitride layer
There is the first conduction type charge 103.Alternatively, the front face surface in the wafer 101 is formed with silica and silicon nitride layer
Superimposed layer, accumulation has the first conduction type charge 103 on the superimposed layer.
As shown in Figure 1B, on the surface of the wafer 101, accumulation has charge 103, and charge 103 can be to the wafer 101
Cause certain deformation in front.In Figure 1B, charge 103 be negative electrical charge, the wafer 101 surface accumulation charge 103 be
It is generated in coating process such as rotary plating (Spin coating) technique.
Step 2: as shown in Figure 1 C, carrying out chemical solution processing to the front of the wafer 101, chemical solution processing is logical
It is often the chemical cleaning processing of the remaining impurity in front for removing the wafer 101.
In Fig. 1 C, label 104 corresponds to the source of supply of the chemical solution of chemical solution processing, and label 105 corresponds to
The jet path of chemical solution, chemical solution from be passed into source of supply 104 in jet path 105 and from jet path 105 spray
It is mapped to the front of the wafer 101.
For example, for the chemical solution that chemical cleaning handles the corresponding chemical solution processing is cleaning solution, cleaning
Liquid generallys use arbon dioxide solution (CO2Water, CO2W).
But as shown in figure iD, in chemical solution treatment process, at the meeting of charge 103 of accumulation and the chemical solution
The chemical solution of reason generates high energy reaction and forms defect 106.
Summary of the invention
Technical problem to be solved by the invention is to provide a kind of surface treatment methods of wafer, can eliminate the front of wafer
The defect due to caused by electric charge accumulation effect, so as to improve the yield of product.
In order to solve the above technical problems, the surface treatment method of wafer provided by the invention includes the following steps:
Step 1: providing a wafer, on the surface of the wafer, accumulation has charge.
Step 2: the surface to the wafer carries out lighting process, the crystalline substance is reduced or eliminated by the lighting process
The charge of circular surfaces accumulation.
Step 3: the front to the wafer carries out chemical solution processing, wafer table described after the lighting process is utilized
The front that the characteristics of tired charge of area is reduced or eliminated eliminates in the chemical solution treatment process in the wafer is formed
Defect.
A further improvement is that the wafer is made of monocrystalline substrate disk.
A further improvement is that the front face surface in the wafer is formed with silicon dioxide layer, in the silicon dioxide layer
Upper accumulation has charge.
A further improvement is that the front face surface in the wafer is formed with silicon nitride layer, the product on the silicon nitride layer
It is tired to have charge.
A further improvement is that the front face surface in the wafer is formed with the superposition of silicon dioxide layer and silicon nitride layer
Layer, accumulation has charge on the superimposed layer.
A further improvement is that the charge that the surface of the wafer accumulates is negative electrical charge；Alternatively, the surface area of the wafer
Tired charge is positive charge.
A further improvement is that the charge that the surface of wafer described in step 1 accumulates generates in coating process.
A further improvement is that the light of the lighting process in step 2 uses ultraviolet.
A further improvement is that the lighting process in step 2 uses pulsed lighting process.
A further improvement is that the chemical solution processing in step 3 is that chemical cleaning is handled.
For wafer surface would generally stored charge, charge accumulated can be generated such as in coating process, and for crystalline substance
Circular surfaces have the technical issues of generating high energy reaction formation defect when charge accumulated with chemical solution, and the present invention is to technical side
Case has done special design, mainly increases at a step lighting process such as ultraviolet illumination before carrying out chemical solution processing
Reason, lighting process can be reduced or eliminate the charge of crystal column surface accumulation, so as to eliminate product in the processing of subsequent chemical solution
Tired charge and chemical solution generated high energy reaction and and then elimination defect as caused by high energy reaction when contacting.
In addition, the present invention only need to increase by a step lighting process before the wet chemical prerinse for carrying out wafer frontside
It realizes, so simple process of the invention, cost is relatively low.
Detailed description of the invention
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:
Figure 1A-Fig. 1 D is the device junction composition in each step of the surface treatment method of existing wafer；
Fig. 2 is the flow chart of present invention method；
Fig. 3 A- Fig. 3 E is the device junction composition in each step of present invention method.
Specific embodiment
As shown in Fig. 2, being the flow chart of present invention method；It is the embodiment of the present invention as shown in Fig. 3 A to Fig. 3 E
Device junction composition in each step of method, the surface treatment method of wafer of the embodiment of the present invention 1 include the following steps:
Step 1: as shown in Figure 3A, providing a wafer 1；As shown in Figure 3B, on the surface of the wafer 1, accumulation has charge
3。
In general, the wafer 1 is made of monocrystalline substrate disk.Titanium dioxide is formed in the front face surface of the wafer 1
Silicon layer 2, accumulation has charge 3 in the silicon dioxide layer 2.
Alternatively, the front face surface in the wafer 1 is formed with silicon nitride layer, accumulation has charge 3 on the silicon nitride layer.
Alternatively, the front face surface in the wafer 1 is formed with the superimposed layer of silicon dioxide layer 2 and silicon nitride layer, described
Accumulation has charge 3 on superimposed layer.
The charge 3 of the surface accumulation of the wafer 1 is negative electrical charge 3；Alternatively, the charge 3 that the surface of the wafer 1 accumulates is
Positive charge 3.
The charge 3 of the surface accumulation of the wafer 1 generates in coating process.
Step 2: as shown in Figure 3 C, carrying out lighting process to the surface of the wafer 1, being reduced by the lighting process
Or eliminate the charge 3 of 1 surface of the wafer accumulation.
The light of the lighting process uses ultraviolet, and label 4 indicates ultraviolet light source in Fig. 3 C.
The lighting process uses pulsed lighting process.
Step 3: the front to the wafer 1 carries out chemical solution processing, wafer 1 described after the lighting process is utilized
The characteristics of charge 3 of surface accumulation is reduced or eliminated is eliminated in the chemical solution treatment process in the front of the wafer 1
Form defect.
The chemical solution processing is that chemical cleaning is handled.Chemical cleaning handles the change of the corresponding chemical solution processing
Learning solution is cleaning solution, and cleaning solution generallys use arbon dioxide solution.
In the embodiment of the present invention, for wafer 1 surface would generally stored charge 3, electricity can be generated such as in coating process
The accumulation of lotus 3, and there is the skill that can form defect when the accumulation of charge 3 with chemical solution generation high energy reaction for 1 surface of wafer
Art problem, the embodiment of the present invention have done special design to technical solution, mainly increase before carrying out chemical solution processing
One step lighting process such as ultraviolet illumination is handled, and lighting process can be reduced or eliminates the charge 3 that wafer 1 surface accumulates, thus
Generated high energy reaction simultaneously disappears in turn when can eliminate stored charge 3 and chemical solution contact in the processing of subsequent chemical solution
Except the defect as caused by high energy reaction.
In addition, the embodiment of the present invention only need to increase by a step illumination before carrying out the positive wet chemical prerinse of wafer 1
Processing can be realized, so the simple process of the embodiment of the present invention, cost is relatively low.
The present invention has been described in detail through specific embodiments, but these are not constituted to limit of the invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these are also answered
It is considered as protection scope of the present invention.
Claims (10)
1. a kind of surface treatment method of wafer, which comprises the steps of:
Step 1: providing a wafer, on the surface of the wafer, accumulation has charge；
Step 2: the surface to the wafer carries out lighting process, the wafer table is reduced or eliminated by the lighting process
The tired charge of area；
Step 3: the front to the wafer carries out chemical solution processing, crystal column surface described after lighting process product is utilized
The front that the characteristics of tired charge is reduced or eliminated eliminates in the chemical solution treatment process in the wafer forms defect.
2. the surface treatment method of wafer as described in claim 1, it is characterised in that: the wafer is by monocrystalline substrate disk
Composition.
3. the surface treatment method of wafer as claimed in claim 2, it is characterised in that: formed in the front face surface of the wafer
There is silicon dioxide layer, accumulation has charge in the silicon dioxide layer.
4. the surface treatment method of wafer as claimed in claim 2, it is characterised in that: formed in the front face surface of the wafer
There is silicon nitride layer, accumulation has charge on the silicon nitride layer.
5. the surface treatment method of wafer as claimed in claim 2, it is characterised in that: formed in the front face surface of the wafer
There is the superimposed layer of silicon dioxide layer and silicon nitride layer, accumulation has charge on the superimposed layer.
6. the surface treatment method of wafer as described in claim 1, it is characterised in that: the charge of the surface accumulation of the wafer
For negative electrical charge；Alternatively, the charge that the surface of the wafer accumulates is positive charge.
7. the surface treatment method of wafer as claimed in claim 6, it is characterised in that: the surface area of wafer described in step 1
Tired charge generates in coating process.
8. the surface treatment method of wafer as described in claim 1, it is characterised in that: the lighting process in step 2
Light uses ultraviolet.
9. the surface treatment method of wafer as claimed in claim 1 or 8, it is characterised in that: at the illumination in step 2
Reason uses pulsed lighting process.
10. the surface treatment method of wafer as described in claim 1, it is characterised in that: the chemical solution in step 3
Processing is that chemical cleaning is handled.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810927558.2A CN109300773B (en) | 2018-08-15 | 2018-08-15 | Surface treatment method of wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810927558.2A CN109300773B (en) | 2018-08-15 | 2018-08-15 | Surface treatment method of wafer |
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| Publication Number | Publication Date |
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| CN109300773A true CN109300773A (en) | 2019-02-01 |
| CN109300773B CN109300773B (en) | 2021-06-15 |
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| CN201810927558.2A Active CN109300773B (en) | 2018-08-15 | 2018-08-15 | Surface treatment method of wafer |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259443A (en) * | 2020-10-12 | 2021-01-22 | 上海华力集成电路制造有限公司 | Wet cleaning method for wafer |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1649100A (en) * | 2004-07-23 | 2005-08-03 | 王文 | System and its method for high efficiency ozone water cleaning semiconductor wafer |
| CN101752209A (en) * | 2008-12-19 | 2010-06-23 | 中芯国际集成电路制造(上海)有限公司 | Reduce the method and the device thereof of spherical defect |
| CN103311094A (en) * | 2012-03-16 | 2013-09-18 | 中国科学院微电子研究所 | Method for treating surface of wafer |
| CN104392898A (en) * | 2014-10-11 | 2015-03-04 | 北京工业大学 | Method for cleaning passivated GaAs wafer surface |
| CN105448760A (en) * | 2014-08-20 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Method for improving test stability of wafer |
| CN105702563A (en) * | 2016-01-29 | 2016-06-22 | 天水华天科技股份有限公司 | A novel wafer thinning method |
| CN105977172A (en) * | 2016-05-21 | 2016-09-28 | 哈尔滨工业大学 | Auxiliary hand-operated wafer bonding apparatus |
| CN106449682A (en) * | 2016-10-10 | 2017-02-22 | 上海华力微电子有限公司 | Method for reducing white pixel of backside CMOS (Complementary Metal Oxide Semiconductor) image sensor |
-
2018
- 2018-08-15 CN CN201810927558.2A patent/CN109300773B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1649100A (en) * | 2004-07-23 | 2005-08-03 | 王文 | System and its method for high efficiency ozone water cleaning semiconductor wafer |
| CN101752209A (en) * | 2008-12-19 | 2010-06-23 | 中芯国际集成电路制造(上海)有限公司 | Reduce the method and the device thereof of spherical defect |
| CN103311094A (en) * | 2012-03-16 | 2013-09-18 | 中国科学院微电子研究所 | Method for treating surface of wafer |
| CN105448760A (en) * | 2014-08-20 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | Method for improving test stability of wafer |
| CN104392898A (en) * | 2014-10-11 | 2015-03-04 | 北京工业大学 | Method for cleaning passivated GaAs wafer surface |
| CN105702563A (en) * | 2016-01-29 | 2016-06-22 | 天水华天科技股份有限公司 | A novel wafer thinning method |
| CN105977172A (en) * | 2016-05-21 | 2016-09-28 | 哈尔滨工业大学 | Auxiliary hand-operated wafer bonding apparatus |
| CN106449682A (en) * | 2016-10-10 | 2017-02-22 | 上海华力微电子有限公司 | Method for reducing white pixel of backside CMOS (Complementary Metal Oxide Semiconductor) image sensor |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259443A (en) * | 2020-10-12 | 2021-01-22 | 上海华力集成电路制造有限公司 | Wet cleaning method for wafer |
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| CN109300773B (en) | 2021-06-15 |
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