CN109286369A - A kind of voltage controlled oscillator, integrated chip and electronic equipment - Google Patents

A kind of voltage controlled oscillator, integrated chip and electronic equipment Download PDF

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Publication number
CN109286369A
CN109286369A CN201710602561.2A CN201710602561A CN109286369A CN 109286369 A CN109286369 A CN 109286369A CN 201710602561 A CN201710602561 A CN 201710602561A CN 109286369 A CN109286369 A CN 109286369A
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China
Prior art keywords
voltage
current
unit
node
nmos tube
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Granted
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CN201710602561.2A
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CN109286369B (en
Inventor
白效宁
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Gree Electric Appliances Inc of Zhuhai
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Gree Electric Appliances Inc of Zhuhai
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/02Details
    • H03B5/04Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1206Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1237Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
    • H03B5/124Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance

Abstract

The present invention relates to technical field of integrated circuits, more particularly to a kind of voltage controlled oscillator, integrated chip and electronic equipment.The voltage controlled oscillator includes: resistance unit, current lens unit, bias unit and oscillating unit.The first bias voltage that current lens unit is provided in response to bias unit, the voltage bias of the voltage and the third node for being located at third current path that will be located at the first node of the first current path are the first bias voltage.Current lens unit is also used to the resistance value configuration in response to resistance unit, adjusts the third electric current for flowing through third current path, wherein the first electric current for flowing through the first current path is equal to third electric current.Therefore, by configuring the corresponding resistance value of resistance unit, the charge and discharge time that the capacitor of oscillating unit can be adjusted indirectly changes the cycle of oscillation of oscillating unit, and the cycle of oscillation after changing is made to be more nearly desired cycle of oscillation, to improve the precision of cycle of oscillation output.

Description

A kind of voltage controlled oscillator, integrated chip and electronic equipment
Technical field
The present invention relates to technical field of integrated circuits, set more particularly to a kind of voltage controlled oscillator, integrated chip and electronics It is standby.
Background technique
Voltage controlled oscillator (voltage-controlled oscillator, VCO) refers to output frequency and input control voltage There is the oscillating circuit of corresponding relationship, is widely used in electronic equipment.Voltage controlled oscillator includes LC voltage controlled oscillator, the voltage-controlled vibration of RC Swing device and phase noise.
Traditional technology is superimposed a controllable source in annular RC voltage controlled oscillator, to realize output frequency by input control voltage Linear Control.
Inventor in the implementation of the present invention, it is found that existing the relevant technologies have the following problems: since traditional RC is pressed Every grade of oscillating unit of control oscillator is affected by technique, and the transmission delay in every grade of oscillating unit is not easy to estimate It calculates, so that there are biggish errors to the reckoning of cycle of oscillation of voltage controlled oscillator.
Summary of the invention
One purpose of the embodiment of the present invention is intended to provide a kind of voltage controlled oscillator, integrated chip and electronic equipment, solution The certainly traditional technology technical problem not high there is the precision of cycle of oscillation.
In order to solve the above technical problems, the embodiment of the present invention the following technical schemes are provided:
In a first aspect, the embodiment of the present invention provides a kind of voltage controlled oscillator, comprising: resistance unit;Current lens unit, It is connect by the first current path with the resistance unit;Bias unit passes through the second current path and the current mirror list Member connection;Oscillating unit is connect by third current path with the current lens unit;The current lens unit is for responding In the first bias voltage that the bias unit provides, will be located at the voltage of the first node of first current path with Voltage bias positioned at the third node of the third current path is first bias voltage;The current lens unit is also used In the resistance value configuration in response to the resistance unit, the third electric current for flowing through the third current path is adjusted, is adjusted with passing through The charge and discharge time of the capacitor of the oscillating unit changes the cycle of oscillation of the oscillating unit, wherein flows through first electricity First electric current of flow path is equal to the third electric current.
Optionally, the current lens unit includes: current mirroring circuit, and for the input in response to external power supply, output is extremely Few three branch currents;Biasing circuit is connect with the current mirroring circuit, respectively will be one at least three branch currents Branch current is biased to the first electric current and is exported by first current path, will be another at least three branch currents One branch current is biased to the second electric current and is exported by second current path, will be at least three branch currents Another branch current is biased to third electric current and is exported by the third current path again.
Optionally, the oscillating unit includes several grades of annular oscillation circuits, and every grade of annular oscillation circuit includes voltage bias end, voltage The voltage bias end of input terminal and voltage output end, every grade of annular oscillation circuit connects the biased electrical by the third current path The voltage input end on road, rear class annular oscillation circuit is connect with the voltage output end of prime annular oscillation circuit, also, chopped-off head annular oscillation circuit Voltage input end is connect with the voltage output end of final stage annular oscillation circuit.
Optionally, every grade of annular oscillation circuit includes ring vibration unit and capacitor cell, and the ring vibration unit includes first segment Point, second node and third node, the first node are the voltage bias end and are connected by the third current path The current lens unit, the second node be the voltage input end, the third node be the voltage output end and with Capacitor cell connection, wherein the corresponding voltage of the third node is first bias voltage.
Optionally, the capacitor cell includes the adjustable capacitor of capacitance.
Optionally, the current mirroring circuit includes: the first PMOS tube, the second PMOS tube and third PMOS tube, and described first The source electrode of PMOS tube, the second PMOS tube and third PMOS tube is all connected to fourth node, and the fourth node is additionally coupled to External power supply, the grid of first PMOS tube, the second PMOS tube and third PMOS tube are all connected to the 5th node, and described first The drain electrode of PMOS tube is additionally coupled to the 5th node;The biasing circuit includes: the first NMOS tube, the second NMOS tube and third NMOS tube, the drain electrode of first NMOS tube are connected to the 5th node, the drain electrode of second PMOS tube, described first The grid of the grid of NMOS tube, the drain electrode of the second NMOS tube and grid, the third NMOS tube is all connected to the 6th node, described The drain electrode of third PMOS tube is connected to the drain electrode of the third NMOS tube, the source electrode and the resistance unit of first NMOS tube Connection, the source electrode of second NMOS tube are connect with the bias unit, and the source electrode of the third NMOS tube and the oscillation are single Member connection;Ratio between the breadth length ratio of first PMOS tube and the breadth length ratio of first NMOS tube is the first ratio value; Ratio between the breadth length ratio of second PMOS tube and the breadth length ratio of second NMOS tube is the second ratio value;Described first Ratio value is equal to second ratio value.
Optionally, the ratio between the breadth length ratio of first PMOS tube and the breadth length ratio of second NMOS tube is third Ratio value;Ratio between the breadth length ratio of the third PMOS tube and the breadth length ratio of the third NMOS tube is the 4th ratio value; Third ratio value relationship proportional to the 4th ratio value.
Optionally, the breadth length ratio of first PMOS tube is equal to the breadth length ratio of second PMOS tube.
Optionally, the bias unit includes the 4th NMOS tube, and the grid of the 4th NMOS tube is all connected to drain electrode The source electrode of second NMOS tube, the source electrode ground connection of the 4th NMOS tube.
Optionally, the oscillating unit includes three-level annular oscillation circuit;The ring vibration unit includes CMOS inverter, at different levels The voltage bias end of CMOS inverter all connects the current lens unit, rear class CMOS inverter by the third current path Voltage input end connect with the voltage output end of prime CMOS inverter, the voltage input end and final stage of chopped-off head CMOS inverter The voltage output end of CMOS inverter connects.
Optionally, the PMOS tube of CMOS inverters at different levels is to fall than pipe.
In second aspect, the embodiment of the present invention provides a kind of integrated chip, the voltage controlled oscillator including any of the above-described.
In the third aspect, the embodiment of the present invention provides a kind of electronic equipment, the voltage controlled oscillator including any of the above-described.
In each embodiment of the present invention, the first bias voltage that current lens unit is provided in response to bias unit will divide Not Wei Yu the first current path the voltage of first node and the voltage bias for the third node for being located at third current path be the One bias voltage.Also, current lens unit is also used to the resistance value configuration in response to resistance unit, and adjusting flows through third current path Third electric current, with by adjust oscillating unit capacitor the charge and discharge time change oscillating unit cycle of oscillation, wherein stream The first electric current through the first current path is equal to third electric current.Therefore, by configuring the corresponding resistance value of resistance unit, can between The cycle of oscillation for adjusting the charge and discharge time change oscillating unit of the capacitor of oscillating unit is connect, makes the cycle of oscillation after changing more Close to desired cycle of oscillation, to improve the precision of cycle of oscillation output.Also, current lens unit can limit input oscillation The electric current of unit, the effect of the other parameters in the low oscillating unit that disappears is carried out with this, and reduces the influence of temperature bring and power consumption more It is low.
Detailed description of the invention
One or more embodiments are illustrated by the picture in corresponding attached drawing, these exemplary theorys The bright restriction not constituted to embodiment, the element in attached drawing with same reference numbers label are expressed as similar element, remove Non- to have special statement, composition does not limit the figure in attached drawing.
Fig. 1 is that the embodiment of the present invention provides a kind of schematic block circuit diagram of voltage controlled oscillator;
Fig. 2 is that another embodiment of the present invention provides a kind of schematic block circuit diagrams of voltage controlled oscillator;
Fig. 3 is the schematic block circuit diagram of annular oscillation circuit in Fig. 2;
Fig. 4 is that the embodiment of the present invention provides a kind of electrical block diagram of voltage controlled oscillator.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right The present invention is further elaborated.It should be appreciated that described herein, specific examples are only used to explain the present invention, not For limiting the present invention.
Voltage controlled oscillator provided in an embodiment of the present invention can be used for phase-locked loop circuit (Phase Locked Loop, PLL), clock data recovery circuit (Clock and Data Recovery, CDR) etc..
Voltage controlled oscillator provided in an embodiment of the present invention can be annular RC voltage controlled oscillator, can also be LC voltage controlled oscillation Device.
Referring to Fig. 1, Fig. 1 is that the embodiment of the present invention provides a kind of schematic block circuit diagram of voltage controlled oscillator.Such as Fig. 1 institute Show, which includes resistance unit 11, current lens unit 12, bias unit 13 and oscillating unit 14.Current mirror Unit 12 is connect by the first current path 12A with resistance unit 11, and bias unit 13 passes through the second current path 12B and electric current Mirror unit 12 connects, and oscillating unit 14 is connect by third current path 12C with current lens unit 12.
Bias unit 13 can provide the first bias voltage V1 for current lens unit 12, and then, current lens unit 12 responds In first bias voltage V1, the voltage of the first node 10A of the first current path 12A will be located at and be located at third electric current The voltage bias of the third node 10C of path 12C is the first bias voltage V1, wherein positioned at the second of the second current path 12B The voltage of node 10B is the first bias voltage V1.
Further, current lens unit 12 by the first electric current I1 for flowing through the first current path 12A and can also flow through the The third electric current I3 mirror image of three current path 12C is to be mutually equal, also that is, electric current I1=I3.
Wherein, the first electric current I1 can follow the change of the resistance value of resistance unit 11 and change, and therefore, work as first node It, can be by changing the resistance value of resistance unit 11 to adjust third electric current when the voltage of 10A is equal with the voltage of third node 10C The size of I3.However, third electric current I3 is charged for the capacitor of oscillating unit 14, the capacitor of oscillating unit 14 can Postpone the cycle of oscillation of oscillator signal.Therefore, it can change the vibration of oscillating unit 14 by adjusting the stool and urine of third electric current I3 Swing the period.
Further, current lens unit 12 is additionally in response to the resistance value configuration of resistance unit 11, and adjusting flows through third electric current The third electric current I3 of path 12C, to change the vibration of oscillating unit 14 by the charge and discharge time for the capacitor for adjusting oscillating unit 14 Swing the period.
In some embodiments, resistance unit 11 can be the adjustable resistance of resistance value, therefore, by adjusting resistance unit 11 Resistance value, the first electric current I1 can be adjusted so that current lens unit 12 replicate the first electric current I1 to third current path 12C, Also that is, third electric current I3 is equal to the first electric current I1.
The content that those skilled in the art can be instructed and guided according to embodiments of the present invention selects suitable discrete component to design Bias unit 13, and bias unit 13 is made to export the first bias voltage V1, in some embodiments, the first bias voltage V1 can be with It is the voltage not being affected by temperature.Further, those skilled in the art are also an option that suitable discrete component design current Mirror unit 12 makes current lens unit 12 in response to the first bias voltage V1, by the voltage of first node 10A and third node 10C All it is biased to the first bias voltage V1.
Therefore, by configuring the corresponding resistance value of resistance unit 11, filling for the capacitor of oscillating unit 14 can be adjusted indirectly Discharge time changes the cycle of oscillation of oscillating unit, and the cycle of oscillation after changing is made to be more nearly desired cycle of oscillation, thus Improve the precision of cycle of oscillation output.Also, current lens unit 12 can limit the electric current of input oscillating unit, carry out low disappear with this The effect of other parameters in oscillating unit 14, and it is lower with power consumption to reduce the influence of temperature bring.
In some embodiments, as shown in Fig. 2, current lens unit 12 includes: current mirroring circuit 121 and biasing circuit 122, Biasing circuit 122 is connect with current mirroring circuit 121.
Current mirroring circuit 121 exports out at least three branch currents in response to the input of external power supply 123.Biasing circuit 122 will be biased to the first electric current I1 and by the first current path 12A by a branch current at least three branch currents respectively Output will be biased to the second electric current I2 and by the second current path by another branch current at least three branch current 12B 12B output, will another branch current be biased to third electric current I3 and by third electric current road again at least three branch currents Diameter 12C output.
Biasing circuit 122 can be improved the output reliability of the first electric current I1, the second electric current I2 and third electric current I3, reduce Influence of the temperature to the first electric current I1, the second electric current I2 and third electric current I3, thus current lens unit 12 is made to include: current mirror electricity Road 121 and biasing circuit 122, biasing circuit 122 and current mirroring circuit 121 have Low Drift Temperature characteristic.Also, current mirroring circuit 121 can also limit the electric current of input oscillating unit 14, thus power consumption is lower.
As shown in Fig. 2, the oscillating unit 14 include several grades of annular oscillation circuits, every grade of annular oscillation circuit include voltage bias end, The voltage bias end of voltage input end and voltage output end, every grade of annular oscillation circuit passes through third current path 12C connection biased electrical Road 122.The voltage input end of rear class annular oscillation circuit is connect with the voltage output end of prime annular oscillation circuit, also, chopped-off head ring vibration electricity The voltage input end on road is connect with the voltage output end of final stage annular oscillation circuit.
It is to be understood that rear class annular oscillation circuit and prime annular oscillation circuit herein is comparatively prime annular oscillation circuit For the annular oscillation circuit being located in front of it, which is rear class annular oscillation circuit.Rear class annular oscillation circuit is opposite For the annular oscillation circuit for being located at its rear, which is prime annular oscillation circuit.Further, chopped-off head ring vibration electricity Road is the head end positioned at the oscillating unit 14 being made of multistage annular oscillation circuit, and final stage annular oscillation circuit is located at by multistage annular oscillation circuit The end of the oscillating unit 14 of composition.Such as: referring to Fig. 2, annular oscillation circuit 142, for annular oscillation circuit 143, ring vibration is electric Road 142 is prime annular oscillation circuit, and annular oscillation circuit 143 is rear class annular oscillation circuit.Similarly, annular oscillation circuit 143 is relative to annular oscillation circuit For 144, annular oscillation circuit 143 is prime annular oscillation circuit, and annular oscillation circuit 144 is rear class annular oscillation circuit.Herein, annular oscillation circuit 141 It is chopped-off head annular oscillation circuit, annular oscillation circuit 14N is final stage annular oscillation circuit.
In embodiments of the present invention, by the way that multistage annular oscillation circuit is arranged, desired low-frequency oscillation can effectively be exported Signal.
In some embodiments, as shown in figure 3, every grade of annular oscillation circuit includes ring vibration unit 1411 and capacitor cell 1412, Ring vibration unit 1411 includes first node 31a, second node 31b and third node 31c, first node 31a are voltage bias end And by third current path 12C connection biasing circuit 122, second node 31b is voltage input end, and third node 31c is electricity Pressure output end is simultaneously connect with capacitor cell 1412, wherein the corresponding voltage of third node 31c is the first bias voltage V1.
In some embodiments, capacitor cell 1412 therefore can be by configuring resistance including the adjustable capacitor of capacitance The capacitor of unit 11 corresponding resistance value and capacitor cell 1412, when the charge and discharge for the capacitor that can adjust indirectly oscillating unit 14 Between change oscillating unit cycle of oscillation, make change after cycle of oscillation be more nearly desired cycle of oscillation, to improve vibration Swing the precision of period output.
In order to elaborate voltage controlled oscillator shown in above-mentioned each embodiment, 4 elaborates, such as scheme with reference to the accompanying drawing Shown in 4, the current mirroring circuit 121 of the embodiment of the present invention includes: the first PMOS tube PQ1, the second PMOS tube PQ2 and third PMOS tube PQ3, the source electrode of the first PMOS tube PQ1, the second PMOS tube PQ2 and third PMOS tube PQ3 are all connected to fourth node 41, and Four nodes 41 are additionally coupled to external power supply AVCC, the grid of the first PMOS tube PQ1, the second PMOS tube PQ2 and third PMOS tube PQ3 It is all connected to the 5th node 42, the drain electrode of the first PMOS tube PQ1 is additionally coupled to the 5th node 42.
As shown in figure 4, the biasing circuit 122 includes: the first NMOS tube NQ1, the second NMOS tube NQ2 and third NMOS tube NQ3, the drain electrode of the first NMOS tube NQ1 are connected to the 5th node 42, the drain electrode of the second PMOS tube PQ2, the first NMOS tube NQ1 grid The grid of pole, the drain electrode of the second NMOS tube NQ2 and grid, third NMOS tube NQ3 is all connected to the 6th node 43, third PMOS tube The drain electrode of PQ3 is connected to the drain electrode of third NMOS tube NQ3, and the source electrode of the first NMOS tube NQ1 is connect with resistance unit 11, and second The source electrode of NMOS tube NQ2 is connect with bias unit 13, and the source electrode of third NMOS tube NQ3 is connect with oscillating unit 14.
As shown in figure 4, bias unit 13 includes the 4th NMOS tube NQ4, the grid of the 4th NMOS tube NQ4 is all connect with drain electrode To the source electrode of the second NMOS tube NQ2, the source electrode of the 4th NMOS tube NQ4 is grounded.
As shown in figure 4, the voltage controlled oscillator further includes the 5th NMOS tube NQ5, the grid of the 5th NMOS tube NQ5 is for inputting External enable signal, the drain electrode of the 5th NMOS tube NQ5 are connected to the 6th node 43, the source electrode ground connection of the 5th NMOS tube NQ5.
As shown in figure 4, the oscillating unit 14 includes three-level annular oscillation circuit, the ring vibration unit 1411 in every grade of annular oscillation circuit is all Including CMOS inverter 51, the voltage bias end of CMOS inverters 51 at different levels all passes through third current path 12C connection current mirror The voltage input end of unit, rear class CMOS inverter is connect with the voltage output end of prime CMOS inverter, chopped-off head CMOS reverse phase The voltage input end of device is connect with the voltage output end of final stage CMOS inverter.
In the present embodiment, the ratio between the breadth length ratio of the first PMOS tube PQ1 and the breadth length ratio of the first NMOS tube NQ1 is First ratio value, the ratio between the breadth length ratio of the second PMOS tube PQ2 and the breadth length ratio of the second NMOS tube NQ2 are the second ratio Value, the first ratio value are equal to the second ratio value.Therefore, the first NMOS tube NQ1 is equal with the source voltage of the second NMOS tube NQ2.
In some embodiments, breadth length ratio of the breadth length ratio of the first PMOS tube PQ1 equal to the second PMOS tube PQ2, first The breadth length ratio of NMOS tube NQ1 is equal to the breadth length ratio of the second NMOS tube NQ2.
Since the 4th NMOS tube NQ4 uses diode connection, the source electrode electricity of the first NMOS tube NQ1 and the second NMOS tube NQ2 Crimp the drain-source pressure drop Vth of nearly 4th NMOS tube NQ4.
When the resistance value of resistance unit 11 is R, it is clear that flow through the first electric current I1 of the first current path 12A are as follows:
I1=Vth/R
In some embodiments, the ratio between the breadth length ratio of the first PMOS tube and the breadth length ratio of the second NMOS tube is third Ratio value, the ratio between the breadth length ratio of third PMOS tube and the breadth length ratio of third NMOS tube are the 4th ratio value, third ratio It is worth relationship proportional to the 4th ratio value.Therefore, the source voltage of the second NMOS tube is equal with the source voltage of third NMOS tube.
As shown in figure 4, the voltage V0 of the voltage output end of every grade of CMOS inverter is equal to second in oscillating unit 14 The source voltage of NMOS tube NQ2.
It is the mistake of capacitor charging time needed when deriving the capacitor cell 1412 of every grade of annular oscillation circuit from 0 to V0 below Journey:
When charging to capacitor cell 1412:
Q=CU=It
Wherein: U=V0, C are the capacitance of the capacitor cell 1412 of every grade of annular oscillation circuit, and I is to flow through every grade of annular oscillation circuit Capacitor cell 1412 electric current, I=I1, t be every grade of annular oscillation circuit capacitor cell 1412 charging time, Q be every grade of ring The quantity of electric charge of the capacitor cell 1412 of vibration circuit in charging.
Due to: I=I1=V0/R=Vth/R
To be obtained by the above various simultaneous:
T=RC
Since the charging time of the capacitor cell 1412 of every grade of annular oscillation circuit is equal to discharge time, the annular oscillation circuit Period be T=2RC.
It can be seen from the above, can be seen that the voltage controlled oscillator 10 only resistance with resistance unit 11 in the process from promoting to lead Value, the size of the capacitance of capacitor cell 1412 are related, and not related with other design parameters, therefore, by adjusting electricity The capacitance of the resistance value or capacitor cell 1412 that hinder unit 11 can make voltage controlled oscillator 10 export high-precision cycle of oscillation Oscillator signal.
It can be seen from the above, since the capacitor of the capacitor cell 1412 of every grade of annular oscillation circuit is adjustable, so that the voltage-controlled vibration The parasitic capacitance for swinging each discrete component in device can be ignored, and facilitate calculating.
It can be seen from the above, since the current maxima in the voltage controlled oscillator is by the control of current lens unit, so that oscillation The electric current of unit 14 will not great changes have taken place, thus can have lower power consumption.
It in some embodiments, can be by the electricity of external power supply AVCC in order to further decrease the power consumption of voltage controlled oscillator Pressure is set as 1.5V, when being spun upside down with reducing output level, the turn-on time while switching tube up and down of CMOS inverter.
It in some embodiments, can will be at different levels since the amplitude of oscillation of the output voltage of annular oscillation circuits at different levels is less than voltage V0 The PMOS tube of CMOS inverter is to fall than pipe, when facilitating level by high tumble to low level, the upper lower switch of CMOS inverter When pipe simultaneously turns on, reduces charging of the PMOS tube to capacitor cell 1412, accelerate the discharge time of capacitor cell 1412, and reduce The power consumption of entire loop.
In addition, the total current of annular oscillation circuit is limited by current lens unit 12 when voltage controlled oscillator 10 starts oscillation, So the source voltage of third NMOS tube can be stablized in a very a small range (1mv grades general, depending on technique), entire voltage-controlled vibration The electric current for swinging device 10 also will limit in the range of a very little, therefore this voltage controlled oscillator 10 is low in energy consumption.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of integrated chip, the integrated chip packet Voltage controlled oscillator is included, which is voltage controlled oscillator described in above-mentioned each embodiment (as shown in Figures 1 to 4).
In the present embodiment, by configuring the corresponding resistance value of resistance unit, the capacitor of oscillating unit can be adjusted indirectly The charge and discharge time change oscillating unit cycle of oscillation, make change after cycle of oscillation be more nearly desired cycle of oscillation, To improve the precision of cycle of oscillation output.Also, current lens unit can limit the electric current of input oscillating unit, be come with this low The effect of the other parameters to disappear in oscillating unit, and reduce that temperature bring influences and power consumption is lower.
As the another aspect of the embodiment of the present invention, the embodiment of the present invention provides a kind of electronic equipment, the electronic equipment packet Voltage controlled oscillator is included, which is voltage controlled oscillator described in above-mentioned each embodiment (as shown in Figures 1 to 4).
In the present embodiment, by configuring the corresponding resistance value of resistance unit, the capacitor of oscillating unit can be adjusted indirectly The charge and discharge time change oscillating unit cycle of oscillation, make change after cycle of oscillation be more nearly desired cycle of oscillation, To improve the precision of cycle of oscillation output.Also, current lens unit can limit the electric current of input oscillating unit, be come with this low The effect of the other parameters to disappear in oscillating unit, and reduce that temperature bring influences and power consumption is lower.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations;At this It under the thinking of invention, can also be combined between the technical characteristic in above embodiments or different embodiment, step can be with It is realized with random order, and there are many other variations of different aspect present invention as described above, for simplicity, they do not have Have and is provided in details;Although the present invention is described in detail referring to the foregoing embodiments, the ordinary skill people of this field Member is it is understood that it is still possible to modify the technical solutions described in the foregoing embodiments, or to part of skill Art feature is equivalently replaced;And these are modified or replaceed, each reality of the application that it does not separate the essence of the corresponding technical solution Apply the range of a technical solution.

Claims (13)

1. a kind of voltage controlled oscillator characterized by comprising
Resistance unit;
Current lens unit is connect by the first current path with the resistance unit;
Bias unit is connect by the second current path with the current lens unit;
Oscillating unit is connect by third current path with the current lens unit;
The current lens unit is used for the first bias voltage provided in response to the bias unit, will be located at described first The voltage bias of the voltage of the first node of current path and the third node for being located at the third current path is described first Bias voltage;
The current lens unit is also used to the resistance value configuration in response to the resistance unit, and adjusting flows through the third current path Third electric current, change the oscillation week of the oscillating unit with the charge and discharge time by the capacitor for adjusting the oscillating unit Phase, wherein the first electric current for flowing through first current path is equal to the third electric current.
2. voltage controlled oscillator according to claim 1, which is characterized in that the current lens unit includes:
Current mirroring circuit exports at least three branch currents for the input in response to external power supply;
Biasing circuit is connect with the current mirroring circuit, respectively by a branch current at least three branch currents It is biased to the first electric current and is exported by first current path, by another branch electricity at least three branch currents Stream is biased to the second electric current and is exported by second current path, will another branch again at least three branch currents Road current offset is third electric current and is exported by the third current path.
3. voltage controlled oscillator according to claim 2, which is characterized in that the oscillating unit includes several grades of ring vibration electricity Road, every grade of annular oscillation circuit include voltage bias end, voltage input end and voltage output end, the voltage bias end of every grade of annular oscillation circuit The biasing circuit, voltage input end and the prime annular oscillation circuit of rear class annular oscillation circuit are connected by the third current path Voltage output end connection, also, the voltage input end of chopped-off head annular oscillation circuit is connect with the voltage output end of final stage annular oscillation circuit.
4. voltage controlled oscillator according to claim 3, which is characterized in that every grade of annular oscillation circuit include ring vibration unit with Capacitor cell, the ring vibration unit include first node, second node and third node, and the first node is that the voltage is inclined It sets end and the current lens unit is connected by the third current path, the second node is the voltage input end, institute Stating third node is the voltage output end and to connect with the capacitor cell, wherein the corresponding voltage of the third node is First bias voltage.
5. voltage controlled oscillator according to claim 4, which is characterized in that the capacitor cell includes the adjustable electricity of capacitance Hold.
6. voltage controlled oscillator according to claim 2, which is characterized in that
The current mirroring circuit includes: the first PMOS tube, the second PMOS tube and third PMOS tube, first PMOS tube, second The source electrode of PMOS tube and third PMOS tube is all connected to fourth node, and the fourth node is additionally coupled to external power supply, institute The grid for stating the first PMOS tube, the second PMOS tube and third PMOS tube is all connected to the 5th node, the leakage of first PMOS tube Pole is additionally coupled to the 5th node;
The biasing circuit includes: the first NMOS tube, the second NMOS tube and third NMOS tube, and the drain electrode of first NMOS tube connects Be connected to the 5th node, the drain electrode of second PMOS tube, the grid of first NMOS tube, the second NMOS tube drain electrode with Grid, the third NMOS tube grid be all connected to the 6th node, the drain electrode of the third PMOS tube is connected to the third The source electrode of the drain electrode of NMOS tube, first NMOS tube is connect with the resistance unit, the source electrode of second NMOS tube and institute Bias unit connection is stated, the source electrode of the third NMOS tube is connect with the oscillating unit;
Ratio between the breadth length ratio of first PMOS tube and the breadth length ratio of first NMOS tube is the first ratio value;
Ratio between the breadth length ratio of second PMOS tube and the breadth length ratio of second NMOS tube is the second ratio value;
First ratio value is equal to second ratio value.
7. voltage controlled oscillator according to claim 6, which is characterized in that
Ratio between the breadth length ratio of first PMOS tube and the breadth length ratio of second NMOS tube is third ratio value;
Ratio between the breadth length ratio of the third PMOS tube and the breadth length ratio of the third NMOS tube is the 4th ratio value;
Third ratio value relationship proportional to the 4th ratio value.
8. voltage controlled oscillator according to claim 6, which is characterized in that the breadth length ratio of first PMOS tube is equal to described The breadth length ratio of second PMOS tube.
9. voltage controlled oscillator according to claim 6, which is characterized in that the bias unit includes the 4th NMOS tube, institute The grid and drain electrode of stating the 4th NMOS tube are all connected to the source electrode of second NMOS tube, and the source electrode of the 4th NMOS tube connects Ground.
10. voltage controlled oscillator according to claim 4, which is characterized in that
The oscillating unit includes three-level annular oscillation circuit;
The ring vibration unit includes CMOS inverter, and the voltage bias end of CMOS inverters at different levels all passes through third electric current road Diameter connects the current lens unit, and the voltage input end of rear class CMOS inverter and the voltage output end of prime CMOS inverter connect It connects, the voltage input end of chopped-off head CMOS inverter is connect with the voltage output end of final stage CMOS inverter.
11. voltage controlled oscillator according to claim 10, which is characterized in that the PMOS tube of CMOS inverters at different levels is to fall to compare Pipe.
12. a kind of integrated chip, which is characterized in that including the voltage controlled oscillator as described in claim 1 to 11.
13. a kind of electronic equipment, which is characterized in that including the voltage controlled oscillator as described in claim 1 to 11.
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CN110190845A (en) * 2019-06-03 2019-08-30 海光信息技术有限公司 Numerically-controlled oscillator, electronic equipment and control method
CN112165325A (en) * 2020-09-27 2021-01-01 灿芯半导体(上海)有限公司 Voltage controlled oscillator circuit for PLL circuit
CN114967827A (en) * 2021-02-24 2022-08-30 辉达公司 Improving stability of bit generation unit through aging

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CN201222719Y (en) * 2008-05-27 2009-04-15 上海复旦微电子股份有限公司 High-precision ring oscillator
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CN110190845A (en) * 2019-06-03 2019-08-30 海光信息技术有限公司 Numerically-controlled oscillator, electronic equipment and control method
CN110190845B (en) * 2019-06-03 2023-05-09 海光信息技术股份有限公司 Digital controlled oscillator, electronic apparatus, and control method
CN112165325A (en) * 2020-09-27 2021-01-01 灿芯半导体(上海)有限公司 Voltage controlled oscillator circuit for PLL circuit
CN114967827A (en) * 2021-02-24 2022-08-30 辉达公司 Improving stability of bit generation unit through aging
CN114967827B (en) * 2021-02-24 2024-03-19 辉达公司 Method for improving stability of bit generating unit by aging and circuit

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