CN109273468A - Three-dimensional through-silicon via structure cmos image sensor and preparation method thereof - Google Patents
Three-dimensional through-silicon via structure cmos image sensor and preparation method thereof Download PDFInfo
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- CN109273468A CN109273468A CN201811033738.2A CN201811033738A CN109273468A CN 109273468 A CN109273468 A CN 109273468A CN 201811033738 A CN201811033738 A CN 201811033738A CN 109273468 A CN109273468 A CN 109273468A
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- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 93
- 239000010703 silicon Substances 0.000 title claims abstract description 93
- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 67
- 229920000642 polymer Polymers 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 18
- 239000011521 glass Substances 0.000 claims abstract description 16
- 238000012545 processing Methods 0.000 claims abstract description 11
- 230000009467 reduction Effects 0.000 claims abstract description 6
- 230000008030 elimination Effects 0.000 claims abstract description 4
- 238000003379 elimination reaction Methods 0.000 claims abstract description 4
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 20
- 230000002262 irrigation Effects 0.000 claims description 18
- 238000003973 irrigation Methods 0.000 claims description 18
- 238000011068 loading method Methods 0.000 claims description 10
- 238000005566 electron beam evaporation Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 5
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 5
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 5
- 238000000926 separation method Methods 0.000 claims description 5
- 230000004888 barrier function Effects 0.000 claims description 4
- 238000001020 plasma etching Methods 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 230000035945 sensitivity Effects 0.000 abstract description 4
- 238000004806 packaging method and process Methods 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 75
- 238000010586 diagram Methods 0.000 description 20
- 238000005516 engineering process Methods 0.000 description 7
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 5
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- BAPJBEWLBFYGME-UHFFFAOYSA-N Methyl acrylate Chemical compound COC(=O)C=C BAPJBEWLBFYGME-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
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- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
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- 238000004528 spin coating Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
Abstract
The invention belongs to technical field of semiconductors, specially a kind of three-dimensional through-silicon via structure cmos image sensor and preparation method thereof.The method of the present invention includes: to make the polymer cavity wall formed around cmos image sensor chip layer on a silicon substrate as bracket；Spotlight glass and polymer cavity wall upper surface are mutually bonded, air chamber is formed；By silicon substrate reduction processing to preset thickness, and carry out stress elimination；Shallow trench and through-hole are formed on a silicon substrate, make electrode；Spotlight glass and colored filter are bonded；Make through silicon via insert layer；Cmos image sensor chip layer and through silicon via insert layer are interconnected.The present invention can quickly and efficiently realize that three-dimension packaging is integrated；The present invention supports bonding spotlight glassy layer to form air chamber by polymer, being capable of effective protection cmos image sensor；Device can improve the absorbability to light in the case where small size, to improve sensitivity.
Description
Technical field
The invention belongs to technical field of semiconductors, and in particular to it is a kind of three-dimensional through-silicon via structure cmos image sensor and its
Preparation method.
Background technique
With the progress of manufacture craft, semiconductor devices continuous miniature, traditional planar structure be unable to satisfy into
One step scaled down, it is integrated that semiconductor devices starts to move towards three-dimension packaging.Through silicon via (TSV) technology is increasingly becoming three-dimensionally integrated
The core of technology, through silicon via technology are also becoming the mainstream interconnecting method of cmos image sensor encapsulation.In order to further mention
The performance and integrated level of high device, technical staff start to carry out positive exploration to new construction, new material, new process.In recent years
Come, various novel image sensor structures are rapidly developed.
Traditional two-dimensional package technology is more and more difficult to realize more highdensity encapsulation, is passed using the image of 3-D technology
Sensor can accomplish that device is smaller, and speed is faster.
Summary of the invention
The purpose of the present invention is to provide the fast three-dimensional through-silicon via structure cmos image biographies of a kind of high sensitivity, corresponding speed
Sensor and preparation method thereof.
The preparation method of three-dimensional through-silicon via structure cmos image sensor provided by the invention, specific steps are as follows:
The polymer cavity wall as bracket is formed around the cmos image sensor chip layer of production on a silicon substrate；
Spotlight glass and polymer cavity wall upper surface are mutually bonded, air chamber is formed；
By the silicon substrate reduction processing to preset thickness, and carry out stress elimination；
Shallow trench and through-hole are formed at the silicon substrate back side, electrode is made and draws；
The spotlight glass and colored filter are bonded；Make through silicon via insert layer；And
The cmos image sensor chip layer and the through silicon via insert layer are interconnected.
In the present invention, the preset thickness is preferably 100 μm hereinafter, for example are as follows: 100-20 μm.
In the present invention, the polymer is preferably polymethyl methacrylate.
It is described to form shallow trench and through-hole at the silicon substrate back side in the present invention, it makes electrode and the specific steps drawn is excellent
It is selected as: being etched on the back side of silicon substrate using reactive ion etching and form shallow ditch groove structure, it is secondary similarly to etch process
Etching forms through silicon via；The layer deposited isolating on above structure；It is lithographically formed electrode pattern；And the first conductive metal of deposit
Layer.
In the present invention, the specific steps of the production through silicon via insert layer are preferred are as follows: carry out being lithographically formed through-hole to silicon wafer
Pattern, and etch and form irrigation canals and ditches；The second conductive metal layer is filled in the irrigation canals and ditches；By the silicon wafer upper surface and loading layer into
Row temporary bonding；Reduction processing is carried out to the silicon chip back side, until making the second conductive metal layer exposure；And by institute
State the releasing of loading layer.
In the present invention, the depth of the irrigation canals and ditches is preferably 60 μm to 80 μm, and diameter is 12 μm to 18 μm.
In the present invention, the specific steps that the second conductive metal layer is filled in the irrigation canals and ditches are preferred are as follows: use physical vapor
Deposition method deposits one layer of SiO on the surface of through-silicon via structure2Thin layer is as separation layer；TiN layer is deposited using electron beam evaporation
As barrier layer；Cu is deposited using electron beam evaporation, and the Cu and TiN that are formed in outside irrigation canals and ditches are carried out back to carve planarization process.
Invention additionally discloses a kind of three-dimensional through-silicon via structure cmos image sensors, comprising:
The cmos image sensor chip layer of production on a silicon substrate；
Polymer cavity wall is formed in the cmos image sensor chip layer；
Backlight comprising spotlight glass and colored filter, wherein on the spotlight glass and the polymer cavity wall
Surface mutually bonds；And
Through silicon via insert layer is interconnected with the cmos image sensor chip layer.
In the present invention, the thickness of the silicon substrate is preferably 100 μm hereinafter, for example, 10-200 μm.
In the present invention, the polymer is preferably polymethyl methacrylate.
The present invention supports bonding spotlight glassy layer to form air chamber by polymer, being capable of effective protection cmos image
Sensor.Meanwhile the design of the cmos image sensor of three-dimensional structure can improve device to light in the case where small size
Absorbability, to improve sensitivity.In addition, present invention process step is easily achieved, three-dimensional envelope can be quickly and efficiently realized
Dress is integrated.
Detailed description of the invention
Fig. 1 is the flow chart of three-dimensional through-silicon via structure cmos image sensor preparation method.
Fig. 2 is the device architecture schematic diagram after forming polymer cavity wall.
Fig. 3 is the top view to form the device architecture after polymer cavity wall.
Fig. 4 is the device architecture schematic diagram after mutually bonding spotlight glass and polymer cavity wall upper surface.
Fig. 5 is by the device architecture schematic diagram after substrate thinning to preset thickness.
Fig. 6 is the device architecture schematic diagram after the back etched of silicon substrate forms shallow ditch groove structure.
Fig. 7 is the device architecture schematic diagram after the secondarily etched through-hole for forming high-aspect-ratio in the back side of silicon substrate.
Fig. 8 is the device architecture schematic diagram after forming separation layer.
Fig. 9 is the device architecture schematic diagram deposited after the first conductive metal layer.
Figure 10 is that the electrode of cmos image sensor chip layer is drawn to the device architecture schematic diagram after forming pedestal.
Figure 11 is by the device architecture schematic diagram after spotlight glass and colored filter bonding.
Figure 12 is the device architecture schematic diagram after the irrigation canals and ditches to form through silicon via insert layer.
Figure 13 is the device architecture schematic diagram after filling the second conductive metal in the trench.
Figure 14 is the device architecture schematic diagram after through silicon via insert layer and the bonding of loading layer.
Figure 15 is to carry out thinning processing to silicon wafer to leak out the device architecture schematic diagram after the second conductive metal layer.
Figure 16 is the structural schematic diagram of through silicon via insert layer.
Figure 17 is that the electrode of through silicon via insert layer is drawn to the structural schematic diagram after forming pedestal.
Figure 18 is three-dimensional through-silicon via structure CMOS image sensor structure schematic diagram.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it should be understood that described herein
Specific examples are only used to explain the present invention, is not intended to limit the present invention.Described embodiment is only the present invention one
Divide embodiment, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art are not making
All other embodiment obtained, shall fall within the protection scope of the present invention under the premise of creative work.
In the description of the present invention, it should be noted that the orientation of the instructions such as term " on ", "lower", " vertical " "horizontal"
Or positional relationship is to be based on the orientation or positional relationship shown in the drawings, and is merely for convenience of description of the present invention and simplification of the description, and
It is not that the device of indication or suggestion meaning or element must have a particular orientation, be constructed and operated in a specific orientation, therefore
It is not considered as limiting the invention.In addition, term " first ", " second " are used for description purposes only, and should not be understood as referring to
Show or imply relative importance.
In addition, many specific details of the invention, such as the structure of device, material, size, place are described hereinafter
Science and engineering skill and technology, to be more clearly understood that the present invention.But it just as the skilled person will understand, can be with
The present invention is not realized according to these specific details.Unless hereinafter particularly point out, the various pieces in device can be by
Material well known to those skilled in the art is constituted, or can be using the material with similar functions of exploitation in the future.
Fig. 1 is the flow chart of three-dimensional through-silicon via structure cmos image sensor preparation method.Below in conjunction with Fig. 1, for three
Dimension through-silicon via structure cmos image sensor preparation method is described in detail.
Step S1 forms the polymerization as bracket on the silicon substrate 100 for be formed with cmos image sensor chip layer 101
Object cavity wall 102.Specifically, firstly, being coated with poly- methyl on the silicon substrate for being formed with cmos image sensor chip (CIS) layer
Simultaneously then exposure development forms the polymer as bracket to methyl acrylate (PMMA) by way of removing (lift-off)
Cavity wall.The front view and top view of the device architecture after forming polymer cavity wall are respectively illustrated in figure 2 and figure 3.From figure
It can be seen that polymer cavity wall 102 is formed in around cmos image sensor chip layer 101.
Then the upper surface of adhesive coated polymer cavity wall 102 is used binding appts by spotlight glass by step S2
103 mutually bond with 102 upper surface of polymer cavity wall, form air chamber, play protection to cmos image sensor chip layer 101
Effect, resulting structures are as shown in Figure 4.
Step S3 handles substrate thinning to preset thickness, it is preferable that thickness is 100 μm or less.Then to Si substrate table
Face carries out method using fast wet etching, by the isotropism of wet etching the stress on Si is eliminated, by Si with 20%
KOH mixing isopropanol (IPA) is 90o20min is etched under C, and Ar plasma stress elimination is carried out in reactive ion etching,
Resulting structures are as shown in Figure 5.
Step S4 forms shallow trench and through-hole at the silicon substrate back side, makes electrode and draw.Specifically includes the following steps:
It is etched on the back side of silicon substrate 100 using reactive ion etching and forms shallow ditch groove structure 104, resulting structures are as shown in Figure 6.With
The same secondarily etched through-hole 105 for forming high-aspect-ratio of etching process, resulting structures are as shown in Figure 7.It is adopted on above structure
With technique for atomic layer deposition (ALD) layer deposited isolating 106, resulting structures are as shown in Figure 8.It is lithographically formed electrode pattern, passes through object
The first conductive metal layer of physical vapor deposition deposition techniques 107, resulting structures are as shown in Figure 9.Wherein, the first conductive metal layer is for example
W can be used.Finally, formation pedestal 108, extraction electrode, resulting structures are as shown in Figure 10.
Step S5 bonds spotlight glass 103 and colored filter 109, and resulting structures are as shown in figure 11.
Step S6 makes through silicon via insert layer.Specifically, including following sub-step, silicon wafer 200 is lithographically formed
Through-hole pattern, and etch and form irrigation canals and ditches (trench).In specific an example, in Si on piece spin coating photoresist, photoetching shape is carried out
It at through silicon via (TSV) pattern, is performed etching using reactive ion beam (RIE) lithographic method, forming diameter is 12 μm to 18 μm, diameter
The irrigation canals and ditches that depth is 60 μm to 80 μm.Device architecture schematic diagram after the irrigation canals and ditches to form through silicon via insert layer are shown in FIG. 12.
Then, the second conductive metal layer is formed in the trench.Using physical vapour deposition (PVD) (PECVD) method on the surface of through-silicon via structure
Deposit one layer of SiO2Thin layer is as separation layer 201.Then, using electron beam evaporation deposit TiN layer as barrier layer 202.Later,
It is filled using electron beam evaporation deposit 203 pairs of irrigation canals and ditches of Cu layer, and the Cu and TiN that are formed in outside irrigation canals and ditches carve flat
Change processing.The device architecture schematic diagram after filling the second conductive metal in the trench is shown in Figure 13.In the present embodiment,
The second conductive metal filled is Cu, but the present invention is not limited thereto, can also make other suitable conductive metals such as Au,
Ag etc..Later, silicon wafer 200 and loading layer 205 are subjected to temporary bonding by adhesive layer 204.Through silicon via is shown in Figure 14
Device architecture schematic diagram after insert layer and the bonding of loading layer.Next, reduction processing is carried out to silicon wafer 200, until making second
The exposure of conductive metal layer Cu layer 203.Specifically, fixed loading layer 205, will be served as a contrast using technologies such as chemically mechanical polishings (CMP)
Bottom carries out polishing thinning processing, and deposited Cu layer 203 is enable to come out from bottom exposed.It is shown in Figure 15 and silicon wafer is carried out
Thinning processing leaks out the device architecture schematic diagram after the second conductive metal layer.Finally, loading layer 205 is released.Specifically, lead to
The mode of dissolution is crossed by the loading layer that temporary adhesion is lived and the releasing that through silicon via insert layer bonds, obtains through silicon via insertion
Layer, resulting structures are as shown in figure 16.
Cmos image sensor chip layer and through silicon via insert layer are interconnected by step S7.Specifically, by through silicon via
Second conductive metallic portion of insert layer carries out the extraction of electrode, forms pedestal 206, resulting structures are as shown in figure 17.It is logical
Cmos image sensor chip layer and through silicon via insert layer are attached by the method for crossing hot pressing, complete three-dimensional back light source structure
The preparation of cmos image sensor, resulting structures are as shown in figure 18.
More than, for three-dimensional through-silicon via structure cmos image sensor preparation method of the invention specific embodiment into
Detailed description is gone, but the present invention is not limited thereto.The specific embodiment of each step according to circumstances can be different.In addition,
The sequence of part steps can exchange, and part steps can be omitted.
Invention additionally discloses a kind of three-dimensional through-silicon via structure cmos image sensors, as shown in figure 18, including are produced on silicon
Cmos image sensor chip layer 101 on substrate 100 is formed with as bracket around cmos image sensor chip layer 101
Polymer cavity wall 102.Wherein, silicon substrate 100 be thinned processing to preset thickness, for example, 100 μm hereinafter, and eliminate answer
Power.Polymer is preferably polymethyl methacrylate.
It further include backlight comprising spotlight glass 103 and colored filter 109, spotlight glass 103 and polymer
102 upper surface of cavity wall, which mutually bonds, forms air chamber, plays a protective role to cmos image sensor chip layer 101.
And through silicon via insert layer, it is interconnected with cmos image sensor chip layer 101.Through silicon via insert layer includes silicon wafer
200, wherein forming irrigation canals and ditches, and form separation layer 201, for example, SiO2, barrier layer 202, for example, SiN, the second conduction of filling
Metal 203, preferably Cu, Au, Ag etc..Being formed by irrigation canals and ditches diameter is preferably 12 μm to 18 μm, and diameter depth is 60 μm to 80 μm.
Cmos image sensor chip layer is interconnected by extraction electrode 107,203 respectively with through silicon via insert layer, forms pedestal
108,206, hot pressing connects.
The present invention supports bonding spotlight glassy layer to form air chamber by polymer, being capable of effective protection cmos image
Sensor.Meanwhile the design of the cmos image sensor of three-dimensional structure can improve device to light in the case where small size
Absorbability, to improve sensitivity.In addition, present invention process step is easily achieved, three-dimensional envelope can be quickly and efficiently realized
Dress is integrated.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by those familiar with the art, all answers
It is included within the scope of the present invention.
Claims (10)
1. a kind of three-dimensional through-silicon via structure cmos image sensor preparation method, which is characterized in that
The following steps are included:
The polymer cavity wall as bracket is formed around the cmos image sensor chip of production on a silicon substrate；
Spotlight glass and polymer cavity wall upper surface are mutually bonded, air chamber is formed；
By the silicon substrate reduction processing to preset thickness, and carry out stress elimination；
Shallow trench and through-hole are formed at the silicon substrate back side, electrode is made and draws；
The spotlight glass and colored filter are bonded；
Make through silicon via insert layer；And
The cmos image sensor chip layer and the through silicon via insert layer are interconnected.
2. three-dimensional through-silicon via structure cmos image sensor preparation method according to claim 1, which is characterized in that described
Preset thickness is 100 μm or less.
3. three-dimensional through-silicon via structure cmos image sensor preparation method according to claim 1, which is characterized in that described
Polymer is polymethyl methacrylate.
4. three-dimensional through-silicon via structure cmos image sensor preparation method according to claim 1, which is characterized in that described
Shallow trench and through-hole are formed at the silicon substrate back side, the specific steps for making electrode and drawing are as follows:
Shallow ditch groove structure is formed in the back etched of silicon substrate using reactive ion etching, it is secondarily etched similarly to etch process
Form through silicon via；
The layer deposited isolating on above structure；
It is lithographically formed electrode pattern；And
Deposit the first conductive metal layer.
5. three-dimensional through-silicon via structure cmos image sensor preparation method according to claim 1, which is characterized in that described
Make the specific steps of through silicon via insert layer are as follows:
Silicon wafer is carried out to be lithographically formed through-hole pattern, and etches and forms irrigation canals and ditches；
The second conductive metal layer is filled in the irrigation canals and ditches；
The silicon wafer upper surface and loading layer are subjected to temporary bonding；
Reduction processing is carried out to the silicon chip back side, until making the second conductive metal layer exposure；And
The loading layer is released.
6. three-dimensional through-silicon via structure cmos image sensor preparation method according to claim 5, which is characterized in that described
The depth of irrigation canals and ditches is 60 μm to 80 μm, and diameter is 12 μm to 18 μm.
7. three-dimensional through-silicon via structure cmos image sensor preparation method according to claim 5, which is characterized in that in institute
State the specific steps that the second conductive metal layer is filled in irrigation canals and ditches are as follows:
One layer of SiO is deposited on the surface of through-silicon via structure using physical gas-phase deposite method2Thin layer is as separation layer；
Using electron beam evaporation deposit TiN layer as barrier layer；
Cu is deposited using electron beam evaporation, and the Cu and TiN that are formed in outside irrigation canals and ditches are carried out back to carve planarization process.
8. a kind of three-dimensional through-silicon via structure cmos image sensor characterized by comprising
The cmos image sensor chip layer of production on a silicon substrate；
Polymer cavity wall is formed in the cmos image sensor chip layer；
Backlight comprising spotlight glass and colored filter；Wherein, on the spotlight glass and the polymer cavity wall
Surface mutually bonds；And
Through silicon via insert layer is interconnected with the cmos image sensor chip layer.
9. three-dimensional through-silicon via structure cmos image sensor according to claim 8, which is characterized in that the silicon substrate
With a thickness of 100 μm or less.
10. three-dimensional through-silicon via structure cmos image sensor according to claim 8, which is characterized in that the polymer
For polymethyl methacrylate.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111769097A (en) * | 2020-06-18 | 2020-10-13 | 复旦大学 | Silicon through hole structure for three-dimensional interconnection and manufacturing method thereof |
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2018
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| US20050023635A1 (en) * | 2002-11-12 | 2005-02-03 | Chandra Mouli | Isolation techniques for reducing dark current in CMOS image sensors |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111769097A (en) * | 2020-06-18 | 2020-10-13 | 复旦大学 | Silicon through hole structure for three-dimensional interconnection and manufacturing method thereof |
| CN111769097B (en) * | 2020-06-18 | 2022-11-18 | 复旦大学 | Silicon through hole structure for three-dimensional interconnection and manufacturing method thereof |
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