CN109254891A - A kind of debugging board - Google Patents
A kind of debugging board Download PDFInfo
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- CN109254891A CN109254891A CN201811114639.7A CN201811114639A CN109254891A CN 109254891 A CN109254891 A CN 109254891A CN 201811114639 A CN201811114639 A CN 201811114639A CN 109254891 A CN109254891 A CN 109254891A
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- chip
- debugging board
- logic chip
- debugging
- tested
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
This application discloses a kind of debugging boards, comprising: is integrated with the GPIO of the logical device of different function；It is connected with GPIO, the logic chip for being handled input information and/or output information；It is connected with each pin of logic chip, is used for transmission the connector of input information and/or output information.Obviously, when staff, which needs to treat test equipment, to be tested, equipment to be tested need to be only attached by connector pin corresponding with logic chip, and be arranged accordingly by the GPIO to debugging board card, so that it may which different equipment to be tested is tested.It thus avoids in the prior art, when staff tests the equipment to be tested of Different Logic functional requirement using debugging board, needs to carry out debugging board card the tedious steps of heavy industry.Obviously, by the debugging board in the application, the working efficiency of staff can be greatly improved.
Description
Technical field
The present invention relates to power electronics field, in particular to a kind of debugging board.
Background technique
With the continuous social and economic development, various electronic equipments continue to bring out, and before the factory of these electronic equipments, lead to
Often need to test these electronic equipments.In the prior art, if staff needs to a certain equipment to be tested
It is tested, usually according to the specific testing requirement of equipment to be tested, corresponding debugging function is set by way of re-packing
Board is debugged, debugging function is single, if the equipment to be tested needs to change design function, needs in existing debugging board
The modification of enterprising row line again debugs the equipment to be tested by way of heavy industry.Obviously, such mode of operation,
Staff's a large amount of time and energy are consumed, the working efficiency of staff has been seriously affected.It can be seen that how to utilize
One kind preferably tested to treat test equipment by debugging board, is this field skill to improve the working efficiency of staff
Art personnel's urgent problem to be solved.
Summary of the invention
In view of this, the purpose of the present invention is to provide a kind of debugging board, to improve the working efficiency of staff.Its
Concrete scheme is as follows:
A kind of debugging board, comprising:
It is integrated with the GPIO of the logical device of different function；
It is connected with the GPIO, the logic chip for being handled input information and/or output information；
It is connected with each pin of the logic chip, is used for transmission the input information and/or the output information
Connector.
Preferably, pull-up resistor and/or pull down resistor are provided on the logic chip.
Preferably, silk-screen label is equipped at the pin of the connector.
Preferably, cable and/or winding displacement are connected on the connector.
Preferably, the pin foot of voltage conversion is provided on the logic chip.
Preferably, wire jumper or resistance are provided on the logic chip.
Preferably, the logic chip is specially the chip that high speed signal can be converted to low speed signal.
Preferably, the logic chip is specially I2C switching chip and/or URAT Buffer switching chip and/or RMII
Switch chip and/or JTAG switches chip.
Preferably, which is characterized in that the logical device include logical operation device and/or voltage converter part and/or
Timing resets device and/or voltage current adapter part.
As it can be seen that be that the logical device for realizing different function is integrated in GPIO first in the present invention, then,
The logic chip for being handled input information and/or output information is connected on GPIO, and each on logic chip
Connection is used for transmission the connector of input information and/or output information at pin.Therefore, when staff is treating test equipment
When being tested, equipment to be tested need to be only connected with GPIO, so that it may to be tested be set by logic chip to different types of
It is standby to be tested, thus avoid in the prior art, staff using debugging board to Different Logic functional requirement to
When test equipment is tested, need to carry out debugging board card the tedious steps of heavy industry, also, in the present invention, by patrolling
It collects and connects connector on each pin of chip, equipment to be tested can be connected to logic core by connector by staff
At the respective pin of piece, enough operating spaces just so are provided for staff, it is clear that the debugging board in the present invention
Card, can greatly improve the debugging efficiency of staff.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of structure chart for debugging board provided in an embodiment of the present invention；
Fig. 2 is the structure chart of another debugging board provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
The embodiment of the invention discloses a kind of debugging boards, as shown in Figure 1, the debugging board includes:
It is integrated with the GPIO11 of the logical device of different function；
It is connected with GPIO11, the logic chip 12 for being handled input information and/or output information；
It is connected with each pin of logic chip 12, is used for transmission the connector 13 of input information and/or output information.
It in the present embodiment, is that the logical device for realizing Different Logic function is integrated in GPIO11 jointly first
In (General Purpose Input Output, general I/O port).It is also contemplated that when utilizing debugging board
It when card is treated test equipment and debugged, needs to connect with the equipment to be tested of different function, if it is using traditional serial ports
Either parallel port connects these equipment to be tested, the connection line that will seem complex, so, in the present embodiment, it is
Provided with a general programmable port I/O, that is, GPIO11, is stuck in practical application with this to improve debugging board
Versatility.
Also, by the logical device for integrating a variety of different function in GPIO11, debugging board card can be made to pass through
GPIO11 can test more different types of equipment to be tested, that is, staff is treating what test equipment was debugged
In the process, if equipment to be tested has a newly-increased logic function, staff be just not necessarily to the logic in debugging board card into
Row modification can directly treat the logic function increased newly in test equipment using the debugging board provided in the present embodiment and carry out
Test which thereby enhances the working efficiency of staff, also, also widened this implementation without carrying out heavy industry to debugging board card
The application range of board is debugged in example.
Then, it is arranged on debugging board and is connected with GPIO11, for handles input information and/or output information
Logic chip 12, so, staff is during treating test equipment using the debugging board and testing, only
Equipment to be tested need to be connect with GPIO11, the information that logic chip 12 can be treated in test equipment is handled, thus
So that staff judges whether the equipment to be tested is qualified product.
In addition, in the present embodiment, setting is used for transmission input information and/or output also at the pin of logic chip 12
The connector 13 of information, that is, being drawn the pin on logic chip 12 outward by connector 13, alternatively it is conceivable to, lead to
It crosses connector 13 and draws pin on logic chip 12, staff is during treating test equipment and debugging, with regard to nothing
It need to be connected with the respective pin on logic chip 12, equipment to be tested is directly connected to the connector 13 that logic chip 12 is drawn
It is upper, so, it can also achieve the purpose that for equipment to be tested to be connected with logic chip 12, it is clear that such operation
Mode can be staff when treating test equipment and debugging, and provide more debugging spaces.
Also, it is preferably tested in order to enable staff treats test equipment using debugging board, in this implementation
It is to be both provided with connector 13 at all pins of logic chip 12, that is, passing through connector 13 for logic chip 12 in example
On all pins be drawn out to the outside of logic chip 12, so, staff sets treating test using debugging board
For when being debugged, not only there are enough debugging spaces, moreover, can also increase the debugging efficiency of staff.
As it can be seen that be that the logical device for realizing different function is integrated in GPIO first in the present embodiment, then,
The logic chip for being handled input information and/or output information is connected on GPIO, and each on logic chip
Connection is used for transmission the connector of input information and/or output information at a pin.Therefore, when staff sets to be tested
For when being tested, equipment to be tested need to be only connected with GPIO, so that it may by logic chip to different types of to be tested
Equipment is tested, and is thus avoided in the prior art, and staff is using debugging board to Different Logic functional requirement
It when equipment to be tested is tested, needs to carry out debugging board card the tedious steps of heavy industry, also, in the present embodiment, passes through
Connector is connected on each pin of logic chip, equipment to be tested can be connected to by connector and be patrolled by staff
At the respective pin for collecting chip, enough operating spaces just so are provided for staff, it is clear that in the present embodiment
Board is debugged, the debugging efficiency of staff can be greatly improved.
Based on the above embodiment, the present embodiment is further described and optimizes to above-described embodiment, as shown in Fig. 2, tool
Body, pull-up resistor and/or pull down resistor 14 are provided on logic chip 12.
In practical application, pull-up resistor and/or pull down resistor 14 can be reserved on debugging board, with this come to patrolling
It collects chip 12 and corresponding pin and address logic is set, further to improve the logic function of logic chip 12, also facilitate work
Make the debugging that personnel treat test equipment in practical applications.Obviously, by logic chip 12 be arranged pull-up resistor and/or
The practicability that board is debugged in the present embodiment can be improved in pull down resistor 14.
Based on the above embodiment, the present embodiment is further described and optimizes to above-described embodiment, specifically, connector
Silk-screen label is equipped at 13 pin.
It is also contemplated that the pin on logic chip 12 is led to the outside of debugging board by connector 13, it can
It debugs and detects to facilitate staff to treat test equipment.But the function of each pin is not on logic chip 12
It is identical, at this point, silk-screen label can also be set on each connector 13 drawn by the pin of logic chip 12, such one
Come, distinctive mark can not only be carried out to each pin on logic chip 12 by the silk-screen label on connector 13, moreover,
But also staff can quickly search out the pipe of different function on logic chip 12 by the silk-screen label on connector 13
Foot substantially increases the working efficiency of staff.
Based on the above embodiment, the present embodiment is further described and optimizes to above-described embodiment, specifically, connector
Cable and/or winding displacement are connected on 13.
It is also contemplated that, in order to facilitate the use of staff, can will generally debug board in practical application
Size is arranged smaller.So in the present embodiment, in order to reduce the debugging space of debugging board to staff's operating process
Limitation, cable and/or winding displacement are also connected on connector 13, so, staff can pass through connector 13
On cable and/or winding displacement equipment to be tested and debugging board card are attached, with this come treat test equipment carry out detection with
Test, thus further increases staff and is treating the debugging space in test equipment debugging process, improve work people
The debugging experience of member.
Based on the above embodiment, the present embodiment is further described and optimizes to above-described embodiment, as shown in Fig. 2, tool
Body, the pin foot 15 of voltage conversion is provided on logic chip 12.
It is also contemplated that staff using debugging board during treating test equipment and debugging, it is to be measured
The type of examination equipment will be different, then, the supply voltage that equipment to be tested needs would also vary from, so, in this reality
It applies in example, the pin foot 15 for carrying out voltage conversion is also provided on logic chip 12, so, staff utilizes the tune
Test plate (panel) card is treated during test equipment tested, and there is no need to consider that equipment to be tested is to need great power supply electric
Pressure, can treat the problem of test equipment is debugged.Obviously, the pin foot of voltage conversion is provided on logic chip 12
15, widen the application range that board is debugged in the present embodiment.
Based on the above embodiment, the present embodiment is further described and optimizes to above-described embodiment, as shown in Fig. 2, tool
Body, wire jumper or resistance 16 are provided on logic chip 12.
It is understood that in practical application, staff is adjusted treating test equipment using debugging board
During examination, the threshold level of the low and high level of different circuits be will be different, and wire jumper is arranged on logic chip 12 at this time
And/or resistance 16 can guarantee that logic chip 12 exports correct level, thereby ensure that logic chip 12 in use
Safety and reliability.
Based on the above embodiment, the present embodiment is further described and optimizes to above-described embodiment, specifically, logic core
Piece 12 is specially the chip that high speed signal can be converted to low speed signal.
It is also contemplated that generally requiring during treating test equipment using debugging board and being tested with very
High speed goes to acquire the data in equipment to be tested, still, is treating what test equipment was debugged using logic chip 12
In the process, it does not need to go to handle these data with same frequency when acquisition data.So being that will patrol in the present embodiment
It collects chip 12 to be configured to being converted to high speed signal into the logic chip of low speed signal, to improve the practicability of debugging board.
Specifically, logic chip 12 is specially that I2C switching chip and/or URAT Buffer switching chip and/or RMII are cut
Change chip and/or JTAG switching chip.
In the present embodiment, logic chip 12 can be set to I2C (Inter-Integrated Circuit) switching
Chip, alternatively it is conceivable to, the logical device debugged in board is numerous, and the level signal of each logical device required input is respectively not
It is identical, so, by I2C switch chip can level signal to input and/or output converted accordingly, subtracted with this
The quantity of connection line in board is debugged less.In practical application, it can use PCA9617 or 74 family chips to realize this
Function.
Alternatively, logic chip 12 can be set to URAT (Universal Asynchronous Receiver
Transmitter, universal asynchronous receiving-transmitting transmitter) switching chip, alternatively it is conceivable to being is usually to adopt in the inside of logic chip 12
With parallel data, at this point, the asynchronous transmission of data is just able to achieve by the processing of URAT switching chip, so, in this reality
Apply in example, be to integrate URAT switching chip on logic chip 12, with realize transmission data serial communication and parallel communications it
Between conversion.In practical application, ST32443 or MAX232 can use to realize the function.
Alternatively, logic chip 12 can be set to RMII (Reduced Media Independent Interface,
Multi port switch) switching chip, alternatively it is conceivable to, institute during ethernet communication can be reduced using RMII switching chip
The quantity for needing signal wire thereby reduces the design cost of debugging board.In practical application, TS3L501 can use
To realize the function.
Alternatively, logic chip 12 can also be set to JTAG (Joint Test Action Group) switching chip, show
So, since the programming mode of JTAG is utilized in the mode of line programming, so, switching chip by JTAG can be to logic chip
All components inside 12 carry out online programming, which thereby enhance the debugging progress for treating test equipment.In practical application,
74CB family chip be can use to realize the function.
Obviously, through this embodiment provided in debugging board, can not only make the debugging board in the present embodiment
It can be adapted for more practical application scenes, furthermore, it is also possible to improve the practicability of debugging board, substantially increase work people
The testing efficiency of member.
Based on the above embodiment, the present embodiment makees further optimization and explanation to above-described embodiment, specifically, logic device
Part includes logical operation device and/or voltage converter part and/or timing resetting device and/or voltage current adapter part.
It is understood that GPIO11 is a kind of common pin for capableing of dynamic configuration and control during software operation,
In the present embodiment, it is to be integrated with the logical device of Different Logic function on GPIO11, reality is stuck in improve debugging board with this
Versatility in the application of border.
Specifically, being that logical operation device is integrated in GPIO11, that is, may be implemented using logical operation device
Various logic operation to input information and/or output information, such as: input information is carried out and door operation or door operation, non-
Door operation, nor gate operation and NAND gate operation etc., are debugged to treat test equipment with this, are worked as in practical application
In, it can use 74 family chips to realize the function.
In the present embodiment, it also converts the voltage into device to be integrated in GPIO11, that is, utilizing voltage conversion device reality
Now to the conversion of voltage, to adapt to the debugging demand of different equipment to be tested, in practical application, it can use 74 serial cores
Piece either GTL2014 realizes the function.
Also, in the present embodiment, also timing resetting device is integrated in GPIO11, that is, being reset using timing
Device realizes the conversion of timing resetting, so, if there is mistake in debugging process in staff, work people
Member can treat test equipment using the logical device and be debugged again, to reduce mistake of the staff in debugging process
Accidentally rate.In practical application, LM555 can use to realize the function.
In addition, in the present embodiment, also voltage current adapter part is integrated in GPIO11, specifically, can benefit
Voltage signal is converted into current signal to realize with metal-oxide-semiconductor, is detected and is debugged to treat test equipment, in practical application
In the middle, it can use NX7002 either PMV160 to realize the function.
Obviously, the debugging board provided in the present embodiment, by collecting the logical device for realizing Different Logic function jointly
At in GPIO11, it can remove from the prior art, the logic function of staff's test different types equipment to be tested
When, the problem of heavy industry is carried out to debugging board card is needed, the debugging efficiency of staff is which thereby enhanced.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with it is other
The difference of embodiment, same or similar part may refer to each other between each embodiment.Finally, it is also necessary to explanation
It is that herein, relational terms such as first and second and the like are used merely to an entity or operation and another
Entity or operation distinguish, and without necessarily requiring or implying between these entities or operation, there are any this actual passes
System or sequence.Moreover, the terms "include", "comprise" or any other variant thereof is intended to cover non-exclusive inclusion, from
And to include the process, method, article or equipments of a series of elements not only to include those elements, but also including not bright
The other element really listed, or further include for elements inherent to such a process, method, article, or device.Do not having
In the case where more limitations, the element that is limited by sentence "including a ...", it is not excluded that include the element process,
There is also other identical elements in method, article or equipment.
A kind of debugging board card provided by the present invention is described in detail above, specific case pair used herein
The principle of the present invention and embodiment are expounded, method of the invention that the above embodiments are only used to help understand
And its core concept；At the same time, for those skilled in the art, according to the thought of the present invention, in specific embodiment and
There will be changes in application range, in conclusion the contents of this specification are not to be construed as limiting the invention.
Claims (9)
1. a kind of debugging board characterized by comprising
It is integrated with the GPIO of the logical device of different function；
It is connected with the GPIO, the logic chip for being handled input information and/or output information；
It is connected with each pin of the logic chip, is used for transmission the connection of the input information and/or the output information
Device.
2. debugging board according to claim 1, which is characterized in that be provided on the logic chip pull-up resistor and/
Or pull down resistor.
3. debugging board according to claim 1, which is characterized in that be equipped with silk-screen label at the pin of the connector.
4. debugging board according to claim 1, which is characterized in that be connected with cable and/or winding displacement on the connector.
5. debugging board according to claim 1, which is characterized in that be provided with voltage conversion on the logic chip
Pin foot.
6. debugging board according to claim 1, which is characterized in that be provided with wire jumper or resistance on the logic chip.
7. debugging board according to claim 1, which is characterized in that the logic chip is specially can be by high speed signal
Be converted to the chip of low speed signal.
8. debugging board according to claim 7, which is characterized in that the logic chip be specially I2C switching chip and/
Or URAT Buffer switching chip and/or RMII switch chip and/or JTAG switches chip.
9. debugging board according to any one of claims 1 to 8, which is characterized in that the logical device includes logic fortune
Calculate device and/or voltage converter part and/or timing resetting device and/or voltage current adapter part.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811114639.7A CN109254891A (en) | 2018-09-25 | 2018-09-25 | A kind of debugging board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811114639.7A CN109254891A (en) | 2018-09-25 | 2018-09-25 | A kind of debugging board |
Publications (1)
| Publication Number | Publication Date |
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| CN109254891A true CN109254891A (en) | 2019-01-22 |
Family
ID=65048694
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| Application Number | Title | Priority Date | Filing Date |
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| CN201811114639.7A Pending CN109254891A (en) | 2018-09-25 | 2018-09-25 | A kind of debugging board |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111984530A (en) * | 2020-07-24 | 2020-11-24 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Method and system capable of flexibly and dynamically configuring debugging interface |
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| CN106055361A (en) * | 2016-05-31 | 2016-10-26 | 深圳市国鑫恒宇科技有限公司 | Integrated firmware implementation method and system based on various different models of BMC (baseboard management controller) |
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|---|---|---|---|---|
| US20140003145A1 (en) * | 2012-06-29 | 2014-01-02 | Jason B. Akers | Architectures and techniques for providing low-power storage mechanisms |
| CN104182006A (en) * | 2014-08-21 | 2014-12-03 | 浪潮电子信息产业股份有限公司 | Hard disk backboard designing method supporting redundancy of dual controllers |
| CN105844056A (en) * | 2016-04-15 | 2016-08-10 | 万高(杭州)科技有限公司 | GPIO (general purpose input/output) verification system and method |
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| CN111984530A (en) * | 2020-07-24 | 2020-11-24 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Method and system capable of flexibly and dynamically configuring debugging interface |
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Application publication date: 20190122 |