CN105223489A - A kind of interlock circuit testing apparatus and method of testing - Google Patents
A kind of interlock circuit testing apparatus and method of testing Download PDFInfo
- Publication number
- CN105223489A CN105223489A CN201510553251.7A CN201510553251A CN105223489A CN 105223489 A CN105223489 A CN 105223489A CN 201510553251 A CN201510553251 A CN 201510553251A CN 105223489 A CN105223489 A CN 105223489A
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- master controller
- signal
- testing
- information
- interlock circuit
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
Abstract
Semiconductor interlock circuit detection technique field of the present invention is particularly a kind of interlock circuit testing apparatus and method of testing, comprises treating detection signal and being configured; According on the corresponding port of pcb board that corresponding state write is tested by the signal of configuration; Pcb board changes according to the state of input end, and the circuit that can work will work, and corresponding state output terminal changes; The output terminal output valve changed is compared with the information that configures in step 1 after gathering, and is described by the numerical value of failing to match and preserves.The solution test duration is longer, and reliability is low, and the problem of the pcb board be easier to test or component damage, this testing apparatus can carry out batch testing, not only improves testing efficiency, reduces the test duration, also can ensure the total quality tested simultaneously, product and element are not damaged.
Description
Technical field
Semiconductor interlock circuit detection technique field of the present invention is particularly a kind of interlock circuit testing apparatus and method of testing.
Background technology
Interlock circuit, for ensureing the safety of personnel and equipment, so the functional test relative requirement of this part is comparatively strict, each road of interlock circuit all can a certain Pin pin in corresponding PCB interface, and when each condition can be met the status information of condition, it is safe for just representing this operation, and corresponding interface state can change, when in all many condition some or several do not satisfy condition time, this operation is just prohibited, and corresponding port status also can not change.
Existing test mainly adopts manual testing, and the test duration is longer, and reliability is low, and is easier to the pcb board of test or component damage.
Summary of the invention
Technical matters to be solved by this invention is that providing a kind of improves testing efficiency, reduces interlock circuit testing apparatus and the method for testing of test duration.
The present invention is achieved in that a kind of interlock circuit method of testing, comprises following step:
Step 1: treat detection signal and be configured;
Step 2: according on the corresponding port of pcb board that corresponding state write is tested by the signal of configuration;
Step 3:PCB buttress changes according to the state of input end, and the circuit that can work will work, and corresponding state output terminal changes;
Step 4: the output terminal output valve changed is compared with the information that configures in step 1 after gathering, and is described by the numerical value of failing to match and preserves.
The present invention further, opening operation interface in step 1, carry out signal configures, signal carries out communication by Ethernet and main control, each road signal all can be corresponding with a certain passage of master controller, when the information configuration on interface completes, after communication is set up, change the respective channel of master controller according to the information of configuration.
The present invention further, in step 2, when master controller respective channel state changes, master controller can according to the logical program that there is master controller inside, process accordingly, and the status information write after process will be needed in the corresponding Pin pin of the corresponding port of hardware PCB of test.
The present invention further, in step 3, each road of interlock circuit all can a certain Pin pin in corresponding PCB interface, when each condition can be met the status information of condition, it is safe for representing this operation, and 24V voltage will be exported in corresponding interface, when in all many condition some or several do not meet time, not do not export.
Further, in step 4, the output valve changed can contrast with the value in program in the present invention, if unanimously, the DO amount in interface can change color, if inconsistent, the Information meeting information in interface, so that tester's orientation problem faster.
A kind of interlock circuit testing apparatus, comprising:
Peripheral connecting circuit device, for the connection of the Pin pin with hardware PCB;
Data acquisition unit, after being connected with peripheral connecting circuit, under the control of master controller, adopts sensor to gather non electrical quantity or electric quantity signal in the analog-and digital-unit under test of Devices to test;
Master controller, the configuration of signal to be detected is carried out by the display that is connected with master controller and input keyboard, and by the signal that master controller configures, corresponding state is write on the corresponding port of pcb board of test, after control data collecting unit carries out the collection of data, the information of collection and the information of configuration are compared, the numerical value of failing to match is described and preserves.
Compared with prior art, beneficial effect is in the present invention: this testing apparatus can carry out batch testing, not only improves testing efficiency, reduces the test duration, also can ensure the total quality tested simultaneously, product and element are not damaged.
Accompanying drawing explanation
The circuit block diagram that Fig. 1 provides for the embodiment of the present invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
As the interlock circuit method of testing in one embodiment of the invention, comprise following step:
Step 1: treat detection signal and be configured; Opening operation interface, operation interface can show the title of we pre-configured DI/DO (input/output signal), and can there be check box the front end of each signal, these signals carry out communication by Ethernet and main control, Signal transmissions, each road signal all can be corresponding with a certain passage of master controller, when the information configuration on interface completes, after communication is set up, namely in the respective channel changing master controller.
Step 2: according on the corresponding port of pcb board that corresponding state write is tested by the signal of configuration; When main control respective channel state changes, master controller according to the logical program that there is master controller inside, can process accordingly, and the status information write after process is about in the corresponding Pin pin of the corresponding port of hardware PCB needing test.
Step 3:PCB buttress changes according to the state of input end, and the circuit that can work will work, and corresponding state output terminal changes, owing to there is more interlock circuit in pcb board, for ensureing the safety of personnel and equipment, comparatively strict with the functional test relative requirement of this part, each road of interlock circuit all can a certain Pin pin in corresponding PCB interface, when each condition can be met the status information of condition, it is safe for just representing this operation, and 24V voltage will be exported in corresponding interface, when in all many condition some or several meet (stateless change) time, just cannot export 24V voltage, so just can detect the pcb board design of interlocking, processing, whether the links such as welding have problems.
Step 4: the output terminal output valve changed is compared with the information that configures in step 1 after gathering, and is described by the numerical value of failing to match and preserves.For a circuit, input is had just to have output, 24V voltage in last point just can think that road exports, when whole circuit no problem, when input state changes, output is bound to change, and these changes are predicted in advance, and have existed inside corresponding program, and the value changed can contrast with the value in program, if consistent, DO amount in interface can change color, becomes green from original yellow, if inconsistent, Information meeting information in interface, so that tester's orientation problem faster.
See Fig. 1, a kind of interlock circuit testing apparatus that the embodiment of the present invention provides, peripheral connecting circuit device, for the connection of the Pin pin with hardware PCB;
Data acquisition unit, after being connected with peripheral connecting circuit, under the control of master controller, adopts sensor to gather non electrical quantity or electric quantity signal in the analog-and digital-unit under test of Devices to test;
Master controller, the configuration of signal to be detected is carried out by the display that is connected with master controller and input keyboard, and by the signal that master controller configures, corresponding state is write on the corresponding port of pcb board of test, after control data collecting unit carries out the collection of data, the information of collection and the information of configuration are compared, the numerical value of failing to match is described and preserves.
Master controller is made up of controller, arithmetical unit and register, and these circuit are all integrated in a chip.CPU is connected with storage unit, input/output interface circuit by data bus, address bus and control bus.The same with general computing machine, CPU is the core of PLC, and the function commander PLC that it is given by system program in PLC carries out work without any confusion.User program and data are in advance stored in storer, and when PLC is in the method for operation, CPU performs user program by scan round mode.
Be connected in testing apparatus by needing the pcb board of test by Peripheral Interface Element, testing apparatus is powered on, make modules unit in running order, opening operation interface, measured signal is configured in interface, namely choose the check box of signal name front end, processor can according to the signal of configuration by the corresponding port of pcb board of corresponding state write test, pcb board can change according to the state of input end, the circuit that can work will work, corresponding state output terminal will change, the state value changed can show in the middle of interface, and contrast with the information starting to configure, the numerical value of failing to match is described, and preserve, for tester's analysis circuit fault is offered help.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. an interlock circuit method of testing, is characterized in that, comprises following step:
Step 1: treat detection signal and be configured;
Step 2: according on the corresponding port of pcb board that corresponding state write is tested by the signal of configuration;
Step 3:PCB buttress changes according to the state of input end, and the circuit that can work will work, and corresponding state output terminal changes;
Step 4: the output terminal output valve changed is compared with the information that configures in step 1 after gathering, and is described by the numerical value of failing to match and preserves.
2., according to interlock circuit method of testing according to claim 1, it is characterized in that,
Opening operation interface in step 1, carries out signal configures, and signal carries out communication by Ethernet and main control, each road signal all can be corresponding with a certain passage of master controller, when the information configuration on interface completes, after communication is set up, change the respective channel of master controller according to the information of configuration.
3. according to interlock circuit method of testing according to claim 1, it is characterized in that, in step 2, when master controller respective channel state changes, master controller can according to the logical program that there is master controller inside, process accordingly, and the status information write after process will be needed in the corresponding Pin pin of the corresponding port of hardware PCB of test.
4. according to interlock circuit method of testing according to claim 1, it is characterized in that, in step 3, each road of interlock circuit all can a certain Pin pin in corresponding PCB interface, when each condition can be met the status information of condition, it is safe for representing this operation, and will export 24V voltage in corresponding interface, when in all many condition some or several do not meet time, not do not export.
5. according to interlock circuit method of testing according to claim 1, it is characterized in that, in step 4, the output valve changed can contrast with the value in program, if consistent, the DO amount in interface can change color, if inconsistent, information in interface is look at and is understood information, so that tester's orientation problem faster.
6. an interlock circuit testing apparatus, is characterized in that, comprising:
Peripheral connecting circuit device, for the connection of the Pin pin with hardware PCB;
Data acquisition unit, after being connected with peripheral connecting circuit, under the control of master controller, adopts sensor to gather non electrical quantity or electric quantity signal in the analog-and digital-unit under test of Devices to test;
Master controller, the configuration of signal to be detected is carried out by the display that is connected with master controller and input keyboard, and by the signal that master controller configures, corresponding state is write on the corresponding port of pcb board of test, after control data collecting unit carries out the collection of data, the information of collection and the information of configuration are compared, the numerical value of failing to match is described and preserves.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510553251.7A CN105223489A (en) | 2015-09-01 | 2015-09-01 | A kind of interlock circuit testing apparatus and method of testing |
| PCT/CN2015/092173 WO2017035927A1 (en) | 2015-09-01 | 2015-10-19 | Interlocking circuit test equipment and test method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510553251.7A CN105223489A (en) | 2015-09-01 | 2015-09-01 | A kind of interlock circuit testing apparatus and method of testing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105223489A true CN105223489A (en) | 2016-01-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510553251.7A Pending CN105223489A (en) | 2015-09-01 | 2015-09-01 | A kind of interlock circuit testing apparatus and method of testing |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN105223489A (en) |
| WO (1) | WO2017035927A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106370995A (en) * | 2016-08-18 | 2017-02-01 | 中国电力科学研究院 | Automatic device and method for writing programs into circuit boards in batches while conducting tests thereto at the same time |
| CN110794730A (en) * | 2019-10-18 | 2020-02-14 | 合肥森弗卡电子科技有限公司 | Intelligent test analysis system for safety technology protection engineering |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113118055B (en) * | 2021-03-31 | 2022-10-04 | 深圳市磐锋精密技术有限公司 | Product detecting and sorting system based on big data |
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| CN104203635A (en) * | 2012-03-28 | 2014-12-10 | 罗伯特·博世有限公司 | Interlock detector with self-diagnosis function for an interlock circuit, and method for the self-diagnosis of the interlock detector |
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| JPH0989999A (en) * | 1995-09-28 | 1997-04-04 | Advantest Corp | Semiconductor testing device |
| US6801869B2 (en) * | 2000-02-22 | 2004-10-05 | Mccord Don | Method and system for wafer and device-level testing of an integrated circuit |
| CN102207536A (en) * | 2010-03-31 | 2011-10-05 | 英业达股份有限公司 | Signal detection device for circuit board |
| CN102608518A (en) * | 2012-02-29 | 2012-07-25 | 华为技术有限公司 | Chip testing method and device |
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2015
- 2015-09-01 CN CN201510553251.7A patent/CN105223489A/en active Pending
- 2015-10-19 WO PCT/CN2015/092173 patent/WO2017035927A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101514552A (en) * | 2008-10-22 | 2009-08-26 | 中交天津港湾工程研究院有限公司 | Sensor for detecting interlocking state of steel sheet piles |
| CN104203635A (en) * | 2012-03-28 | 2014-12-10 | 罗伯特·博世有限公司 | Interlock detector with self-diagnosis function for an interlock circuit, and method for the self-diagnosis of the interlock detector |
| CN104377684A (en) * | 2013-08-13 | 2015-02-25 | 上海汽车集团股份有限公司 | Interlocking detecting circuit, system and method of high-voltage parts |
| CN204136792U (en) * | 2014-08-29 | 2015-02-04 | 长城汽车股份有限公司 | A kind of checking system of high-voltage interlocking loop and hybrid vehicle |
| CN104569656A (en) * | 2014-12-12 | 2015-04-29 | 华晨汽车集团控股有限公司 | Device and method for detecting high-voltage interlocking failure of electric vehicle |
| CN204314399U (en) * | 2014-12-12 | 2015-05-06 | 华晨汽车集团控股有限公司 | A kind of electric automobile high-voltage interlock fault pick-up unit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106370995A (en) * | 2016-08-18 | 2017-02-01 | 中国电力科学研究院 | Automatic device and method for writing programs into circuit boards in batches while conducting tests thereto at the same time |
| CN106370995B (en) * | 2016-08-18 | 2021-07-13 | 中国电力科学研究院 | Automatic device and method for batch writing and testing of circuit boards |
| CN110794730A (en) * | 2019-10-18 | 2020-02-14 | 合肥森弗卡电子科技有限公司 | Intelligent test analysis system for safety technology protection engineering |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2017035927A1 (en) | 2017-03-09 |
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Application publication date: 20160106 |