CN108491057A - A kind of starting-up method and its server of server - Google Patents
A kind of starting-up method and its server of server Download PDFInfo
- Publication number
- CN108491057A CN108491057A CN201810298337.3A CN201810298337A CN108491057A CN 108491057 A CN108491057 A CN 108491057A CN 201810298337 A CN201810298337 A CN 201810298337A CN 108491057 A CN108491057 A CN 108491057A
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- Prior art keywords
- signal
- starting
- booting
- sequential
- server
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3058—Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
Abstract
This application provides a kind of starting-up methods of server, including：The first starting-up signal is monitored, judges whether the first starting-up signal of the server is healthy；When first starting-up signal is health signal, execute the boot action of the first booting sequential instruction, first starting-up signal is used to indicate the first booting sequential, and indicate that the server sends out the starting-up signal of the second booting sequential, wherein, the second booting sequential is the adjacent next sequential of the first booting sequential；When first starting-up signal is not health signal, the server stops executing boot action.Therefore, the application is by the monitoring and controlling to having enabled electric signal etc. in start process, to realize that the reliable and stable booting of server powers on.
Description
Technical field
This application involves industry service device fields, and more particularly, to the starting-up method and its clothes of a kind of server
Business device.
Background technology
Complex Programmable Logic Devices (English：Complex Programmable Logic Device, write a Chinese character in simplified form：CPLD)
Or field programmable gate array (English：Field Programmable GATE Array, write a Chinese character in simplified form：FPGA) in server controls
Switching on and shutting down timing control, LED light control, communication and alarm signal control etc. are mainly responsible in system, with CPLD-
FPGA is more and more important in server system, and it is to ensure entire server system to improve the design of CPLD-FPGA reliabilities
Normal work basis.Need to follow in start process all power supply signals in front could reliably continue after output it is enabled next
Power supply signal is not monitored all electric signals before in traditional design, this is generally not in problem, but if
The abnormal signals such as power supply and ignore before and take no action to continue to execute start process, is on the one hand not easy orientation problem, separately
On the one hand the booting sequential of mistake may lead to system crash.
Therefore, there is an urgent need for a kind of starting-up method of server, the reliability of server start process can be promoted.
Invention content
The application provides a kind of starting-up method of server, can promote the reliability of server start process.
In a first aspect, a kind of starting-up method of server is provided, including：The first starting-up signal is monitored, judges the service
Whether the first starting-up signal of device is healthy；When first starting-up signal is health signal, the first booting sequential is executed
The boot action of instruction, first starting-up signal is used to indicate the first booting sequential, and indicates that the server is sent out
The starting-up signal of second booting sequential, wherein the second booting sequential be described first be switched on sequential adjacent next when
Sequence；When first starting-up signal is not health signal, the server stops executing boot action.
With reference to first aspect, in the first possible realization method of first aspect, when first starting-up signal not
When being monitoring signal, the method further includes：Export the first booting sequential of the first starting-up signal instruction.
With reference to first aspect and its above-mentioned realization method, described in second of possible realization method of first aspect
Method is based on on-site programmable gate array FPGA or complex programmable logic device (CPLD) is realized.
Second aspect, provides a kind of server, and the server includes booting control module, the booting control module packet
It includes：Starting-up signal monitoring unit, the starting-up signal monitoring unit judge the server for monitoring the first starting-up signal
Whether the first starting-up signal is healthy；Be switched on timing control unit, and the booting timing control unit is used in first booting
When signal is health signal, the boot action of the first booting sequential instruction is executed, first starting-up signal is used to indicate
The first booting sequential, and indicate that the server sends out the starting-up signal of the second booting sequential, wherein second booting
Sequential is the adjacent next sequential of the first booting sequential；The booting timing control unit is additionally operable to open described first
When machine signal is not health signal, indicate that the server stops executing boot action.
In conjunction with second aspect, in the first possible realization method of second aspect, the booting timing control unit
It is additionally operable to：Export the first booting sequential of the first starting-up signal instruction.
It is described in second of possible realization method of second aspect in conjunction with second aspect and its above-mentioned realization method
Switching on and shutting down control module is based on on-site programmable gate array FPGA or complex programmable logic device (CPLD) is realized.
Therefore, the application is by the monitoring and controlling to having enabled electric signal etc. in start process, to realize server
Reliable and stable booting powers on.
Description of the drawings
Fig. 1 is the schematic flow chart of the method for the application one embodiment.
Fig. 2 is the schematic flow chart of the method for the application another embodiment.
Fig. 3 shows the schematic block diagram of the switching on and shutting down control module of the server of the application one embodiment.
Fig. 4 shows the schematic block diagram of the switching on and shutting down control module of the server of the application one embodiment.
Specific implementation mode
Below in conjunction with attached drawing, the technical solution in the application is described.
CPLD-FPGA is the application-specific integrated circuit of semi-custom, has the characteristics that may be programmed, repeatedly clash, in service tolerance
Before production, chip flow, CPLD-FPGA design engineer can design circuit by hardware description language and carry out fully testing for function
Card.
For the health status of all electric signals etc., this patent propose a kind of based on CPLD- before in monitoring start process
Electric signal monitoring starting-up method has been enabled in the power up of FPGA, has been enabled in a kind of power up based on CPLD-FPGA
Electric signal monitoring starting-up method is related to the tactful field of server booting, and in particular to institute before one kind is detected by CPLD-FPGA
There is the health status of electric signal etc., and be based on this, carries out the enabled control of next electric signal etc..It is a kind of based on CPLD-FPGA's
It refers to designing electric signal by hardware description language based on CPLD-FPGA that electric signal monitoring starting-up method has been enabled in power up
Deng observation circuit, this observation circuit include before all electric signals etc. health status, electric signal etc. is judged：Such as
All electric signals etc. are normal before fruit, enable the Enable Pin of next stage electric signal etc.；If electric signal etc. is not good for before monitoring
Health stops start process, and misregistration information.Based on aforesaid operations, according to sequential successively into horizontal electrical signal etc. it is enabled simultaneously
Booting, meanwhile, all electric signals etc. are monitored in start process.It has been enabled in power up based on CPLD-FPGA
The flow diagram that electric signal monitoring starting-up method each starts sequential is as shown in Figure 1.
Fig. 2 shows the schematic flow charts of the method for another embodiment of the application, as shown in Fig. 2, this method includes：
Step 210, the first starting-up signal is monitored, judges whether the first starting-up signal of the server is healthy.
Step 220, when first starting-up signal is health signal, the booting of the first booting sequential instruction is executed
Action, first starting-up signal are used to indicate the first booting sequential, and when indicating that the server sends out the second booting
The starting-up signal of sequence, wherein the second booting sequential is the adjacent next sequential of the first booting sequential；
When first starting-up signal is not health signal, the server stops executing boot action.
Wherein, the first starting-up signal be server start process in any electric signal, the PWRGD signals of generally VR,
The other signals of other participation sequence switch machine controls are not excluded for, the first booting sequential is the associated sequential of the first starting-up signal.
That is, having enabled electric signal monitoring starting-up method in a kind of power up based on CPLD-FPGA enabled
The electric signal etc. for having enabled to open can be monitored in real time during opening next electricity, if electric signal etc. is no before detecting
Health will no longer enable to open next electricity.
Optionally, as the application one embodiment, when first starting-up signal is not monitoring signal, the method
Further include：Export the first booting sequential of the first starting-up signal instruction.
Further, electric signal monitoring starting-up method has been enabled in a kind of power up based on CPLD-FPGA to detect
It can stop start process, while meeting misregistration position to electric signal before is unhealthy, facilitate engineer's test and debugging.It avoids
Continue the risk that booting is brought under error condition.
Optionally, as the application one embodiment, the method is based on on-site programmable gate array FPGA or complexity can
Programmed logic device CPLD is realized.
That is, it is based on existing to have enabled electric signal monitoring starting-up method in the power up based on CPLD-FPGA
Engineering carry out improvement, hardware cost will not be increased, while increasing the security reliability of server system.
Fig. 3 shows the schematic block diagram of the switching on and shutting down control module of the server of the application one embodiment, such as Fig. 3 institutes
Show, the server includes booting control module, and the booting control module 300 includes：
Starting-up signal monitoring unit 310, the starting-up signal monitoring unit 310 judge for monitoring the first starting-up signal
Whether the first starting-up signal of the server is healthy；
Be switched on timing control unit 320, and the booting timing control unit 320 is used in first starting-up signal be strong
When health signal, the boot action of the first booting sequential instruction is executed, first starting-up signal is used to indicate described first
Be switched on sequential, and indicates that the server sends out the starting-up signal of the second booting sequential, wherein the second booting sequential is institute
State the adjacent next sequential of the first booting sequential；
The booting timing control unit 320 is additionally operable to when first starting-up signal is not health signal, indicates institute
Server is stated to stop executing boot action.
Optionally, as the application one embodiment, the booting timing control unit 320 is additionally operable to：Export described
First booting sequential of one starting-up signal instruction.
Optionally, as the application one embodiment, the switching on and shutting down control module 300 is based on field programmable gate array
FPGA or complex programmable logic device (CPLD) are realized.
Electric signal start-up control method is enabled in the power up based on CPLD-FPGA that the application proposes, by hard
The hardware circuit in CPLD-FPGA is described in part description language, in real time to the progress such as electric signal in powering on start process
Monitoring：According to booting sequential, all electric signals etc. before can be monitored during the enabled next electric signal of unlatching, most
In the case of, electric signal etc. is all healthy before, enables to open next electricity at this time, and enable to open successively according to booting timing requirements
Open each electricity；If electric signal etc. is unhealthy before being detected during enabled some electric signal of unlatching, booting no longer will be performed
Process, and output error message.
Fig. 4 shows the schematic diagram of the switching on and shutting down control module of the another embodiment of the application, as shown in Figure 4.
Include other control modules and switching on and shutting down control module, sheet based on the server admin control that CPLD-FPGA is realized
The Optimal improvements of the to the effect that switching on and shutting down control module of patent, the switching on and shutting down control module include the detections such as electric signal
Module and switching on and shutting down timing control output module, the detection modules such as electric signal are mainly monitored electric signal of input etc., and
Input of the output signal " healthy Warning Mark position " as switching on and shutting down timing control output module, switching on and shutting down timing control export mould
Root tuber controls the enabled unlatching of next electric signal etc. according to this signal.The switching on and shutting down control module specifically includes：
1. detection modules such as electric signals
The detection modules such as electric signal are to be monitored in real time to electric signal etc., in particular to open next signal enabled
When will be using the health status of electric signal etc. as standard.Control monitored when the input signal of the detection modules such as electric signal
Electric signal etc., the PWRGD signals of generally VR, however not excluded that other other signals for participating in the control of sequence switch machine；Electric signal etc.
The output signal of detection module, that is, input signal of the signal health Warning Mark position as switching on and shutting down timing control output module.
2. switching on and shutting down timing control output module
Switching on and shutting down timing control output module is made with the output signal " healthy Warning Mark position " of the detection modules such as electric signal
Tagmeme when opening the Enable Pin of next VR etc. for standard is enabled, while exporting " instruction switching on and shutting down location information " real-time display booting
It sets.When " the healthy Warning Mark position " that the detection modules such as electric signal monitor in real time is that low signal is i.e. invalid, switching on and shutting down sequential control
Output module processed will not continue to execute boot action according to booting sequential, while export the timing position that is switched at this time.
Specifically, switching on and shutting down control module design of the embodiment of the present application based on CPLD-FPGA, and pass through Hardware description language
Speech realizes the hardware circuit；By the Enable Pin of the PWRGD signals of the outputs such as VR, VR etc. be correspondingly connected with CPLD-FPGA input,
Output end, and the signal for " the instruction switching on and shutting down location information " that switching on and shutting down control module is exported is as the control terminal of LED；In item
The switching on and shutting down monitoring and controlling module of the above-mentioned design of exampleization in mesh Top-layer Design Method；By in burning program to CPLD/FPGA, switch is realized
The monitoring and controlling of machine；And above-mentioned design method is applied in server start process.
To solve to establish by cable real-time monitoring of the realization to electric signal before etc. during machine on the server, and it is based on this signal
The control to start process is realized according to booting sequential, even if preventing from also continuing to execute booting since electric signal etc. is unhealthy before
It acts the system disorders that may be brought and problem is not easy orientation problem, electric signal etc. is introduced the monitoring of start process by this patent
In control, to realize the reliable booting of server.Meanwhile this patent is proposed and is realized a kind of based on the upper of CPLD-FPGA
It is the design realized on having engineering foundation that electric signal monitoring starting-up method has been enabled in electric process, therefore, will not be increased hard
Part cost.
Those of ordinary skill in the art may realize that lists described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps can be realized with the combination of electronic hardware or computer software and electronic hardware.These functions are actually
It is implemented in hardware or software, depends on the specific application and design constraint of technical solution.Professional technician
Each specific application can be used different methods to achieve the described function, but this realization is it is not considered that exceed
The scope of the present invention.
It is apparent to those skilled in the art that for convenience and simplicity of description, the system of foregoing description,
The specific work process of device and unit, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with
It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the unit
It divides, only a kind of division of logic function, formula that in actual implementation, there may be another division manner, such as multiple units or component
It can be combined or can be integrated into another system, or some features can be ignored or not executed.Another point, it is shown or
The mutual coupling, direct-coupling or communication connection discussed can be the indirect coupling by some interfaces, device or unit
It closes or communicates to connect, can be electrical, machinery or other forms.
The unit illustrated as separating component may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, you can be located at a place, or may be distributed over multiple
In network element.Some or all of unit therein can be selected according to the actual needs to realize the mesh of this embodiment scheme
's.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, it can also
It is that each unit physically exists alone, it can also be during two or more units be integrated in one unit.
It, can be with if the function is realized in the form of SFU software functional unit and when sold or used as an independent product
It is stored in a computer read/write memory medium.Based on this understanding, technical scheme of the present invention is substantially in other words
The part of the part that contributes to existing technology or the technical solution can be expressed in the form of software products, the meter
Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be
People's computer, server or the second equipment etc.) it performs all or part of the steps of the method described in the various embodiments of the present invention.
And storage medium above-mentioned includes：USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited
The various media that can store program code such as reservoir (RAM, Random Access Memory), magnetic disc or CD.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (6)
1. a kind of starting-up method of server, which is characterized in that including：
The first starting-up signal is monitored, judges whether the first starting-up signal of the server is healthy；
When first starting-up signal is health signal, the boot action of the first booting sequential instruction is executed, described the
One starting-up signal is used to indicate the first booting sequential, and indicates that the server sends out the booting letter of the second booting sequential
Number, wherein the second booting sequential is the adjacent next sequential of the first booting sequential；
When first starting-up signal is not health signal, the server stops executing boot action.
2. according to the method described in claim 1, it is characterized in that, when first starting-up signal is not monitoring signal, institute
The method of stating further includes：
Export the first booting sequential of the first starting-up signal instruction.
3. method according to claim 1 or 2, which is characterized in that the method is based on on-site programmable gate array FPGA
Or complex programmable logic device (CPLD) is realized.
4. a kind of server, which is characterized in that the server includes booting control module, and the booting control module includes：
Starting-up signal monitoring unit, the starting-up signal monitoring unit judge the server for monitoring the first starting-up signal
The first starting-up signal it is whether healthy；
Be switched on timing control unit, and the booting timing control unit is used for when first starting-up signal is health signal,
The boot action of the first booting sequential instruction is executed, first starting-up signal is used to indicate the first booting sequential,
And indicate that the server sends out the starting-up signal of the second booting sequential, wherein the second booting sequential is opened for described first
The adjacent next sequential of machine sequential；
The booting timing control unit is additionally operable to, when first starting-up signal is not health signal, indicate the server
Stop executing boot action.
5. server according to claim 4, which is characterized in that the booting timing control unit is additionally operable to：
Export the first booting sequential of the first starting-up signal instruction.
6. server according to claim 4 or 5, which is characterized in that the switching on and shutting down control module, which is based on scene, to be compiled
Journey gate array FPGA or complex programmable logic device (CPLD) are realized.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810298337.3A CN108491057A (en) | 2018-04-03 | 2018-04-03 | A kind of starting-up method and its server of server |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810298337.3A CN108491057A (en) | 2018-04-03 | 2018-04-03 | A kind of starting-up method and its server of server |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108491057A true CN108491057A (en) | 2018-09-04 |
Family
ID=63314659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810298337.3A Pending CN108491057A (en) | 2018-04-03 | 2018-04-03 | A kind of starting-up method and its server of server |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109918250A (en) * | 2019-03-13 | 2019-06-21 | 浪潮商用机器有限公司 | A kind of method, apparatus and readable storage medium storing program for executing of server power supply timing sequence test |
| CN110032264A (en) * | 2019-04-16 | 2019-07-19 | 苏州浪潮智能科技有限公司 | A kind of progress control method of server, equipment and storage medium |
| CN111813037A (en) * | 2020-06-11 | 2020-10-23 | 中国长城科技集团股份有限公司 | Starting-up control method, starting-up control device and electronic equipment |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103019127A (en) * | 2011-09-23 | 2013-04-03 | 鸿富锦精密工业（深圳）有限公司 | Electrifying control circuit |
| CN105446851A (en) * | 2014-09-27 | 2016-03-30 | 研祥智能科技股份有限公司 | Processor monitoring method and system and MCU (Microprogrammed Control Unit) for monitoring processor |
| CN105892611A (en) * | 2016-04-01 | 2016-08-24 | 浪潮电子信息产业股份有限公司 | CPU power-on time sequence control method, device and system |
| CN106940587A (en) * | 2017-03-10 | 2017-07-11 | 郑州云海信息技术有限公司 | A kind of memory board powering method and structure based on OpenPower platforms |
| CN107678871A (en) * | 2017-09-13 | 2018-02-09 | 浙江大华技术股份有限公司 | A kind of electronic equipment starting-up method and electronic equipment |
| CN107783788A (en) * | 2017-10-26 | 2018-03-09 | 英业达科技有限公司 | The method started shooting after detection means and detection before start |
-
2018
- 2018-04-03 CN CN201810298337.3A patent/CN108491057A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103019127A (en) * | 2011-09-23 | 2013-04-03 | 鸿富锦精密工业（深圳）有限公司 | Electrifying control circuit |
| CN105446851A (en) * | 2014-09-27 | 2016-03-30 | 研祥智能科技股份有限公司 | Processor monitoring method and system and MCU (Microprogrammed Control Unit) for monitoring processor |
| CN105892611A (en) * | 2016-04-01 | 2016-08-24 | 浪潮电子信息产业股份有限公司 | CPU power-on time sequence control method, device and system |
| CN106940587A (en) * | 2017-03-10 | 2017-07-11 | 郑州云海信息技术有限公司 | A kind of memory board powering method and structure based on OpenPower platforms |
| CN107678871A (en) * | 2017-09-13 | 2018-02-09 | 浙江大华技术股份有限公司 | A kind of electronic equipment starting-up method and electronic equipment |
| CN107783788A (en) * | 2017-10-26 | 2018-03-09 | 英业达科技有限公司 | The method started shooting after detection means and detection before start |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109918250A (en) * | 2019-03-13 | 2019-06-21 | 浪潮商用机器有限公司 | A kind of method, apparatus and readable storage medium storing program for executing of server power supply timing sequence test |
| CN110032264A (en) * | 2019-04-16 | 2019-07-19 | 苏州浪潮智能科技有限公司 | A kind of progress control method of server, equipment and storage medium |
| CN111813037A (en) * | 2020-06-11 | 2020-10-23 | 中国长城科技集团股份有限公司 | Starting-up control method, starting-up control device and electronic equipment |
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Application publication date: 20180904 |
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