CN109240972A - A kind of GPU board and the VPX signal processing cabinet using the board - Google Patents
A kind of GPU board and the VPX signal processing cabinet using the board Download PDFInfo
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- CN109240972A CN109240972A CN201811304660.3A CN201811304660A CN109240972A CN 109240972 A CN109240972 A CN 109240972A CN 201811304660 A CN201811304660 A CN 201811304660A CN 109240972 A CN109240972 A CN 109240972A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/40—Constructional details, e.g. power supply, mechanical construction or backplane
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
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Abstract
A kind of GPU board towards VPX and the VPX signal processing cabinet using the board, which includes: PCIE to SRIO conversion module, CPU module, ethernet switching module and VPX connector.The present invention can satisfy high performance data transmission, process demand, have the advantages that reinforcing, miniaturization, good environmental adaptability simultaneously, it is particularly adapted to higher to size, power consumption, environmental suitability and reinforcement type index request, and needs to realize the application scenarios of high performance parallel information processing.
Description
Technical field
The present invention relates to a kind of GPU board, especially a kind of GPU board towards VPX framework and the VPX using the board
Signal processing cabinet.
Background technique
In fields such as booming sonar, radar and electronic countermeasures, signal handling equipment is usually by several functional modules
It is integrated in VPX to reinforce in cabinet, including computing module, SRIO Switching Module, ETH Switching Module etc., passes through the SRIO of VPX back panel
High-speed data exchange inside universal serial bus realization.
And the conventional means of signal processing is broadly divided into two classes at present: one kind is the processing platform using CPU as representative, another
Class is the array signal processing platform based on large scale integrated chips such as DSP and FPGA.The former is time-consuming serious, real-time
Difference;Although the latter can complete real time signal processing, also has that the development cycle is long, board is numerous and at high cost etc. many lack
Point.
Summary of the invention
The disclosure provides a kind of GPU board towards VPX structure and the VPX signal processing cabinet using the board,
Can be realized it is a kind of calculate real-time, cost, structure, in terms of the VPX signal that more optimizes of comprehensive performance
Processing equipment.
The one side of the disclosure provides a kind of GPU board, comprising: PCIE to SRIO conversion module, CPU module, ether
Net Switching Module and VPX connector, in which:
PCIE to SRIO conversion module is connected with external SRIO bus, by externally input SRIO data conversion at
PCIE data, output to CPU module;
Ethernet switching module is used to provide the communication interface between board and external ethernet;
VPX connector is used to be inserted into the VPX connector in VPX case back plate load slot.
Preferably, PCIE to SRIO conversion module uses Tsi721 chip, the PCIe interface and GPU mould of Tsi721 chip
Block connection, SRIO interface are connect with external SRIO bus.
Preferably, above-mentioned CPU module is Jetson TX2GPU module.
Preferably, include on board all the way or the parallel CPU module of two-way, and with the matched PCIE to of each CPU module
SRIO conversion module.
Preferably, when board includes two-way CPU module, ethernet switching module provides logical between the two-way CPU module
Letter.
It preferably, further include one or more of boundary scan module, IPMI module and forward direction I/O interface,
In:
Boundary scan module is used to carry out meeting IEEE1149.1 specification to PCIE to SRIO conversion module and CPU module
Jtag boundary sweep test;
IPMI module is monitored the parameters such as the temperature of board, voltage, electric current by IPMB bus, and support excess temperature,
Over-voltage, overcurrent protection;
Forward direction I/O interface is for providing the interface of board and external debugging device, status monitor device etc..
Another aspect of the present disclosure provides a kind of VPX signal processing cabinet using the GPU board, comprising: power slot,
SRIO exchange groove, network exchange slot and load slot, in which:
Power module is installed in power slot, for being each module for power supply in cabinet;
SRIO Switching Module is equipped in SRIO exchange groove, for the data exchange between SRIO bus in cabinet;
Ethernet switching module is equipped in network exchange slot, for provide in cabinet the data exchange of gigabit Ethernet and
Ten thousand external mbit ethernet interfaces;
Common calculation module is equipped in load slot or above-mentioned GPU board, GPU board provide accelerometer for common calculation module
Calculate service;
Each load slot draws 2 road 4x SRIO high speed data links to SRIO exchange groove.
Preferably, above-mentioned common calculation module is DSP module or CPU module.
The disclosure make full use of GPU in recent years floating-point operation, in terms of the potentiality that show and GPU open
The reduction for degree of raising difficult questions provides and a kind of turns what GPU was used towards VPX framework, by the SRIO bus interface used in VPX cabinet
The GPU board of PCIE interface, so that successfully GPU is added in existing VPX signal handling equipment, VPX framework and GPU is parallel
Calculating advantage combines, and improves the performance of existing VPX signal handling equipment.Compared with prior art, the beneficial effect of the disclosure
Fruit is: can satisfy the transmission of high performance data, process demand, while have reinforcing, miniaturization, good environmental adaptability it is excellent
Point, it is higher to size, power consumption, environmental suitability and reinforcement type index request to be particularly adapted to sonar, radar, electronic countermeasure etc.,
And need to realize the application scenarios of high performance parallel information processing, practical application value with higher.
Detailed description of the invention
Disclosure exemplary embodiment is described in more detail in conjunction with the accompanying drawings, the disclosure it is above-mentioned and other
Purpose, feature and advantage will be apparent, wherein in disclosure exemplary embodiment mode, identical reference label
Typically represent same parts.
Fig. 1 is the signal flow schematic diagram of the GPU board of exemplary embodiment;
Fig. 2 is the concrete structure diagram of the GPU board of exemplary embodiment;
Fig. 3 is the structural schematic diagram of the Tsi721 chip in the GPU board of exemplary embodiment;
Fig. 4 is the topological schematic diagram of the VPX signal processing cabinet using above-mentioned GPU board of exemplary embodiment.
Specific embodiment
Preferred embodiment of the present disclosure is more fully described below with reference to accompanying drawings.Although showing the disclosure in attached drawing
Preferred embodiment, however, it is to be appreciated that may be realized in various forms the disclosure without that should be limited by embodiments set forth here
System.On the contrary, thesing embodiments are provided so that the disclosure is more thorough and complete, and can be complete by the scope of the present disclosure
Ground is communicated to those skilled in the art.
It as depicted in figs. 1 and 2, include: that CPU module, PCIE turn SRIO on the GPU board in disclosure exemplary embodiment
Chip, ethernet switching module and VPX Bussing connector, in which: PCIE to SRIO conversion module and external SRIO are total
Line is connected, by the SRIO data conversion of input at PCIE data, output to CPU module;Ethernet switching module is for providing plate
Communication interface between card and external ethernet;Backward interface of the VPX Bussing connector as board, for board and VPX machine
The connection of case backboard.
Preferably, in the present embodiment, CPU module uses Jetson TX2 module, and PCIE turns SRIO chip and adopts
With Tsi721 chip, in which:
Jetson TX2 module is the supercomputer module an of very-high performance, low-power consumption, and typical power consumption only has 7.5W,
Size only has credit card-sized, integrates the ARMv8 processor of 256 core NVIDA Pascal GPU and 6 core 64, possesses
128 memories of 8GB LPDDR4, performance have been more than Intel Xeon server level CPU;
Tsi721 is dedicated SRIO, PCIE conversion chip, as shown in figure 3, it includes PCIe interface, SRIO interface, disappears
Several main functional modules such as engine, mapping engine and block DMA engine are ceased, wherein connect by PCIe interface with CPU module,
It is connected to the network through SRIO interface and SRIO;Message engine realizes the message communicating between PCIe interface and SRIO interface, includes 8 tunnels
Outbound Message DMA channel and 8 road Inbound Message DMA channels;Mapping engine realizes that PCIe interface arrives
SRIO interface IP address converts (PC2SR) and SRIO interface to PCIe interface address conversion (SR2PC);Block DMA engine realizes the side DMA
Formula initiates the read and write access of data packet or maintenance packet;Each channel in 8 DMA channels work in a manner of chain type descriptor
Make, initiates RapidIO read-write operation for master control.
Preferably, the Ethernet switching chip in the present embodiment on GPU board uses gigabit networking and exchanges core
Piece ETH switch, PHY1, PHY2 function phase of the exchange chip through port physical layer chip PHY connection Ethernet interface, in figure
Together, only contained port number is different, hangs on same switch, and PHY1 has 2 port, is connected on VPX connector P4,
PHY2 has 4 port, in connecting plate and forward direction debugging serial interface.
Preferably, the parallel CPU module in 2 tunnels, each CPU module be placed on the GPU board in the present embodiment
There is matching PCIE to turn SRIO chip, acceleration operation can be carried out to the 2 road SRIO data from VPX connector respectively.
Preferably, interconnection is realized by ETH switch chip between 2 pieces of CPU modules.
Preferably, the GPU board in the present embodiment also includes baseboard management controller BMC, for realizing IPMI
Function: BMC is acquired according to the order of host computer and (I2C i.e. on the VPX case back plate inserted of board is total by IPMB bus
Line), the parameters such as the temperature of board, voltage, electric current are sent to host computer, thus realize the monitoring to board physical state, and
Support excess temperature, over-voltage, overcurrent protection.
Preferably, the GPU board in the present embodiment further includes a variety of I/O interfaces and its interface chip, wherein before
It include RJ45, serial ports etc. to interface, convenient for the monitoring of debugging and state to board.
Using the topological structure of the VPX signal processing cabinet of above-mentioned GPU board as shown in figure 4, including electricity in the present embodiment
Source slot, SRIO exchange groove, network exchange slot and load slot, in which:
Power module is installed in power slot, for being each module for power supply in cabinet;
SRIO Switching Module is equipped in SRIO exchange groove, for the data exchange between SRIO bus in cabinet;
Ethernet switching module is equipped in network exchange slot, for provide in cabinet the data exchange of gigabit Ethernet and
Ten thousand external mbit ethernet interfaces;
It loads and is equipped with common calculation module or above-mentioned GPU board in slot, each load slot draws 2 road 4x SRIO high speed numbers
According to link to the SRIO exchange groove.
The quantity of various slots is all made of the regulation of VPX standard (VITA65).
Preferably, above-mentioned common calculation module includes DSP module or CPU module in the present embodiment;Load slot
Middle insertion DSP, CPU, the type of CPU module and quantity are depending on the specific needs of user.
In addition, each load slot also draws 2 road I2C buses in the present embodiment, for each module temperature, voltage, electric current etc.
Monitoring.
In the present embodiment, high speed SRIO data are passed to the GPU board by SRIO Switching Module by common calculation module, by
Dedicated conversion chip Tsi721 by SRIO data conversion at PCIE data needed for CPU module, to enable the GPU board
Acceleration enough, which is provided, for common calculation module calculates service.
As it can be seen that a kind of GPU board for turning PCIE towards VPX framework, by SRIO is present embodiments provided, so that GPU be added
Enter in existing VPX signal handling equipment, provides acceleration for common calculation module and calculate service.The present embodiment can satisfy height
The data transmission of performance, process demand, while having the advantages that reinforcing, miniaturization, good environmental adaptability, it is particularly adapted to sound
Receive, radar, electronic countermeasure etc. it is higher to size, power consumption, environmental suitability and reinforcement type index request, and need to realize high-performance
The application scenarios of parallel information processing, practical application value with higher.
Above-mentioned technical proposal is exemplary embodiment of the present invention, for those skilled in the art, at this
On the basis of disclosure of the invention application method and principle, it is easy to make various types of improvement or deformation, be not limited solely to this
Method described in above-mentioned specific embodiment is invented, therefore previously described mode is only preferred, and it is not restrictive
Meaning.
Claims (8)
1. a kind of GPU board characterized by comprising PCIE to SRIO conversion module, CPU module, Ethernet exchanging mould
Block and VPX connector, in which:
The PCIE to SRIO conversion module is connected with external SRIO bus, by externally input SRIO data conversion at
PCIE data, output to the CPU module;
The ethernet switching module is used to provide the described the communication interface between board and external ethernet;
The VPX connector is used to be inserted into the VPX connector in VPX case back plate load slot.
2. GPU board according to claim 1, which is characterized in that the PCIE to SRIO conversion module uses
The PCIe interface of Tsi721 chip, the Tsi721 chip is connect with the CPU module, SRIO interface and external SRIO bus
Connection.
3. GPU board according to claim 1, which is characterized in that the CPU module is Jetson TX2GPU module.
4. GPU board according to claim 1, which is characterized in that including all the way or the parallel CPU module of two-way, Yi Jiyu
Each matched PCIE to SRIO conversion module of CPU module.
5. GPU board according to claim 4, which is characterized in that the board include two-way CPU module when, it is described with
Too net Switching Module provides the communication between the two-way CPU module.
6. GPU board according to claim 1, which is characterized in that further include boundary scan module, IPMI module and
One or more of forward direction I/O interface, in which:
The boundary scan module to the PCIE to SRIO conversion module and CPU module for carrying out meeting IEEE1149.1
The jtag boundary sweep test of specification;
The IPMI module is monitored the parameters such as the temperature of the board, voltage, electric current by IPMB bus, and supports
Temperature, over-voltage, overcurrent protection;
The forward direction I/O interface is used to provide the described the interface of board and external debugging device, status monitor device etc..
7. a kind of VPX signal processing cabinet using GPU board described in any one of claims 1 to 6, including power slot,
SRIO exchange groove, network exchange slot and load slot, in which:
It is installed with power module in the power slot, for being each module for power supply in cabinet;
SRIO Switching Module is equipped in the SRIO exchange groove, for the data exchange between SRIO bus in cabinet;
Ethernet switching module is equipped in the network exchange slot, for provide in cabinet the data exchange of gigabit Ethernet and
Ten thousand external mbit ethernet interfaces;
Common calculation module or the GPU board are equipped in the load slot, the GPU board provides for common calculation module to be added
Speed calculates service;
Each load slot draws 2 road 4x SRIO high speed data links to the SRIO exchange groove.
8. VPX signal processing cabinet according to claim 7, which is characterized in that the common calculation module is DSP module
Or CPU module.
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CN201811304660.3A CN109240972A (en) | 2018-11-04 | 2018-11-04 | A kind of GPU board and the VPX signal processing cabinet using the board |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110708185A (en) * | 2019-09-03 | 2020-01-17 | 中国科学院计算技术研究所 | Data interconnection method, system, chip and device for artificial intelligence processor |
CN113076066A (en) * | 2021-04-14 | 2021-07-06 | 湖南兴天电子科技有限公司 | High-capacity high-speed storage device and operation method thereof |
-
2018
- 2018-11-04 CN CN201811304660.3A patent/CN109240972A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110708185A (en) * | 2019-09-03 | 2020-01-17 | 中国科学院计算技术研究所 | Data interconnection method, system, chip and device for artificial intelligence processor |
CN110708185B (en) * | 2019-09-03 | 2021-06-29 | 中国科学院计算技术研究所 | Data interconnection method, system, chip and device for artificial intelligence processor |
CN113076066A (en) * | 2021-04-14 | 2021-07-06 | 湖南兴天电子科技有限公司 | High-capacity high-speed storage device and operation method thereof |
CN113076066B (en) * | 2021-04-14 | 2023-12-08 | 湖南兴天电子科技股份有限公司 | High-capacity high-speed storage device and operation method thereof |
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