CN109240402A - A kind of start-up circuit for improving Bandgap circuit power and inhibiting ratio - Google Patents
A kind of start-up circuit for improving Bandgap circuit power and inhibiting ratio Download PDFInfo
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- CN109240402A CN109240402A CN201811130983.5A CN201811130983A CN109240402A CN 109240402 A CN109240402 A CN 109240402A CN 201811130983 A CN201811130983 A CN 201811130983A CN 109240402 A CN109240402 A CN 109240402A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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- General Physics & Mathematics (AREA)
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- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
The present invention provides a kind of start-up circuit of raising Bandgap circuit power inhibition ratio, it is characterized in that, including sequentially connected start-up circuit, current generating circuit and voltage generation circuit, in which: start-up circuit, to ensure to work normally after Bandgap circuit powers on；Current generating circuit, to generate positive temperature coefficient electric current, the positive temperature coefficient electric current is unrelated with voltage；Voltage generation circuit, to generate the reference voltage of zero-temperature coefficient characteristic.Start-up circuit provided by the invention, power consumption only have pA rank, low in energy consumption and can ensure that Bandgap circuit can work normally after power-up；After current generating circuit works normally, start-up circuit is closed, no longer influence current generating circuit, there is no feedback loop compared to existing start-up circuit, therefore the power supply disturbance of start-up circuit will not be added to Bandgap circuit, therefore the power supply rejection ratio of Bandgap circuit is improved, the power supply rejection ratio of the start-up circuit provided through the invention, 1MHz frequency is increased to 45dB from 35dB.
Description
Technical field
The present invention relates to Bandgap performances to improve circuit field, specifically a kind of raising Bandgap circuit power suppression
The start-up circuit of ratio processed.
Background technique
There is different requirements to Bandgap in different circuits, and in phase-locked loop circuit, in order to improve the property of circuit
Can, Bandgap circuit then more demanding power supply rejection ratio, low noise, and to the low equal performance requirements of temperature change susceptibility.
In order to improve the power supply rejection ratio of Bandgap circuit, the prior art usually uses LDO power supply, improves indirectly
The power supply rejection ratio of Bandgap circuit, this method not only limit bandwidth, also improve the design complexities of circuit, increase
Additional area and power consumption.
Summary of the invention
In order to solve the above technical problems, overcome deficiency in the prior art, the present invention provides a kind of raising Bandgap
Circuit power inhibits the start-up circuit of ratio, is that a kind of structure is simple, and implementation is easy, low in energy consumption, is not influenced by supply voltage
Bandgap performance improve circuit.
Technical solution used by the present invention solves the above problems is: raising BANDGAP circuit power inhibits opening for ratio
Dynamic circuit, which is characterized in that including sequentially connected start-up circuit, current generating circuit and voltage generation circuit, in which: starting
Circuit, to ensure to work normally after Bandgap circuit powers on；Current generating circuit, to generate positive temperature coefficient electric current,
The positive temperature coefficient electric current is unrelated with voltage；Voltage generation circuit, to generate the reference voltage of zero-temperature coefficient characteristic.
Further, the start-up circuit includes the first branch and second branch, and the first branch includes being connected in series
The first PMOS tube (PM5), the second PMOS tube (PM6) and the first NMOS tube (NM5)；The second branch includes to be connected in series
Third PMOS tube (PM7), the 4th PMOS tube (PM8), the second NMOS tube (NM4) and first capacitor (C3), wherein the first NMOS tube
(NM5) current generating circuit is made to have electric current to flow through in its conducting, so that the raising Bandgap circuit power be avoided to inhibit
The start-up circuit of ratio works in the bigoted point of degeneracy, and it is avoided to enter locking state；The current generating circuit connects with source
It is connected to the 5th PMOS tube (PM1) of supply voltage VDD.
Further, in the first branch, the source of the first PMOS tube (PM5) is connected to supply voltage VDD, and
The drain terminal of one PMOS tube (PM5) is connect with the source of the second PMOS tube (PM6), the grid end and second of the first PMOS tube (PM5)
The drain terminal of PMOS tube (PM6) is connected with grid end and is connected to the grid end of the first NMOS tube (NM5) and the 2nd NMOS of second branch
Manage the drain terminal of (NM4)；The drain terminal of first NMOS tube (NM5) is connected to the 5th PMOS tube (PM1) of current generating circuit
Drain terminal, the source of the first NOMS pipe (NM5) are connected to ground VSS.
Further, in the second branch, the source of the third PMOS tube (PM7) is connected to supply voltage VDD,
And the drain terminal of third PMOS tube (PM7) is connected to its grid end and is connected to the source of the 4th PMOS tube (PM8), the 4th PMOS tube
(PM8) grid end is connected with drain terminal and is connected to the grid end of the second NMOS tube (NM4) and one end of first capacitor (C3), and described
The other end of one capacitor (C3) is connected to ground VSS.
Further, when the supply voltage VDD rises to greater than the first PMOS tube (PM5) and the second PMOS tube (PM6)
Threshold voltage when, the first PMOS tube (PM5) and the second PMOS tube (PM6) conducting, the third PMOS tube of second branch at this time
(PM7) it is connected；When the supply voltage VDD rises to greater than the threshold value of the first PMOS tube (PM5) and the second PMOS tube (PM6) electricity
When pressure and the sum of the threshold voltage of the first NMOS tube (NM5), the first NMOS tube (NM5) is connected, at this time the third of second branch
PMOS tube (PM7) and the conducting of the 4th PMOS tube (PM8), the second NMOS tube (NM4) are closed, and first capacitor (C3) starts to charge, institute
The first NMOS tube (NM5) of the 5th PMOS tube (PM1) and the first branch of stating current generating circuit forms access, and electric current generates electricity
Degeneracy point is skipped on road, starts to work normally.
Further, when the supply voltage VDD rises to higher than the third PMOS tube (PM7) of second branch and the 4th
When the threshold voltage of PMOS tube (PM8) and the sum of the threshold voltage of the second NMOS tube (NM4), the second NMOS tube of second branch
(NM4) it is connected, the first NMOS tube (NM5) of the first branch is closed, and current generating circuit works normally at this time.
Further, after the current generating circuit works normally, start-up circuit is closed, and no longer influence electric current generates electricity
Road does not have a feedback loop compared to existing start-up circuit, therefore the power supply disturbance of start-up circuit will not be added to Bandgap electricity
Road, therefore improve the power supply rejection ratio of Bandgap circuit.
Compared with prior art, the invention has the following advantages:
1, start-up circuit provided by the invention, power consumption only has pA rank, low in energy consumption；
2, start-up circuit provided by the invention, it can be ensured that Bandgap circuit can work normally after power-up；
3, the power supply rejection ratio of the start-up circuit provided through the invention, 1MHz frequency is increased to 45dB from 35dB.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the schematic diagram of start-up circuit and Bandgap circuit in existing design.
Fig. 2 is the schematic diagram of the start-up circuit and Bandgap circuit in the present invention.
Fig. 3 is the power supply rejection ratio curve of Bandgap circuit in existing design.
Fig. 4 is the power supply rejection ratio curve of the Bandgap circuit in the present invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
Embodiment 1.
Referring to Fig. 1 to Fig. 4, the raising BANDGAP circuit power in the embodiment of the present invention inhibits the start-up circuit of ratio, including
Sequentially connected start-up circuit, current generating circuit and voltage generation circuit, in which: start-up circuit, to ensure Bandgap electricity
It is worked normally after the electricity of road；Current generating circuit, to generate positive temperature coefficient electric current, the positive temperature coefficient electric current and electricity
It presses unrelated；Voltage generation circuit, to generate the reference voltage of zero-temperature coefficient characteristic.
Start-up circuit in the embodiment of the present invention includes the first branch and second branch, and the first branch includes that series connection connects
The first PMOS tube (PM5), the second PMOS tube (PM6) and the first NMOS tube (NM5) connect；The second branch includes to be connected in series
Third PMOS tube (PM7), the 4th PMOS tube (PM8), the second NMOS tube (NM4) and first capacitor (C3), wherein the first NMOS
Pipe (NM5) makes current generating circuit have electric current to flow through in its conducting, so that the raising Bandgap circuit power be avoided to press down
The start-up circuit of ratio processed works in the bigoted point of degeneracy, and it is avoided to enter locking state；The current generating circuit has source
It is connected to the 5th PMOS tube (PM1) of supply voltage VDD.
In the first branch in the embodiment of the present invention, the source of the first PMOS tube (PM5) is connected to supply voltage VDD, and
The drain terminal of first PMOS tube (PM5) is connect with the source of the second PMOS tube (PM6), the grid end and second of the first PMOS tube (PM5)
The drain terminal of PMOS tube (PM6) is connected with grid end and is connected to the grid end of the first NMOS tube (NM5) and the 2nd NMOS of second branch
Manage the drain terminal of (NM4)；The drain terminal of first NMOS tube (NM5) is connected to the 5th PMOS tube (PM1) of current generating circuit
Drain terminal, the source of the first NOMS pipe (NM5) are connected to ground VSS.
In second branch in the embodiment of the present invention, the source of the third PMOS tube (PM7) is connected to supply voltage
VDD, and the drain terminal of third PMOS tube (PM7) is connected to its grid end and is connected to the source of the 4th PMOS tube (PM8), the 4th PMOS
The grid end of pipe (PM8) is connected with drain terminal and is connected to the grid end of the second NMOS tube (NM4) and one end of first capacitor (C3), described
The other end of first capacitor (C3) is connected to ground VSS.
In embodiments of the present invention, when the supply voltage VDD rises to greater than the first PMOS tube (PM5) and the 2nd PMOS
When managing the threshold voltage of (PM6), the first PMOS tube (PM5) and the second PMOS tube (PM6) are connected, at this time the third of second branch
PMOS tube (PM7) conducting；When the supply voltage VDD rises to greater than the first PMOS tube (PM5) and the second PMOS tube (PM6)
When threshold voltage and the sum of the threshold voltage of the first NMOS tube (NM5), the first NMOS tube (NM5) conducting, second branch at this time
Third PMOS tube (PM7) and the conducting of the 4th PMOS tube (PM8), the second NMOS tube (NM4) are closed, and first capacitor (C3) starts to fill
Electricity, the 5th PMOS tube (PM1) of the current generating circuit and the first NMOS tube (NM5) of the first branch form access, electric current
Generation circuit skips degeneracy point, starts to work normally.
In embodiments of the present invention, when the supply voltage VDD rises to the third PMOS tube (PM7) higher than second branch
When with the threshold voltage of the 4th PMOS tube (PM8) and the sum of the threshold voltage of the second NMOS tube (NM4), the second of second branch
The first NMOS tube (NM5) of NMOS tube (NM4) conducting, the first branch is closed, and current generating circuit works normally at this time.
After current generating circuit in the embodiment of the present invention works normally, start-up circuit is closed, and no longer influence electric current generates
Circuit does not have a feedback loop compared to existing start-up circuit, therefore the power supply disturbance of start-up circuit will not be added to Bandgap
Circuit, therefore improve the power supply rejection ratio of Bandgap circuit.
It should be pointed out that being above schematical by the detailed description that preferred embodiment carries out technical solution of the present invention
And not restrictive.Those skilled in the art can be to recorded in embodiment on the basis of reading description of the invention
Technical solution modify or equivalent replacement of some of the technical features, and these are modified or replaceed, not
The essence of corresponding technical solution is set to be detached from the range of technical solution of the embodiment of the present invention.
Claims (7)
1. a kind of start-up circuit for improving Bandgap circuit power and inhibiting ratio, which is characterized in that including sequentially connected starting electricity
Road, current generating circuit and voltage generation circuit, in which:
Start-up circuit, to ensure to work normally after Bandgap circuit powers on；
Current generating circuit, to generate positive temperature coefficient electric current, the positive temperature coefficient electric current is unrelated with voltage；
Voltage generation circuit, to generate the reference voltage of zero-temperature coefficient characteristic.
2. the start-up circuit according to claim 1 for improving Bandgap circuit power and inhibiting ratio, which is characterized in that described
Start-up circuit includes the first branch and second branch, and the first branch includes the first PMOS tube (PM5) being connected in series, second
PMOS tube (PM6) and the first NMOS tube (NM5)；The second branch includes the third PMOS tube (PM7) being connected in series, the 4th
PMOS tube (PM8), the second NMOS tube (NM4) and first capacitor (C3), wherein the first NMOS tube (NM5) makes in its conducting
Current generating circuit has electric current to flow through, so that the start-up circuit work for avoiding the raising Bandgap circuit power from inhibiting ratio exists
The bigoted point of degeneracy, and it is avoided to enter locking state；There is the current generating circuit source to be connected to the of supply voltage VDD
Five PMOS tube (PM1).
3. the start-up circuit according to claim 2 for improving Bandgap circuit power and inhibiting ratio, which is characterized in that in institute
State in the first branch, the source of the first PMOS tube (PM5) is connected to supply voltage VDD, and the drain terminal of the first PMOS tube (PM5) with
The source of second PMOS tube (PM6) connects, the grid end of the first PMOS tube (PM5) and the drain terminal and grid end of the second PMOS tube (PM6)
It is connected and is connected to the drain terminal of the grid end of the first NMOS tube (NM5) and the second NMOS tube (NM4) of second branch；Described first
The drain terminal of NMOS tube (NM5) is connected to the drain terminal of the 5th PMOS tube (PM1) of current generating circuit, and the first NOMS manages (NM5)
Source is connected to ground VSS.
4. the start-up circuit according to claim 2 for improving Bandgap circuit power and inhibiting ratio, which is characterized in that in institute
It states in second branch, the source of the third PMOS tube (PM7) is connected to supply voltage VDD, and the leakage of third PMOS tube (PM7)
End is connected to its grid end and is connected to the source of the 4th PMOS tube (PM8), and the grid end of the 4th PMOS tube (PM8) is connected simultaneously with drain terminal
It is connected to the grid end of the second NMOS tube (NM4) and one end of first capacitor (C3), the other end connection of the first capacitor (C3)
To ground VSS.
5. the raising Bandgap circuit power according to Claims 2 or 3 or 4 inhibits the start-up circuit of ratio, feature exists
In, when the supply voltage VDD rises to the threshold voltage greater than the first PMOS tube (PM5) and the second PMOS tube (PM6), the
One PMOS tube (PM5) and the second PMOS tube (PM6) conducting, at this time third PMOS tube (PM7) conducting of second branch；When the electricity
Source voltage VDD rises to threshold voltage and the first NMOS tube greater than the first PMOS tube (PM5) and the second PMOS tube (PM6)
(NM5) when the sum of threshold voltage, the first NMOS tube (NM5) is connected, at this time the third PMOS tube (PM7) and the 4th of second branch
PMOS tube (PM8) conducting, the second NMOS tube (NM4) are closed, and first capacitor (C3) starts to charge, and the of the current generating circuit
The first NMOS tube (NM5) of five PMOS tube (PM1) and the first branch forms access, and current generating circuit skips degeneracy point, starts
It works normally.
6. the raising Bandgap circuit power according to Claims 2 or 3 or 4 inhibits the start-up circuit of ratio, feature exists
In when the supply voltage VDD rises to the threshold of third PMOS tube (PM7) and the 4th PMOS tube (PM8) higher than second branch
When threshold voltage and the sum of the threshold voltage of the second NMOS tube (NM4), the second NMOS tube (NM4) of second branch is connected, and first
First NMOS tube (NM5) on road is closed, and current generating circuit works normally at this time.
7. the start-up circuit according to claim 1 for improving Bandgap circuit power and inhibiting ratio, which is characterized in that described
After current generating circuit works normally, start-up circuit is closed, no longer influence current generating circuit, compared to existing start-up circuit
There is no a feedback loop, therefore the power supply disturbance of start-up circuit will not be added to Bandgap circuit, therefore improve Bandgap electricity
The power supply rejection ratio on road.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811130983.5A CN109240402A (en) | 2018-09-27 | 2018-09-27 | A kind of start-up circuit for improving Bandgap circuit power and inhibiting ratio |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811130983.5A CN109240402A (en) | 2018-09-27 | 2018-09-27 | A kind of start-up circuit for improving Bandgap circuit power and inhibiting ratio |
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| CN109240402A true CN109240402A (en) | 2019-01-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811130983.5A Pending CN109240402A (en) | 2018-09-27 | 2018-09-27 | A kind of start-up circuit for improving Bandgap circuit power and inhibiting ratio |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110825156A (en) * | 2019-12-02 | 2020-02-21 | 深圳清华大学研究院 | Starting circuit applied to low-power-consumption band-gap reference |
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| US20030080806A1 (en) * | 2001-10-26 | 2003-05-01 | Naoki Sugimura | Bandgap reference voltage circuit |
| US20060181337A1 (en) * | 2005-02-11 | 2006-08-17 | International Business Machines Corporation | Digitally tunable high-current current reference with high PSRR |
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| CN102053645A (en) * | 2011-01-31 | 2011-05-11 | 成都瑞芯电子有限公司 | Wide-input voltage high-power supply rejection ratio reference voltage source |
| CN104111682A (en) * | 2014-05-05 | 2014-10-22 | 西安电子科技大学 | Low-power-consumption and low-temperature-coefficient reference source circuit |
| CN105786075A (en) * | 2016-04-20 | 2016-07-20 | 广东工业大学 | Pre-regulator circuit capable of increasing band-gap reference power supply rejection ratio |
| CN106843358A (en) * | 2017-03-21 | 2017-06-13 | 桂林电子科技大学 | A kind of high PSRR whole CMOS reference voltage source |
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2018
- 2018-09-27 CN CN201811130983.5A patent/CN109240402A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030080806A1 (en) * | 2001-10-26 | 2003-05-01 | Naoki Sugimura | Bandgap reference voltage circuit |
| US20060181337A1 (en) * | 2005-02-11 | 2006-08-17 | International Business Machines Corporation | Digitally tunable high-current current reference with high PSRR |
| CN200997086Y (en) * | 2006-12-28 | 2007-12-26 | 东南大学 | CMOS reference voltage source |
| CN102053645A (en) * | 2011-01-31 | 2011-05-11 | 成都瑞芯电子有限公司 | Wide-input voltage high-power supply rejection ratio reference voltage source |
| CN104111682A (en) * | 2014-05-05 | 2014-10-22 | 西安电子科技大学 | Low-power-consumption and low-temperature-coefficient reference source circuit |
| CN105786075A (en) * | 2016-04-20 | 2016-07-20 | 广东工业大学 | Pre-regulator circuit capable of increasing band-gap reference power supply rejection ratio |
| CN106843358A (en) * | 2017-03-21 | 2017-06-13 | 桂林电子科技大学 | A kind of high PSRR whole CMOS reference voltage source |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110825156A (en) * | 2019-12-02 | 2020-02-21 | 深圳清华大学研究院 | Starting circuit applied to low-power-consumption band-gap reference |
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