CN109192727A - Transient voltage suppressor and preparation method thereof - Google Patents
Transient voltage suppressor and preparation method thereof Download PDFInfo
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- CN109192727A CN109192727A CN201811024218.5A CN201811024218A CN109192727A CN 109192727 A CN109192727 A CN 109192727A CN 201811024218 A CN201811024218 A CN 201811024218A CN 109192727 A CN109192727 A CN 109192727A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 28
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- 238000002347 injection Methods 0.000 claims abstract description 74
- 239000007924 injection Substances 0.000 claims abstract description 74
- 230000002457 bidirectional effect Effects 0.000 claims abstract description 67
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 238000005516 engineering process Methods 0.000 claims description 9
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- 238000001259 photo etching Methods 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 4
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- 239000007788 liquid Substances 0.000 claims description 2
- 238000002513 implantation Methods 0.000 claims 4
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- 230000015556 catabolic process Effects 0.000 abstract description 20
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 150000002500 ions Chemical group 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
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- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
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- -1 phosphonium ion Chemical class 0.000 description 2
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0814—Diodes only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
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Abstract
It includes identical first device of structure and the second device that the present invention, which provides a kind of bidirectional transient voltage suppressor, first device includes the substrate of the first conduction type, it is formed in the epitaxial layer of the first conduction type of the upper surface of the substrate, it is formed in the epitaxial layer two sides and extends to the first injection region of the second conduction type in the epitaxial layer, it is formed in the first oxide layer of the upper surface of first injection region and is formed in the upper surface of the epitaxial layer and the second injection region of the second conduction type between first injection region, the lower surface of the substrate of first device is mutually be bonded with the lower surface of the substrate of second device.The present invention also provides the preparation methods of bidirectional transient voltage suppressor, improve the breakdown voltage and stability of bidirectional transient voltage suppressor, reduce preparation cost.
Description
Technical field
The present invention relates to a kind of technical field of semiconductor devices more particularly to Transient Voltage Suppressor and its preparation sides
Method.
Background technique
Transient Voltage Suppressor (Transient Voltage Suppressor, TVS) is a kind of clamper overvoltage protector
Part, surge voltage can be fixed on lower voltage level in a short time by it, make back-end circuit from excessive pressure damages, master
To be applied in all kinds of interface circuits such as mobile phone, plate, television set, computer main board.Transient Voltage Suppressor is according to protection direction
Unidirectional Transient Voltage Suppressor and bidirectional transient voltage suppressor can be divided into, unidirectional Transient Voltage Suppressor is mainly used in electricity
The protection of the ports such as source, earphone, and under bidirectional transient voltage suppressor is widely used between signal wire and communication environment
Protection.With the continuous development of electronic products, bidirectional transient voltage suppressor device used in the signal transmission interface further
Frequently, however as the continuous promotion of application end transmission rate, accordingly to the electrology characteristic requirement of Transient Voltage Suppressor
Higher, especially to the symmetry of the voltage of bidirectional transient voltage suppressor, more stringent requirements are proposed.
Existing bidirectional transient voltage suppressor generallys use planar technology to guarantee the symmetry of two-way breakdown voltage
Method, by two N-type regions by a photoetching, injection formed, two PN junctions are then guaranteed into two PN with same p type island region
The reverse withstand voltage of knot is almost the same.But there are apparent defects for this method, since silicon chip surface has two pieces of identical N-type regions
Domain, and must separate, cause the PN junction area in each direction to be restricted, so that Transient Voltage Suppressor is in two directions
Anti-surging ability be all weakened, if to guarantee the surge capacity of Transient Voltage Suppressor, need to increase entire transient state electricity
The area of suppressor is pressed, and increases the area of individual devices, does not mean only that the increase of cost, and will affect device in circuit
Normal use on plate.
Summary of the invention
In view of this, the present invention provide it is a kind of with splendid two-way breakdown voltage symmetry, do not increase single device additionally
The area of part, while the bidirectional transient voltage suppressor of Anti-surging ability and reliability is also enhanced, it is above-mentioned to solve
Problem, on the one hand, the present invention is realized using following scheme.
A kind of bidirectional transient voltage suppressor comprising identical first device of junction structure and the second device, described first
Device include the substrate of the first conduction type, be formed in the substrate upper surface the first conduction type epitaxial layer, formed
In the epitaxial layer two sides and the first injection region of the second conduction type for extending in the epitaxial layer, it is formed in described first
First oxide layer of the upper surface of injection region and it is formed in the upper surface of the epitaxial layer and between first injection region
The second conduction type the second injection region, under the substrate of the lower surface of the substrate of first device and second device
Surface is mutually bonded.
The present invention provides the having the beneficial effect that through the substrate in the first conduction type of a kind of bidirectional transient voltage suppressor
The upper epitaxial layer for forming the first conduction type, the epitaxial layer two sides and extend in the epitaxial layer that form second conductive
First injection region of type forms the first oxide layer in the upper surface of first injection region, between first oxide layer
The epitaxial layer upper surface formed the second conduction type the second injection region, in the side of the upper surface perpendicular to the substrate
Upwards, the breakdown voltage between first injection region and the epitaxial layer be greater than second injection region and the epitaxial layer it
Between breakdown voltage, second device is identical as first device architecture, the lower surface of the substrate of first device with
The lower surface of the substrate of second device is mutually bonded, and forms the bidirectional transient voltage suppressor of symmetrical configuration, described two-way
When Transient Voltage Suppressor breakdown conducting, electric current is flowed up along the side of the upper surface perpendicular to the substrate, it is therefore prevented that institute
The edge breakdown for stating bidirectional transient voltage suppressor improves the pressure-resistant performance of the bidirectional transient voltage suppressor and reliable
Property.The bidirectional transient voltage suppressor is made of first device of symmetrical configuration with second device, is had relatively strong
Bilateral symmetry, to improve the stability of the bidirectional transient voltage suppressor.
On the other hand, the present invention also provides a kind of preparation methods of bidirectional transient voltage suppressor comprising following technique
Step:
S1: providing the substrate of first conduction type, forms the outer of the first conduction type in the upper surface of the substrate
Prolong layer；
S2: carrying out photoetching to the two sides of the epitaxial layer, and the second conduction type of injection forms the first injection region, described the
The upper surface of one injection region forms the first oxide layer and forms the second oxide layer in the lower surface of first substrate；
S3: the epitaxial layer upper surface and inject between first injection region the second conduction type and form the
Two injection regions；
S4: coating photoresist to the upper surface of the substrate, remove second oxide layer of the lower surface of the substrate,
The first device is obtained later；
Using the second device identical with first device architecture is also obtained the step of above-mentioned S1~S4, by described first
The lower surface of the substrate of the lower surface of the substrate of device and second device carries out bonding technology, eventually forms two-way transient state electricity
Press suppressor.
The present invention obtains identical first device of structure with second device described two-way by bonding technology
Transient Voltage Suppressor, the bidirectional transient voltage suppressor is not under the premise of increasing area, by the lining of first device
The lower surface at bottom is viscous Nian Jie with the lower surface of the substrate of second device, so that the bidirectional transient voltage suppressor is in each side
Increase to the PN junction area of formation, ability and the electricity for improving the Anti-surging electric current of the bidirectional transient voltage suppressor are special
Property.The bidirectional transient voltage suppressor and same homalographic place an order to Transient Voltage Suppressor Anti-surging electric current ability phase
Together, but than unidirectional Transient Voltage Suppressor there is better negative sense surge characteristic.Due to technique at the same time formed described first
Device and second device, especially when forming the epitaxial layer and first injection region and injecting, first device with
Second device prepares to be formed simultaneously, adulterates injection rate and epitaxial growth state is almost consistent, therefore the two-way transient state
Voltage suppressor is essentially identical in the PN junction concentration of all directions, junction depth, size and preparation process, therefore in the two-way transient state
The both direction breakdown voltage of voltage suppressor is entirely consistent, has extremely strong bilateral symmetry, to improve the two-way transient state
The stability of voltage suppressor.First injection region and first oxide layer, institute are increased in the two sides of the epitaxial layer
State the breakdown potential that the first injection region is different from the conduction type of the epitaxial layer, between first injection region and the epitaxial layer
Pressure is puncturing much larger than the breakdown voltage between second injection region and the epitaxial layer, the bidirectional transient voltage suppressor
When conducting, current path is completed in first device and second device, it is therefore prevented that the bidirectional transient voltage inhibits
The edge breakdown of device reduces leakage current, while improving the reliability of the bidirectional transient voltage suppressor.By described first
Device is combined into one obtained, the not additional face for increasing single first device and second device with second device
Product, so practical do not increase cost, to reduce the preparation cost of the bidirectional transient voltage suppressor.
Detailed description of the invention
Following drawings of the invention is incorporated herein as part of the present invention for the purpose of understanding the present invention.Shown in the drawings of this hair
Bright embodiment and its description, principle used to explain the present invention.
Fig. 1 is the structural schematic diagram of bidirectional transient voltage suppressor of the present invention；
Fig. 2 to Fig. 6 is the preparation process figure of bidirectional transient voltage suppressor of the present invention；
Fig. 7 is the preparation flow figure of bidirectional transient voltage suppressor of the present invention；
Fig. 8 is the equivalent circuit diagram of bidirectional transient voltage suppressor of the present invention.
In figure: bidirectional transient voltage suppressor 1；First device 2；Second device 3；Substrate 10；Epitaxial layer 20；First injection
Area 21；First oxide layer 22；Second oxide layer 23；Second injection region 24.
Specific embodiment
In the following description, a large amount of concrete details are given so as to provide a more thorough understanding of the present invention.So
And it will be apparent to one skilled in the art that the present invention may not need one or more of these details and be able to
Implement.In other examples, in order to avoid confusion with the present invention, for some technical characteristics well known in the art not into
Row description.
In the description of the present invention, it should be noted that term " on ", "lower", "left", "right", " transverse direction ", " longitudinal direction ",
The orientation or positional relationship of the instructions such as "horizontal", "inner", "outside" is to be based on the orientation or positional relationship shown in the drawings, or be somebody's turn to do
Invention product using when the orientation or positional relationship usually put, be merely for convenience of description of the present invention and simplification of the description, without
It is that the device of indication or suggestion meaning or element must have a particular orientation, be constructed and operated in a specific orientation, therefore not
It can be interpreted as limitation of the present invention.In addition, term " first ", " second ", " third " etc. are only used for distinguishing description, and cannot manage
Solution is indication or suggestion relative importance.
Refering to fig. 1, the present invention provides a kind of bidirectional transient voltage suppressor 1 comprising identical first device 2 of structure and
Second device 3, the substrate 10 of first device 2 including the first conduction type, be formed in the substrate 10 upper surface the
The epitaxial layer 20 of one conduction type is formed in 20 two sides of epitaxial layer and extends to the second conductive-type in the epitaxial layer 20
First injection region 21 of type, be formed in first injection region 21 upper surface the first oxide layer 22 and be formed in the extension
20 upper surface of layer and the second injection region 24 of the second conduction type between first injection region 21, first device
The lower surface of the substrate 10 of part 2 is mutually be bonded with the lower surface of the substrate 10 of second device 3.
The present invention on the substrate 10 of the first conduction type by forming the epitaxial layer 20 of the first conduction type, described outer
Prolong the two sides of layer 20 and extend to the first injection region 21 for forming the second conduction type in the epitaxial layer 20, in first note
The upper surface for entering area 21 forms the first oxide layer 22, the upper surface shape of the epitaxial layer 20 between first oxide layer 22
At the second injection region 24 of the second conduction type, on the direction of the upper surface perpendicular to the substrate 10, first injection
Breakdown voltage between area 21 and the epitaxial layer 20 is greater than the breakdown between second injection region 24 and the epitaxial layer 20
Voltage, second device 3 is identical as 2 structure of the first device, the lower surface of the substrate 10 of first device 2 with it is described
The lower surface of the substrate 10 of second device 3 is mutually bonded, and the bidirectional transient voltage suppressor 1 of symmetrical configuration is formed, described two-way
When the breakdown conducting of Transient Voltage Suppressor 1, electric current is flowed up along the side of the upper surface perpendicular to the substrate 10, it is therefore prevented that
The edge breakdown of the bidirectional transient voltage suppressor 1, improve the bidirectional transient voltage suppressor 1 pressure-resistant performance and can
By property.The Transient Voltage Suppressor 1 is made of identical first device 2 of structure with second device 3, is had relatively strong
Bilateral symmetry, to improve the stability of the bidirectional transient voltage suppressor 1.
Further, the doping concentration of the substrate 10 is greater than the doping concentration of the epitaxial layer 20, in present embodiment
In, the conduction type of the substrate 10 is identical as the conduction type of the epitaxial layer 20, and the substrate 10 is p-type heavy doping, institute
It states epitaxial layer 20 to be lightly doped for p-type, forms first injection region 21 and second injection region 24, and shape convenient for subsequent preparation
At multiple PN junctions, to improve the breakdown voltage of the bidirectional transient voltage suppressor 1.
Further, the concentration of first injection region 21 is less than the concentration of second injection region 24.In this embodiment party
In formula, on the direction of the upper surface perpendicular to the substrate 10, shape between first injection region 21 and the epitaxial layer 20
At PN junction, PN junction is formed between second injection region 24 and the epitaxial layer 20, is led in the bidirectional transient voltage suppressor 1
Partial pressure is realized when logical, and determines the current path of the bidirectional transient voltage suppressor 1, is improved the bidirectional transient voltage and is inhibited
The pressure-resistant performance of device 1, to prevent the ability of the big surge of integrated circuit.
Refering to Fig. 2 to Fig. 7 and Fig. 8, on the other hand, the present invention also provides a kind of preparations of bidirectional transient voltage suppressor 1
Method, the bidirectional transient voltage suppressor 1 includes identical first device 2 of structure and the second device 3, with first device
For 2, preparation method includes the following steps S1~S4:
S1: providing the substrate 10 of first conduction type, forms the first conduction type in the upper surface of the substrate 10
Epitaxial layer 20；
Specifically, the material of the substrate 10 can be silicon referring to Fig.2, providing the substrate 10 of first conduction type
Or germanium is selected material of the high purity silicon as the substrate 10, in this way, being easy to implement, and can be reduced in the present embodiment
Manufacturing cost.Epitaxial growth can be homogeneity epitaxial layer, and grown epitaxial layer 20 and substrate 10 are same materials, be also possible to different
The thin-film material of matter epitaxial layer, epitaxial growth is different with 10 material of substrate, grows chemical constituent, even physical structure in other words
The entirely different epitaxial layer 20 with substrate realizes that epitaxial growth also has many methods, including molecular beam epitaxy, ultrahigh vacuum
Chemical vapor deposition, normal pressure and reduced pressure epitaxy etc., preferred homoepitaxy in present embodiment, i.e. chemical vapour deposition technique are expired
The epitaxial layer 20 required enough.This method equipment is simple, and the various parameters of epitaxial layer are easy to control, reproducible.Chemistry
Vapour deposition process is that reactive material interacts under gaseous condition with matrix surface, and matrix surface formed a kind of metal or
Compounds solid state film or coating.Wherein the substrate 10 is the first conduction type of heavy doping, and the epitaxial layer 20 is gently to mix
The first miscellaneous conduction type, in other embodiments, the substrate 10 or the second conduction type, the epitaxial layer 20
For the first conduction type, the substrate 10 with a thickness of 150~180 microns of thin slice, the epitaxial layer 20 with a thickness of 8~12
Micron, resistivity are 4~7 ohm-cms.
S2: photoetching is carried out to the two sides of the epitaxial layer 20, the second conduction type of injection forms the first injection region 21, in institute
The upper surface for stating the first injection region 21 forms the first oxide layer 22 and forms the second oxide layer 23 in the lower surface of the substrate 10；
Specifically, first forming one layer of thin oxidation using chemical vapor deposition in the upper surface of the epitaxial layer 20 refering to Fig. 3
Layer (not shown) and one layer of silicon nitride layer (not shown) then carry out photoetching in the two sides of the epitaxial layer 20, and injection first is led
Electric types of ion forms the first injection region 21.In the present embodiment, second conduction type is N-type phosphonium ion, injection
Dosage is 1E13~5E13, and the energy of injection is 120Kev (kilo electron volt), the thin oxide layer with a thickness of 200 angstroms, institute
State silicon nitride layer with a thickness of 1500 angstroms, the two sides of the epitaxial layer 20 pass through wet etching remove corresponding position the nitrogen
SiClx layer enters back into boiler tube in such a way that wet oxygen is grown, and forms the first oxide layer in the upper surface of first injection region 21
22, while the second oxide layer 23, first oxide layer 22 and second oxide layer are formed in the lower surface of the substrate 10
23 with a thickness of 5000 angstroms, the process conditions for being preferably formed as first oxide layer 22 and second oxide layer 23 are 975 DEG C,
Time is 120 minutes, and being passed through gas is hydrogen and oxygen, formed first oxide layer 22 and second oxide layer 23 it
Afterwards, the remaining silicon nitride layer and the thin oxide layer are removed using wet etching, for reducing the table of the epitaxial layer 20
Face stress and stain.
S3: the epitaxial layer 20 upper surface and inject between first injection region 21 second conduction type shape
At the second injection region 24；
Specifically, refering to Fig. 4, in the present embodiment, since the upper surface in first injection region 21 forms one layer
Thick first oxide layer 22, therefore using the method for conventional ion injection, between first oxide layer 22 described in
N-type heavy doping phosphonium ion is injected in the upper surface of epitaxial layer 20, and it is 100kev magnitude with energy that the dosage of injection, which is 2E15~8E15,
Phosphonium ion beam be incident in the epitaxial layer 20, ion beam in the epitaxial layer 20 atom or molecule will occur it is a series of
Physics and chemistry interaction, incident ion gradually off-energy are finally rested in the epitaxial layer 20, be can be improved
The integrated level of first device 2, the working frequency for improving the bidirectional transient voltage suppressor 1 and integrated circuit.
S4: photoresist is coated to the upper surface of the substrate 10, removes second oxygen of the lower surface of the substrate 10
Change layer 23, obtains the first device 2 later；
Specifically, in the present embodiment, proportion is used to go for the buffered oxide etch liquid (BOE) of 10:1 refering to Fig. 5
Except second oxide layer 23 of the lower surface of the substrate 10, cleaned later using ultrasonic wave.Suitable for industry cleaning link
The generally artificial cleaning of cleaning way, organic solvent cleaning, vapor-gas phase cleaning, Cleaning by High Pressure Water Jet and ultrasonic wave it is clear
It washes, ultrasonic weave efficiency reaches 98% or more, and cleaning degree has reached highest level.Ultrasonic cleaning effect is good, cleans cost
It is low and labour is avoided to damage, so as to subsequent the first device 2 met the requirements, improve the preparation efficiency of first device 2.
Using the second device 3 identical with 2 structure of the first device is also obtained the step of above-mentioned S1~S4, by described
The lower surface of the substrate 10 of the lower surface of the substrate 10 of one device 2 and second device 3 carries out bonding technology, eventually forms double
To Transient Voltage Suppressor 1.
Specifically, refering to Fig. 6, in the present embodiment, silicon wafer combination technology includes eutectic bonding, electrostatic bonding, directly
Bonding is burnt in bonding and weldering, is preferably bound directly, and two silicon wafers can not be needed any viscous by high-temperature process with Direct Bonding together
Tie agent and extra electric field, simple process.This bonding techniques are known as silicon and Si direct bonding technology.By first device 2
Mutually Nian Jie, the process of bonding technology is glued with the lower surface of the substrate 10 of second device 3 in the lower surface of substrate 10 are as follows: by two panels
Silicon wafer is immersed in hydrogeneous solution, and two panels silicon wafer fits together at room temperature, and 5~8 are passed through in the environment of pure nitrogen gas
High temperature (maximum temperature is 1050 DEG C) processing of hour, makes by being covalently keyed between silicon wafer and the piece of silicon, bond strength can
Up to 12MPa or more, the bidirectional transient voltage suppressor 1 is formed convenient for subsequent preparation, to improve the bidirectional transient voltage
The preparation efficiency of suppressor 1 reduces preparation cost, while also enhancing the reliability of the bidirectional transient voltage suppressor 1.
In the present embodiment, the first conduction type be p-type, the second conduction type be N-type, first oxide layer 22,
The material of second oxide layer 23 and the third oxide layer 42 is silica, and the substrate 10 is the p-type of heavy doping, described
Epitaxial layer 20 is the p-type being lightly doped, and first injection region 21 is the N-type being lightly doped, and second injection region 24 is heavy doping
N-type.
The present invention obtains identical first device 2 of structure with second device 3 described double by bonding technology
To Transient Voltage Suppressor 1, the bidirectional transient voltage suppressor 1 is not under the premise of increasing area, by first device 2
Substrate 10 lower surface it is mutually be bonded with the lower surface of the substrate 10 of second device 3 so that the bidirectional transient voltage press down
Device 1 processed increases in the PN junction area that all directions are formed, and improves the energy of the Anti-surging electric current of the bidirectional transient voltage suppressor 1
Power and electrology characteristic.The bidirectional transient voltage suppressor 1 and the Anti-surging with the unidirectional Transient Voltage Suppressor under homalographic
The ability of electric current is identical, but has better negative sense surge characteristic than unidirectional Transient Voltage Suppressor.
In addition, in the present embodiment, since first device 2 is identical as the structure of second device 3,
First device 2 is also identical as the preparation process of second device 3, and first device 2 and second device 3 can be with
It prepares simultaneously, can also prepare, preferably prepare simultaneously respectively, the system of the bidirectional transient voltage suppressor 1 can be improved in this way
Standby efficiency and precision.It should be noted that when forming the epitaxial layer 20 and first injection region 21 is injected, described first
Device 2 prepares to be formed with second device 3 simultaneously, adulterates injection rate and epitaxial growth state is almost consistent therefore described
Bidirectional transient voltage suppressor 1 is essentially identical in the PN junction concentration of all directions, junction depth, size and preparation process, therefore in institute
The both direction breakdown voltage for stating bidirectional transient voltage suppressor 1 is entirely consistent, has extremely strong bilateral symmetry, to improve institute
State the stability of bidirectional transient voltage suppressor 1.First injection region 21 and institute are increased in the two sides of the epitaxial layer 20
The first oxide layer 22 is stated, first injection region 21 is different from the conduction type of the epitaxial layer 20, first injection region 21
Breakdown voltage between the epitaxial layer 20 is much larger than the breakdown potential between second injection region 24 and the epitaxial layer 20
Pressure, the bidirectional transient voltage suppressor 1 when puncturing conducting, complete in first device 2 and described second by current path
In device 3, it is therefore prevented that the edge breakdown of the bidirectional transient voltage suppressor 1 reduces leakage current, while improving described double
To the reliability of Transient Voltage Suppressor 1.First device 2 is combined into one to obtained, additional increasing with second device 3
Add the area of single first device 2 and second device 3, so practical do not increase cost, to reduce described
The preparation cost of bidirectional transient voltage suppressor 1.
The preferred embodiment of the present invention above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
Limitations on the scope of the patent of the present invention therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art
For, without departing from the inventive concept of the premise, several deformations can also be made, improves and substitutes, these belong to this hair
Bright protection scope.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of bidirectional transient voltage suppressor, it is characterised in that: it includes identical first device of structure and the second device, institute
State the extension of the substrate that the first device includes the first conduction type, the first conduction type of the upper surface for being formed in the substrate
Layer, be formed in the epitaxial layer two sides and extend in the epitaxial layer the second conduction type the first injection region, be formed in
First oxide layer of the upper surface of first injection region and be formed in the epitaxial layer upper surface and be located at first note
Enter the second injection region of the second conduction type between area, the lower surface of the substrate of first device and second device
The lower surface of substrate is mutually bonded.
2. Transient Voltage Suppressor according to claim 1, it is characterised in that: the doping concentration of the substrate is greater than described
The doping concentration of epitaxial layer.
3. bidirectional transient voltage suppressor according to claim 1, it is characterised in that:, the concentration of first injection region
Less than the concentration of second injection region.
4. a kind of preparation method of bidirectional transient voltage suppressor as described in claim 1, the bidirectional transient voltage suppressor
Including identical first device of structure and the second device, which is characterized in that the preparation method of first device includes:
S1: providing the substrate of first conduction type, forms the epitaxial layer of the first conduction type in the upper surface of the substrate；
S2: photoetching is carried out to the two sides of the epitaxial layer, the second conduction type of injection forms the first injection region, in first note
The upper surface for entering area forms the first oxide layer and forms the second oxide layer in the lower surface of the substrate；
S3: the epitaxial layer upper surface and inject between first injection region the second conduction type and form the second note
Enter area；
S4: photoresist is coated to the upper surface of the substrate, removes second oxide layer of the lower surface of the substrate, later
Obtain the first device；
Using the second device identical with first device architecture is also obtained the step of above-mentioned S1~S4, by first device
Substrate lower surface and second device substrate lower surface carry out bonding technology, eventually form bidirectional transient voltage suppression
Device processed.
5. the preparation method of bidirectional transient voltage suppressor according to claim 4, it is characterised in that: the step S1
In, the substrate with a thickness of 150~180 microns of thin slice, the epitaxial layer with a thickness of 8~12 microns, resistivity is 4~
7 ohm-cms.
6. the preparation method of bidirectional transient voltage suppressor according to claim 4, it is characterised in that: executing the step
Before rapid S2, one layer of thin oxide layer first is formed in the upper surface of the epitaxial layer, then forms nitridation on the thin oxide layer
Silicon layer forms after the window of first injection region, removes the corresponding silicon nitride layer of the window.
7. the preparation method of bidirectional transient voltage suppressor according to claim 6, it is characterised in that: the thin oxide layer
With a thickness of 200 angstroms, the silicon nitride layer with a thickness of 1500 angstroms, the thickness of first oxide layer and second oxide layer
It is 5000 angstroms, the implantation dosage of first injection region is 1E13~5E13, Implantation Energy 120kev, described the of formation
One injection region with a thickness of 5000 angstroms.
8. the preparation method of bidirectional transient voltage suppressor according to claim 4, it is characterised in that: the step S3
In, the implantation dosage of second injection region is 2E15~8E15, Implantation Energy 100kev.
9. the preparation method of bidirectional transient voltage suppressor according to claim 4, it is characterised in that: the step S4
In, second oxide layer is removed using buffered oxide etch liquid, removes photoresist later.
10. the preparation method of bidirectional transient voltage suppressor according to claim 4, it is characterised in that: by described first
The substrate of the substrate of device and second device is immersed in hydrogeneous solution, makes the substrate of first device at room temperature
Lower surface it is mutually be bonded with the lower surface of the substrate of second device.
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| CN201811024218.5A CN109192727A (en) | 2018-09-04 | 2018-09-04 | Transient voltage suppressor and preparation method thereof |
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| CN201811024218.5A CN109192727A (en) | 2018-09-04 | 2018-09-04 | Transient voltage suppressor and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111128698A (en) * | 2019-12-26 | 2020-05-08 | 安徽芯旭半导体有限公司 | Novel diffusion process of TVS chip |
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| JPS6130062A (en) * | 1984-07-20 | 1986-02-12 | Sanyo Electric Co Ltd | Semiconductor integrated circuit device |
| US8159060B2 (en) * | 2009-10-29 | 2012-04-17 | International Business Machines Corporation | Hybrid bonding interface for 3-dimensional chip integration |
| CN104091823A (en) * | 2014-07-24 | 2014-10-08 | 江苏捷捷微电子股份有限公司 | Transient-suppression diode chip and manufacturing method thereof |
| CN207602520U (en) * | 2017-11-09 | 2018-07-10 | 上海长园维安微电子有限公司 | A kind of high power density TVS device |
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2018
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6130062A (en) * | 1984-07-20 | 1986-02-12 | Sanyo Electric Co Ltd | Semiconductor integrated circuit device |
| US8159060B2 (en) * | 2009-10-29 | 2012-04-17 | International Business Machines Corporation | Hybrid bonding interface for 3-dimensional chip integration |
| CN104091823A (en) * | 2014-07-24 | 2014-10-08 | 江苏捷捷微电子股份有限公司 | Transient-suppression diode chip and manufacturing method thereof |
| CN207602520U (en) * | 2017-11-09 | 2018-07-10 | 上海长园维安微电子有限公司 | A kind of high power density TVS device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111128698A (en) * | 2019-12-26 | 2020-05-08 | 安徽芯旭半导体有限公司 | Novel diffusion process of TVS chip |
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