CN109141324A - A kind of method of precise measurement silicon wafer top and bottom removal amount - Google Patents

A kind of method of precise measurement silicon wafer top and bottom removal amount Download PDF

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Publication number
CN109141324A
CN109141324A CN201811004443.2A CN201811004443A CN109141324A CN 109141324 A CN109141324 A CN 109141324A CN 201811004443 A CN201811004443 A CN 201811004443A CN 109141324 A CN109141324 A CN 109141324A
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China
Prior art keywords
silicon wafer
chamfering
grinding
removal amount
contourgraph
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CN201811004443.2A
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Chinese (zh)
Inventor
叶挺
贺贤汉
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Shanghai Xinxinjingyuan Semiconductor Technology Co Ltd
Hangzhou Semiconductor Wafer Co Ltd
Original Assignee
Shanghai Shenhe Thermo Magnetics Electronics Co Ltd
Hangzhou Semiconductor Wafer Co Ltd
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Application filed by Shanghai Shenhe Thermo Magnetics Electronics Co Ltd, Hangzhou Semiconductor Wafer Co Ltd filed Critical Shanghai Shenhe Thermo Magnetics Electronics Co Ltd
Priority to CN201811004443.2A priority Critical patent/CN109141324A/en
Publication of CN109141324A publication Critical patent/CN109141324A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B21/00Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
    • G01B21/02Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness
    • G01B21/08Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness for measuring thickness

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The present invention relates to field of semiconductor manufacture.A kind of method of precise measurement silicon wafer top and bottom removal amount, includes the following steps: step 1, with chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on chamfering wide cut under chamfering wide cut, silicon wafer on chamfering contourgraph measurement silicon wafer, silicon wafer before grinding;Step 2, after silicon chip grinding, again with chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on chamfering wide cut under chamfering wide cut, silicon wafer on chamfering contourgraph measurement silicon wafer, silicon wafer;Silicon wafer amount removed over is calculated by computing module according to trigonometric function formula in step 3;Similarly, removal amount below silicon wafer is calculated to obtain.This patent measures the wide cut of chamfering up and down of grinding front and back silicon wafer, upper and lower chamfer angle by using chamfering contourgraph, accurately calculates the removal amount of silicon wafer top and bottom.

Description

A kind of method of precise measurement silicon wafer top and bottom removal amount
Technical field
The present invention relates to field of semiconductor manufacture, and in particular to removal measuring method.
Background technique
Grinding (Lapping) mostly uses greatly the mode of twin grinding, one free-revving engine is caused by removing slice Stria and surface damage layer, while silicon wafer thickness being made to reach the requirement of the next step.The thickness of silicon wafer top and bottom grinding removal A certain amount must be met, can be only achieved above-mentioned purpose.Therefore, the measurement of silicon wafer thickness removal amount is just especially heavy in process of lapping It wants.
Existing common measurement method: it with the thickness of thickness measurement equipment measurement silicon wafer before grinding, is surveyed again with thickness after grinding The thickness of instrument measurement silicon wafer is measured, the half of the two thickness difference is considered as the removal amount of top and bottom.The important prerequisite of this measurement method It is, it is assumed that the removal amount of silicon wafer top and bottom is approximately equal.But existing grinder can not accurately guarantee that top and bottom removal amount is identical, Existing measurement method also can not the respective removal amount in precise measurement top and bottom.Such as there is one side removal amount far more than another side, And total removal amount is met the requirements, operating personnel is again no abnormal, it will causes serious bad to the next step, leads to cost Waste.
Summary of the invention
In view of the problems of the existing technology, the present invention provides a kind of method of precise measurement silicon wafer top and bottom removal amount, To solve at least one above-mentioned technical problem.
The technical scheme is that a kind of method of precise measurement silicon wafer top and bottom removal amount, which is characterized in that including Following steps:
Step 1 measures die size parameter with chamfering contourgraph before grinding, and die size parameter includes chamfering on silicon wafer Chamfering wide cut under wide cut, silicon wafer, chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on silicon wafer;
Step 2 after silicon chip grinding, measures die size parameter with chamfering contourgraph again, die size parameter includes silicon Chamfering wide cut under on piece chamfering wide cut, silicon wafer, chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on silicon wafer;
Step 3 will grind chamfering wide cut on the silicon wafer after preceding and grinding by computing module and subtract each other, and according to triangle Silicon wafer amount removed over is calculated in function formula;Similarly, it is fallen under the silicon wafer before being ground by computing module and after grinding Angular width width subtracts each other, and according to trigonometric function formula, removal amount below silicon wafer is calculated.
This patent measures the wide cut of chamfering up and down of grinding front and back silicon wafer, upper and lower chamfer angle by using chamfering contourgraph, Then according to trigonometric function formula, so that it may accurately calculate the removal amount of silicon wafer top and bottom.And chamfering contourgraph it is easy to operate, Measurement is accurate, and calculation formula is also simplest trigonometric function, generally speaking simple possible, and accuracy is high, can monitor well The removal amount of silicon wafer top and bottom during the grinding process achievees the purpose that remove surface damage layer, and then greatly improves the good of product Rate.
In step 3, the calculation formula of silicon wafer amount removed over is d1=(X1-X1 ')Wherein, X1 is before grinding Chamfering wide cut on silicon wafer, X1 ' are that chamfering wide cut, θ 1 are that chamfer angle, θ 1 ' are after grinding on silicon wafer before grinding on silicon wafer after grinding The difference of chamfer angle on silicon wafer, θ 1 and θ 1 ' are less than 1 °;
The calculation formula of removal amount is d2=(X2-X2 ') below silicon waferWherein, X2 is to fall under silicon wafer before grinding Angular width width, X2 ' are that chamfering wide cut, θ 2 are that chamfer angle, θ 2 ' are to fall under silicon wafer after grinding under silicon wafer before grinding under silicon wafer after grinding The difference of angle angle, θ 2 and θ 2 ' are less than 1 °.
When the difference of θ 1 and θ 1 ' is greater than 1 °, the data of chamfering contourgraph measurement may have error, need to re-measure.
When the difference of θ 2 and θ 2 ' is greater than 1 °, the data of chamfering contourgraph measurement may have error, need to re-measure.
T1 is silicon wafer thickness before grinding, and T1 ' is silicon wafer thickness after grinding;
Step 4 verifies the calculated result of step 3 by calculating separately d1+d2 and T1-T1 ';
If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2 It is smaller with the difference of T1-T1 ' the two, show step 3 calculate numerical value accuracy it is higher;
If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, it is wrong Accidentally reason includes error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
In step 2, after first cleaning the silicon wafer after grinding, measured with chamfering contourgraph.Avoid survey caused by lapping rejects Measure error.
In step 1, silicon wafer apex radius before being ground by the measurement of chamfering contourgraph;
In step 2, pass through silicon wafer apex radius after the measurement grinding of chamfering contourgraph;
Apex radius is equal to apex radius after grinding before grinding.
It needs in the case where control apex radius is equal, it is ensured that the precision finally calculated.
Preferably, chamfering contourgraph is surveyed by the die size parameter of at least three positions of measurement to each in step 1 The die size parameter measured carries out the average die size parameter as before grinding;
Chamfering contourgraph passes through the die size parameter of at least three positions of measurement in step 2, to the silicon measured every time Chip size parameter carries out the average die size parameter as after grinding.
It is easy to guarantee the precision of result by multimetering.
Chamfering contourgraph connects a host, is equipped with a memory module in the host, chamfering contourgraph will grind before with grind The die size parameter that acquisition is measured after mill is transmitted to host, and is stored in memory module;
One silicon wafer removal amount software for calculation is also installed, the silicon wafer removal amount software for calculation is equipped with one and calculates in the host Module;
In step 3, computing module imports the die size parameter stored in memory module, and passes through trigonometric function formula, It calculates and obtains removal amount below silicon wafer amount removed over and silicon wafer.
It is easy to implement the intuitive display of removal amount below silicon wafer amount removed over and silicon wafer.
The silicon wafer removal amount software for calculation is additionally provided with a correction verification module, and the correction verification module compares d1+d2 and T1-T1 ' The difference of the two;
If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2 It is smaller with the difference of T1-T1 ' the two, show step 3 calculate numerical value accuracy it is higher;
If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, it is wrong Accidentally reason includes error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
Detailed description of the invention
Fig. 1 is flow chart of the invention;
Fig. 2 is the schema mapping that chamfering contourgraph is depicted before the present invention is ground;
Fig. 3 is the schema mapping that chamfering contourgraph is depicted after the present invention is ground.
Specific embodiment
Following further describes the present invention with reference to the drawings.
Referring to Fig. 1, Fig. 2 and Fig. 3, a kind of method of precise measurement silicon wafer top and bottom removal amount includes the following steps: to walk Rapid one, die size parameter is measured with chamfering contourgraph before grinding, die size parameter includes on silicon wafer under chamfering wide cut, silicon wafer Chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer in chamfering wide cut, silicon wafer;Step 2 after silicon chip grinding, uses chamfering again Contourgraph measures die size parameter, and die size parameter includes chamfering wide cut under chamfering wide cut, silicon wafer on silicon wafer, falls on silicon wafer Chamfer angle, silicon wafer thickness under angle angle, silicon wafer;Step 3 will be ground by computing module on the silicon wafer after preceding and grinding Chamfering wide cut is subtracted each other, and according to trigonometric function formula, silicon wafer amount removed over is calculated;Similarly, it will be ground by computing module Chamfering wide cut is subtracted each other under silicon wafer before mill and after grinding, and according to trigonometric function formula, removal amount below silicon wafer is calculated. This patent measures the wide cut of chamfering up and down of grinding front and back silicon wafer, upper and lower chamfer angle by using chamfering contourgraph, then basis Trigonometric function formula, so that it may accurately calculate the removal amount of silicon wafer top and bottom.And chamfering contourgraph is easy to operate, measurement is quasi- Really, calculation formula is also simplest trigonometric function, generally speaking simple possible, and accuracy is high, can monitor well silicon wafer and exist The removal amount of top and bottom in process of lapping achievees the purpose that remove surface damage layer, and then greatly improves the yield of product.
In step 3, the calculation formula of silicon wafer amount removed over is d1=(X1-X1 ')Wherein, X1 is before grinding Chamfering wide cut on silicon wafer, X1 ' are that chamfering wide cut, θ 1 are that chamfer angle, θ 1 ' are after grinding on silicon wafer before grinding on silicon wafer after grinding The difference of chamfer angle on silicon wafer, θ 1 and θ 1 ' are less than 1 °;The calculation formula of removal amount is d2=(X2-X2 ') below silicon waferWherein, X2 is that chamfering wide cut, X2 ' are that chamfering wide cut, θ 2 are silicon wafer before grinding under silicon wafer after grinding under silicon wafer before grinding Lower chamfer angle, θ 2 ' are chamfer angle under silicon wafer after grinding, and the difference of θ 2 and θ 2 ' is less than 1 °.When the difference of θ 1 and θ 1 ' is greater than At 1 °, the data of chamfering contourgraph measurement may have error, need to re-measure.When the difference of θ 2 and θ 2 ' is greater than 1 °, chamfering The data of contourgraph measurement may have error, need to re-measure.
T1 is silicon wafer thickness before grinding, and T1 ' is silicon wafer thickness after grinding;Step 4 is by calculating separately d1+d2 and T1- T1 ' verifies the calculated result of step 3;If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows to walk Rapid three accuracy that calculate are high, and the difference of d1+d2 and T1-T1 ' the two is smaller, show that step 3 calculates the accuracy of numerical value and gets over It is high;If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, mistake is former Because including error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
In step 2, after first cleaning the silicon wafer after grinding, measured with chamfering contourgraph.Avoid survey caused by lapping rejects Measure error.
In step 1, silicon wafer apex radius before being ground by the measurement of chamfering contourgraph;In step 2, pass through chamfering contourgraph Silicon wafer apex radius after measurement grinding;Apex radius is equal to apex radius after grinding before grinding.It needs in control apex radius phase Deng in the case where, it is ensured that the precision finally calculated.
Preferably, chamfering contourgraph is surveyed by the die size parameter of at least three positions of measurement to each in step 1 The die size parameter measured carries out the average die size parameter as before grinding;Chamfering contourgraph passes through measurement in step 2 The die size parameter of at least three positions carries out the average silicon wafer as after grinding to the die size parameter measured every time Dimensional parameters.It is easy to guarantee the precision of result by multimetering.
Chamfering contourgraph connects a host, and a memory module is equipped in host, and chamfering contourgraph will be before grinding and after grinding The die size parameter that measurement obtains is transmitted to host, and is stored in memory module;One silicon wafer removal amount is also installed in host Software for calculation, silicon wafer removal amount software for calculation are equipped with a computing module;In step 3, computing module imports storage in memory module Die size parameter, calculate and obtain removal amount below silicon wafer amount removed over and silicon wafer.It is removed over to be easy to implement silicon wafer The intuitive display of amount and removal amount below silicon wafer.
Silicon wafer removal amount software for calculation is additionally provided with a correction verification module, and correction verification module compares the difference of d1+d2 Yu T1-T1 ' the two Value;If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2 and T1- The difference of T1 ' the two is smaller, show step 3 calculate numerical value accuracy it is higher;If the difference of d1+d2 and T1-T1 ' the two Value shows that there are errors in computation beyond in 3 μ ms, searches error reason, and error reason includes silicon wafer upper and lower surface caused by grinding Error caused by out-of-flatness.
The above is only the preferred embodiment of the present invention, it is noted that those skilled in the art are come It says, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should be regarded as Protection scope of the present invention.

Claims (8)

1. a kind of method of precise measurement silicon wafer top and bottom removal amount, which comprises the steps of:
Step 1, grind before with chamfering contourgraph measure die size parameter, die size parameter include chamfering wide cut on silicon wafer, Chamfering wide cut under silicon wafer, chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on silicon wafer;
Step 2 after silicon chip grinding, measures die size parameter with chamfering contourgraph again, die size parameter includes on silicon wafer Chamfering wide cut under chamfering wide cut, silicon wafer, chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on silicon wafer;
Step 3 will grind chamfering wide cut on the silicon wafer after preceding and grinding by computing module and subtract each other, and according to trigonometric function Silicon wafer amount removed over is calculated in formula;Similarly, chamfering is wide under the silicon wafer before being ground by computing module and after grinding Width subtracts each other, and according to trigonometric function formula, removal amount below silicon wafer is calculated.
2. a kind of method of precise measurement silicon wafer top and bottom according to claim 1 removal amount, it is characterised in that: step 3 In, the calculation formula of silicon wafer amount removed over is d1=(X1-X1 ') tan1, wherein X1 is to grind chamfering wide cut on preceding silicon wafer, X1 ' is chamfering wide cut on silicon wafer after grinding, and θ 1 is that chamfer angle, θ 1 ' are chamfer angle on silicon wafer after grinding on silicon wafer before grinding, The difference of θ 1 and θ 1 ' is less than 1 °;
The calculation formula of removal amount is d2=(X2-X2 ') tan below silicon wafer2, wherein X2 is to grind chamfering wide cut under preceding silicon wafer, X2 ' is chamfering wide cut under silicon wafer after grinding, and θ 2 is that chamfer angle, θ 2 ' are chamfer angle under silicon wafer after grinding under silicon wafer before grinding, The difference of θ 2 and θ 2 ' is less than 1 °.
3. a kind of method of precise measurement silicon wafer top and bottom according to claim 2 removal amount, it is characterised in that: T1 is to grind Silicon wafer thickness before grinding, T1 ' are silicon wafer thickness after grinding;
Step 4 verifies the calculated result of step 3 by calculating separately d1+d2 and T1-T1 ';
If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2 with The difference of T1-T1 ' the two is smaller, show step 3 calculate numerical value accuracy it is higher;
If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, mistake is former Because including error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
4. a kind of method of precise measurement silicon wafer top and bottom according to claim 1 removal amount, it is characterised in that: step 2 In, after first cleaning the silicon wafer after grinding, measured with chamfering contourgraph.Avoid measurement error caused by lapping rejects.
5. a kind of method of precise measurement silicon wafer top and bottom according to claim 1 removal amount, it is characterised in that: step 1 In, silicon wafer apex radius before being ground by the measurement of chamfering contourgraph;
In step 2, pass through silicon wafer apex radius after the measurement grinding of chamfering contourgraph;
Apex radius is equal to apex radius after grinding before grinding.
6. a kind of method of precise measurement silicon wafer top and bottom according to claim 1 removal amount, it is characterised in that: step 1 Middle chamfering contourgraph carries out the die size parameter measured every time by the die size parameter of at least three positions of measurement The average die size parameter as before grinding;
Chamfering contourgraph passes through the die size parameter of at least three positions of measurement in step 2, to the silicon wafer ruler measured every time Very little parameter carries out the average die size parameter as after grinding.
7. a kind of method of precise measurement silicon wafer top and bottom according to claim 2 removal amount, it is characterised in that: chamfering wheel Wide instrument connects a host, and a memory module is equipped in the host, what chamfering contourgraph obtained before grinding with measurement after grinding Die size parameter is transmitted to host, and is stored in memory module;
One silicon wafer removal amount software for calculation is also installed, the silicon wafer removal amount software for calculation is equipped with one and calculates mould in the host Block;
In step 3, computing module imports the die size parameter stored in memory module, and by trigonometric function formula, calculates Obtain removal amount below silicon wafer amount removed over and silicon wafer.
8. a kind of method of precise measurement silicon wafer top and bottom according to claim 7 removal amount, it is characterised in that: the silicon Piece removal amount software for calculation is additionally provided with a correction verification module, and the correction verification module compares the difference of d1+d2 Yu T1-T1 ' the two;
If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2 with The difference of T1-T1 ' the two is smaller, show step 3 calculate numerical value accuracy it is higher;
If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, mistake is former Because including error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
CN201811004443.2A 2018-08-30 2018-08-30 A kind of method of precise measurement silicon wafer top and bottom removal amount Pending CN109141324A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111872780A (en) * 2020-07-20 2020-11-03 上海新欣晶圆半导体科技有限公司 Method for improving edge warping of silicon wafer

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CN101226904A (en) * 2008-01-24 2008-07-23 上海申和热磁电子有限公司 Silicon slice with asymmetry edge contour and manufacturing method thereof
JP2013039632A (en) * 2011-08-12 2013-02-28 Shin Etsu Handotai Co Ltd Stock removal evaluation method and wafer production method
CN204927247U (en) * 2015-09-14 2015-12-30 圆融光电科技股份有限公司 Measuring device and automatic attenuate machine
CN205310022U (en) * 2015-12-16 2016-06-15 上海汉虹精密机械有限公司 High -accuracy thickness measuring device of double side grinder
CN107639528A (en) * 2016-07-21 2018-01-30 快递股份有限公司 Lapping device

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Publication number Priority date Publication date Assignee Title
US5045505A (en) * 1989-04-28 1991-09-03 Shin-Etsu Handotai Co., Ltd. Method of processing substrate for a beveled semiconductor device
WO2001073831A1 (en) * 2000-03-29 2001-10-04 Shin-Etsu Handotai Co., Ltd. Production method for silicon wafer and soi wafer, and soi wafer
CN101226904A (en) * 2008-01-24 2008-07-23 上海申和热磁电子有限公司 Silicon slice with asymmetry edge contour and manufacturing method thereof
JP2013039632A (en) * 2011-08-12 2013-02-28 Shin Etsu Handotai Co Ltd Stock removal evaluation method and wafer production method
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CN205310022U (en) * 2015-12-16 2016-06-15 上海汉虹精密机械有限公司 High -accuracy thickness measuring device of double side grinder
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111872780A (en) * 2020-07-20 2020-11-03 上海新欣晶圆半导体科技有限公司 Method for improving edge warping of silicon wafer
CN111872780B (en) * 2020-07-20 2022-04-15 上海中欣晶圆半导体科技有限公司 Method for improving edge warping of silicon wafer

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