Summary of the invention
In view of the problems of the existing technology, the present invention provides a kind of method of precise measurement silicon wafer top and bottom removal amount,
To solve at least one above-mentioned technical problem.
The technical scheme is that a kind of method of precise measurement silicon wafer top and bottom removal amount, which is characterized in that including
Following steps:
Step 1 measures die size parameter with chamfering contourgraph before grinding, and die size parameter includes chamfering on silicon wafer
Chamfering wide cut under wide cut, silicon wafer, chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on silicon wafer;
Step 2 after silicon chip grinding, measures die size parameter with chamfering contourgraph again, die size parameter includes silicon
Chamfering wide cut under on piece chamfering wide cut, silicon wafer, chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer on silicon wafer;
Step 3 will grind chamfering wide cut on the silicon wafer after preceding and grinding by computing module and subtract each other, and according to triangle
Silicon wafer amount removed over is calculated in function formula;Similarly, it is fallen under the silicon wafer before being ground by computing module and after grinding
Angular width width subtracts each other, and according to trigonometric function formula, removal amount below silicon wafer is calculated.
This patent measures the wide cut of chamfering up and down of grinding front and back silicon wafer, upper and lower chamfer angle by using chamfering contourgraph,
Then according to trigonometric function formula, so that it may accurately calculate the removal amount of silicon wafer top and bottom.And chamfering contourgraph it is easy to operate,
Measurement is accurate, and calculation formula is also simplest trigonometric function, generally speaking simple possible, and accuracy is high, can monitor well
The removal amount of silicon wafer top and bottom during the grinding process achievees the purpose that remove surface damage layer, and then greatly improves the good of product
Rate.
In step 3, the calculation formula of silicon wafer amount removed over is d1=(X1-X1 ')Wherein, X1 is before grinding
Chamfering wide cut on silicon wafer, X1 ' are that chamfering wide cut, θ 1 are that chamfer angle, θ 1 ' are after grinding on silicon wafer before grinding on silicon wafer after grinding
The difference of chamfer angle on silicon wafer, θ 1 and θ 1 ' are less than 1 °;
The calculation formula of removal amount is d2=(X2-X2 ') below silicon waferWherein, X2 is to fall under silicon wafer before grinding
Angular width width, X2 ' are that chamfering wide cut, θ 2 are that chamfer angle, θ 2 ' are to fall under silicon wafer after grinding under silicon wafer before grinding under silicon wafer after grinding
The difference of angle angle, θ 2 and θ 2 ' are less than 1 °.
When the difference of θ 1 and θ 1 ' is greater than 1 °, the data of chamfering contourgraph measurement may have error, need to re-measure.
When the difference of θ 2 and θ 2 ' is greater than 1 °, the data of chamfering contourgraph measurement may have error, need to re-measure.
T1 is silicon wafer thickness before grinding, and T1 ' is silicon wafer thickness after grinding;
Step 4 verifies the calculated result of step 3 by calculating separately d1+d2 and T1-T1 ';
If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2
It is smaller with the difference of T1-T1 ' the two, show step 3 calculate numerical value accuracy it is higher;
If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, it is wrong
Accidentally reason includes error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
In step 2, after first cleaning the silicon wafer after grinding, measured with chamfering contourgraph.Avoid survey caused by lapping rejects
Measure error.
In step 1, silicon wafer apex radius before being ground by the measurement of chamfering contourgraph;
In step 2, pass through silicon wafer apex radius after the measurement grinding of chamfering contourgraph;
Apex radius is equal to apex radius after grinding before grinding.
It needs in the case where control apex radius is equal, it is ensured that the precision finally calculated.
Preferably, chamfering contourgraph is surveyed by the die size parameter of at least three positions of measurement to each in step 1
The die size parameter measured carries out the average die size parameter as before grinding;
Chamfering contourgraph passes through the die size parameter of at least three positions of measurement in step 2, to the silicon measured every time
Chip size parameter carries out the average die size parameter as after grinding.
It is easy to guarantee the precision of result by multimetering.
Chamfering contourgraph connects a host, is equipped with a memory module in the host, chamfering contourgraph will grind before with grind
The die size parameter that acquisition is measured after mill is transmitted to host, and is stored in memory module;
One silicon wafer removal amount software for calculation is also installed, the silicon wafer removal amount software for calculation is equipped with one and calculates in the host
Module;
In step 3, computing module imports the die size parameter stored in memory module, and passes through trigonometric function formula,
It calculates and obtains removal amount below silicon wafer amount removed over and silicon wafer.
It is easy to implement the intuitive display of removal amount below silicon wafer amount removed over and silicon wafer.
The silicon wafer removal amount software for calculation is additionally provided with a correction verification module, and the correction verification module compares d1+d2 and T1-T1 '
The difference of the two;
If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2
It is smaller with the difference of T1-T1 ' the two, show step 3 calculate numerical value accuracy it is higher;
If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, it is wrong
Accidentally reason includes error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
Specific embodiment
Following further describes the present invention with reference to the drawings.
Referring to Fig. 1, Fig. 2 and Fig. 3, a kind of method of precise measurement silicon wafer top and bottom removal amount includes the following steps: to walk
Rapid one, die size parameter is measured with chamfering contourgraph before grinding, die size parameter includes on silicon wafer under chamfering wide cut, silicon wafer
Chamfer angle, silicon wafer thickness under chamfer angle, silicon wafer in chamfering wide cut, silicon wafer;Step 2 after silicon chip grinding, uses chamfering again
Contourgraph measures die size parameter, and die size parameter includes chamfering wide cut under chamfering wide cut, silicon wafer on silicon wafer, falls on silicon wafer
Chamfer angle, silicon wafer thickness under angle angle, silicon wafer;Step 3 will be ground by computing module on the silicon wafer after preceding and grinding
Chamfering wide cut is subtracted each other, and according to trigonometric function formula, silicon wafer amount removed over is calculated;Similarly, it will be ground by computing module
Chamfering wide cut is subtracted each other under silicon wafer before mill and after grinding, and according to trigonometric function formula, removal amount below silicon wafer is calculated.
This patent measures the wide cut of chamfering up and down of grinding front and back silicon wafer, upper and lower chamfer angle by using chamfering contourgraph, then basis
Trigonometric function formula, so that it may accurately calculate the removal amount of silicon wafer top and bottom.And chamfering contourgraph is easy to operate, measurement is quasi-
Really, calculation formula is also simplest trigonometric function, generally speaking simple possible, and accuracy is high, can monitor well silicon wafer and exist
The removal amount of top and bottom in process of lapping achievees the purpose that remove surface damage layer, and then greatly improves the yield of product.
In step 3, the calculation formula of silicon wafer amount removed over is d1=(X1-X1 ')Wherein, X1 is before grinding
Chamfering wide cut on silicon wafer, X1 ' are that chamfering wide cut, θ 1 are that chamfer angle, θ 1 ' are after grinding on silicon wafer before grinding on silicon wafer after grinding
The difference of chamfer angle on silicon wafer, θ 1 and θ 1 ' are less than 1 °;The calculation formula of removal amount is d2=(X2-X2 ') below silicon waferWherein, X2 is that chamfering wide cut, X2 ' are that chamfering wide cut, θ 2 are silicon wafer before grinding under silicon wafer after grinding under silicon wafer before grinding
Lower chamfer angle, θ 2 ' are chamfer angle under silicon wafer after grinding, and the difference of θ 2 and θ 2 ' is less than 1 °.When the difference of θ 1 and θ 1 ' is greater than
At 1 °, the data of chamfering contourgraph measurement may have error, need to re-measure.When the difference of θ 2 and θ 2 ' is greater than 1 °, chamfering
The data of contourgraph measurement may have error, need to re-measure.
T1 is silicon wafer thickness before grinding, and T1 ' is silicon wafer thickness after grinding;Step 4 is by calculating separately d1+d2 and T1-
T1 ' verifies the calculated result of step 3;If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows to walk
Rapid three accuracy that calculate are high, and the difference of d1+d2 and T1-T1 ' the two is smaller, show that step 3 calculates the accuracy of numerical value and gets over
It is high;If the difference of d1+d2 and T1-T1 ' the two shows that there are errors in computation beyond in 3 μ ms, error reason is searched, mistake is former
Because including error caused by silicon wafer upper and lower surface out-of-flatness caused by grinding.
In step 2, after first cleaning the silicon wafer after grinding, measured with chamfering contourgraph.Avoid survey caused by lapping rejects
Measure error.
In step 1, silicon wafer apex radius before being ground by the measurement of chamfering contourgraph;In step 2, pass through chamfering contourgraph
Silicon wafer apex radius after measurement grinding;Apex radius is equal to apex radius after grinding before grinding.It needs in control apex radius phase
Deng in the case where, it is ensured that the precision finally calculated.
Preferably, chamfering contourgraph is surveyed by the die size parameter of at least three positions of measurement to each in step 1
The die size parameter measured carries out the average die size parameter as before grinding;Chamfering contourgraph passes through measurement in step 2
The die size parameter of at least three positions carries out the average silicon wafer as after grinding to the die size parameter measured every time
Dimensional parameters.It is easy to guarantee the precision of result by multimetering.
Chamfering contourgraph connects a host, and a memory module is equipped in host, and chamfering contourgraph will be before grinding and after grinding
The die size parameter that measurement obtains is transmitted to host, and is stored in memory module;One silicon wafer removal amount is also installed in host
Software for calculation, silicon wafer removal amount software for calculation are equipped with a computing module;In step 3, computing module imports storage in memory module
Die size parameter, calculate and obtain removal amount below silicon wafer amount removed over and silicon wafer.It is removed over to be easy to implement silicon wafer
The intuitive display of amount and removal amount below silicon wafer.
Silicon wafer removal amount software for calculation is additionally provided with a correction verification module, and correction verification module compares the difference of d1+d2 Yu T1-T1 ' the two
Value;If the difference of d1+d2 and T1-T1 ' the two in 3 μ ms, shows that the accuracy that step 3 calculates is high, d1+d2 and T1-
The difference of T1 ' the two is smaller, show step 3 calculate numerical value accuracy it is higher;If the difference of d1+d2 and T1-T1 ' the two
Value shows that there are errors in computation beyond in 3 μ ms, searches error reason, and error reason includes silicon wafer upper and lower surface caused by grinding
Error caused by out-of-flatness.
The above is only the preferred embodiment of the present invention, it is noted that those skilled in the art are come
It says, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should be regarded as
Protection scope of the present invention.