JP2013039632A - Stock removal evaluation method and wafer production method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a stock removal evaluation method for easily evaluating the stock removal of both front and back surfaces separately within a short period of time by using a wafer to be produced, thereby producing the wafer in which front and back stock removal have been adjusted, in a machining process in which a predetermined amount of a material is removed by simultaneously machining both the front and back faces of the wafer.SOLUTION: The stock removal evaluation method for evaluating the stock removal of the wafer after machining in a machining process in which the predetermined amount of the material is removed by machining both the front and back faces of the wafer which has been chamfered at the outside periphery includes steps for: calculating the stock removal of the front and back faces of the wafer on the basis of the amount of a change in the width of the respective chamfer on the front and back faces of the wafer before and after machining; and evaluating the stock removal.

Description

  The present invention relates to a process for processing both surfaces of a semiconductor wafer, and an evaluation method for evaluating the machining allowance of both front and back surfaces in the process, and a wafer manufacturing method for processing with stable quality using the evaluation method. .

  Conventionally, in general, a method of manufacturing a semiconductor wafer such as a silicon mirror wafer includes a slicing process for slicing a single crystal rod manufactured by a single crystal manufacturing apparatus to obtain a thin disk-shaped wafer, and a wafer obtained by the slicing process. In order to prevent cracking and chipping, chamfering process of chamfering the edge of the outer periphery, lapping process of lapping the chamfered wafer and flattening it, and processing distortion remaining on the chamfered and lapped wafer surface are removed. It consists of an etching process, a polishing process for finishing the surface of the etched wafer into a mirror surface, and a cleaning process for cleaning the polished wafer.

In addition to lapping, a technique called double-headed grinding in which both surfaces are ground simultaneously using a grindstone is used in the flattening step. Further, the polishing step includes double-side polishing in which both sides are simultaneously polished and single-side polishing in which one side is polished.
By the way, the purpose of the lapping process is, for example, to obtain a necessary shape accuracy such as flatness and parallelism at the same time that a sliced wafer is aligned to a predetermined thickness. In general, it is known that the wafer after the lapping process has the best shape accuracy, and it is said that the final shape of the wafer is determined, and the shape accuracy in the lapping process is extremely important.

  In addition, as a lapping technology, a combination of three movements, a concentric circular platen rotation, a revolving movement of a circular wafer holding carrier with respect to the main body of a device, and a circular wafer holding carrier rotation, are combined. A wrapping device that performs lap by giving a relative motion to the wing is known (see, for example, Patent Document 1). This wrapping apparatus is configured as shown in FIGS. 8A and 8B, for example.

As shown in FIGS. 8A and 8B, the wrapping apparatus 10 has a lower surface plate 12 and an upper surface plate 11 provided to face each other in the vertical direction. These upper and lower surface plates 11 and 12 are rotated in opposite directions by driving means (not shown). The lower surface plate 12 has a sun gear 13 on the upper surface of the center thereof, and an annular internal gear 14 is provided on the peripheral edge thereof.
In addition, a gear portion 16 that meshes with the sun gear 13 and the internal gear 14 is formed on the outer peripheral surface of the wafer holding carrier 15 to form a gear structure as a whole. The wafer holding carrier 15 is provided with a plurality of holding holes 17. The wafer W to be wrapped is disposed and held in the holding hole 17.

The carrier 15 holding the wafer is sandwiched between the upper and lower surface plates 11 and 12, and planetary gear motion, that is, rotating and revolving between the upper and lower surface plates 11 and 12 rotating while facing each other. In order to perform lapping, a liquid turbid liquid such as slurry containing aluminum oxide (Al ₂ O ₃ ), silicon carbide (SiC) or the like and water containing a surfactant is provided on the upper platen 11 from a nozzle. Abrasive grains are fed between the wafer W and the upper and lower surface plates 11 and 12 by flowing through the formed through holes 18 into the gap between the upper and lower surface plates 11 and 12, and the shape of the upper and lower surface plates 11 and 12 is transferred to the wafer W. ing.

Here, in order to obtain high flatness, it is necessary to accurately transfer the shape of the upper and lower surface plates to the wafer, and the movement of the slurry between the wafer performing the relative motion and the upper and lower surface plates cannot be ignored. Since the abrasive grains in the slurry are constantly worn and the grain size and sharpness change, there is a bias in the movement of the slurry, and where the slurry flow is poor, there is a part that wraps with abrasive grains that are small in grain size and poor in sharpness. The part becomes thick. For this reason, the upper and lower surface plates are provided with grids at regular intervals, and unnecessary slurry and chips are discharged therefrom.
Further, since the upper and lower surface plates and the carrier are worn as they are used, it is necessary to replace them after being used for a certain period.

JP-A-10-180624

In a processing apparatus that processes both sides simultaneously, such as the lapping apparatus described above, even if the total machining allowance (or machining allowance) is constant, there is a possibility that the balance between the machining allowances on the front and back sides (upper and lower) is not known. For example, there is a possibility that the machining allowance on both the front and back surfaces may change over time due to wear of the upper and lower surface plates and the carrier.
In general, the management of the machining allowance in a process of simultaneously processing both surfaces, such as a lapping process, is measured by measuring the center thickness of the wafer before and after processing and evaluating the change in thickness. However, with this evaluation method, the total allowance can be grasped, but the front and back allowances cannot be distinguished separately.

Therefore, conventionally, for example, as shown in FIG. 9, a dummy wafer is prepared, laser marks are printed on both sides, and how the dot depth changes before and after processing is confirmed using a laser microscope. The front and back side allowance is evaluated.
In this conventional evaluation method, it is necessary to place laser marks on both sides of the wafer, especially on the surface (the surface on which normal devices are normally formed), so the product itself cannot be directly evaluated, and a dummy wafer is used for confirmation. There is a need.

  In addition, this method requires time and effort for laser mark printing and dot depth measurement, and it is difficult to easily evaluate the method. Therefore, it is difficult to increase the measurement frequency. Also, when the slurry enters the dot, the accuracy of measuring the dot depth is deteriorated. Furthermore, when the wafer is not relatively flat before processing, the measurement accuracy when checking the dot depth with a laser microscope is poor, and the variation becomes large. For example, a sliced wafer before processing has irregularities called saw marks, and the measurement accuracy may deteriorate due to the influence of the irregularities.

In addition, since it is preferable to reduce the allowance when improving productivity or reducing the basic unit, it is desirable to set a margin allowance for maintaining quality.
When the machining allowance is small as described above, the difference between machining front and back machining allowances becomes a problem. For example, if the difference between the front and back machining allowances fluctuates greatly, the history of the previous process (such as the saw mark of the slicing process) may remain due to insufficient machining allowance. Also, if you do not notice that the front / back difference has changed over time, a large number of defects may occur. Therefore, when the allowance is small, it is necessary to increase the frequency of managing the front and back allowance difference.
Further, when the wafer shape of the raw material is not flat, it is necessary to check the machining allowance within the wafer surface (especially the outer peripheral portion) and whether the surface is processed into a taper shape.

  The present invention has been made in view of the above-described problems, and uses a wafer as a product in a processing process such as lapping, which simultaneously processes both front and back surfaces of a wafer such as a silicon wafer and removes it with a predetermined machining allowance. It is an object to provide a method for evaluating a machining allowance and a method for producing a wafer, which can easily and separately evaluate the machining allowances for both the front and back surfaces separately, thereby enabling the production of a wafer with the adjusted front and back machining allowances. And

In order to achieve the above object, according to the present invention, there is provided a machining allowance evaluation method for evaluating the machining allowance of the wafer after machining in a machining process in which both front and back surfaces of a wafer having a chamfered outer periphery are removed with a predetermined machining allowance. Thus, a machining allowance evaluation method is provided, wherein the machining allowance of each front and back surfaces of the wafer is calculated and evaluated based on the amount of change in the chamfer width of each front and back surfaces of the wafer before and after processing.
With such an evaluation method, a product wafer can be directly evaluated, and the machining allowance on both the front and back surfaces can be separately and easily evaluated in a short time. Further, the measurement frequency can be easily increased, and the measurement accuracy can be easily improved without increasing the measurement time.

At this time, when the chamfering angle of the surface of the wafer before processing is θ1 and the chamfering angle of the back surface is θ2, the machining allowance of each of the front and back surfaces of the wafer is expressed by the following formula: Surface machining allowance = (chamfering of the wafer surface before processing) Width—chamfering width of wafer surface after processing) × tan θ1, back surface machining allowance = (chamfering width of wafer back surface before processing−chamfering width of wafer back surface after processing) × tan θ2.
In this way, it is possible to easily evaluate the stock allowance on both front and back surfaces.

At this time, the processing process can be any one of double-sided lapping, double-sided grinding, and double-sided polishing.
As described above, the evaluation method of the present invention can be applied to various processing processes in which the front and back surfaces of the wafer are simultaneously processed and removed with a predetermined machining allowance.

  Further, according to the present invention, at least a step of chamfering the outer periphery of the wafer, a step of removing the front and back surfaces of the wafer with a predetermined machining allowance, and a step of evaluating the machining allowance of the wafer after machining. In the method for manufacturing a wafer, the method further includes measuring a chamfer width on each of the front and back surfaces of the wafer before and after the front and back processing steps of the wafer, and in the step of evaluating the machining allowance of the wafer, There is provided a method for manufacturing a wafer, characterized in that a machining allowance for each of the front and back surfaces of the wafer is calculated and evaluated based on a change amount of a chamfer width of each of the front and back surfaces of the wafer measured before and after the processing of the front and back surfaces of the wafer. The

  If it is such a manufacturing method, the allowance on both the front and back sides is individually evaluated in a short time separately using the wafer as the product, and the allowance on each of the front and back surfaces is adjusted separately based on the evaluation result. Wafer can be manufactured.

  At this time, when the chamfering angle of the surface of the wafer before processing is θ1 and the chamfering angle of the back surface is θ2, the machining allowance of each of the front and back surfaces of the wafer is expressed by the following formula: Surface machining allowance = (chamfering of the wafer surface before processing) Width-chamfering width of wafer surface after processing) x tan θ1, back surface allowance = (chamfering width of wafer back surface before processing-chamfering width of wafer back surface after processing) x tan θ2 To evaluate.

Further, at this time, in order to adjust the respective machining allowances of the front and back surfaces of the wafer based on the evaluation result in the evaluation process of the wafer machining allowance, there is a step of adjusting processing conditions in the next machining process of the front and back surfaces of the wafer. It is preferable.
With such a method, it is possible to manufacture a wafer having a stable quality while managing the machining allowance between the front and back surfaces of the wafer.

At this time, the front and back surfaces of the wafer can be processed by either double-sided lapping, double-sided grinding, or double-sided polishing.
Thus, the manufacturing method of the present invention can be applied to various processing processes in which both front and back surfaces of a wafer are simultaneously processed and removed with a predetermined machining allowance.

  In the present invention, in the machining process of removing both the front and back surfaces of the wafer with the chamfered outer periphery with a predetermined machining allowance, the machining allowance for each of the front and back surfaces of the wafer is calculated based on the amount of change in the chamfer width of each front and back surfaces of the wafer before and after the machining Therefore, the wafer as a product can be directly evaluated, and the machining allowance on both the front and back sides can be easily and separately evaluated in a short time.

It is explanatory drawing explaining the evaluation method of the machining allowance of this invention. It is a flowchart which shows an example of the manufacturing method of the wafer of this invention. It is the schematic which shows an example of the lapping apparatus which can be used with the manufacturing method of the wafer of this invention. It is explanatory drawing explaining the machining allowance evaluation position of the wafer in Example 2-4. It is a figure which shows the result of Example 2. It is a figure which shows the result of Example 3. It is a figure which shows the result of Example 4. It is the schematic of the wrapping apparatus generally used. (A) Schematic diagram of the device. (B) Schematic top view of the device. It is explanatory drawing explaining the evaluation method of the conventional front and back removal allowance.

Hereinafter, although an embodiment is described about the present invention, the present invention is not limited to this.
In a processing process in which both surfaces of a wafer are removed with a predetermined machining allowance, for example, in a lapping process, processing is performed with a certain machining allowance in order to remove a work-affected layer (distortion, damage) generated in a previous slicing process. This allowance is preferably as small as possible in consideration of productivity and cost of raw materials.
In the case of machining with a sufficiently large machining allowance, even if there is a slight difference between the machining allowances on the front and back sides, there is no effect on the quality after machining, so the conventional method of calculating the total machining allowance from the thickness change before and after machining should be used. it can.

  However, in recent years, there has been an increase in processing with a small machining allowance. In this case, for example, it is necessary to secure a machining allowance necessary for stabilizing the quality of the surface on which the device is formed as well as the entire machining allowance. . In other words, it is necessary to control to secure the targeted machining allowance on both the front and back surfaces and to remove the history of the previous process such as saw marks. Therefore, it is important to manage the difference between the front and back.

However, in the conventional method of managing the machining allowance by changing the thickness of the wafer before and after processing, it is difficult to easily evaluate the front / back machining allowance difference (balance).
Therefore, the present inventor has intensively studied to solve such problems. As a result, the inventors have conceived that it is possible to easily calculate the machining allowance for each of the front and back surfaces of the wafer based on the amount of change in the chamfer width of each of the front and back surfaces of the wafer, thereby completing the present invention.

The method for evaluating the machining allowance of the present invention will be described below.
FIG. 1 is an explanatory view for explaining a method for evaluating a machining allowance according to the present invention.
As shown in FIG. 1, the outer periphery of the wafer to be evaluated is chamfered. Here, the chamfering width on the front side is X1, the chamfering angle is θ1, the chamfering width on the backside is X2, and the chamfering angle is θ2.
The machining allowance evaluation method of the present invention is a method for evaluating the machining allowance of a processed wafer in a machining process in which the front and back surfaces of a wafer having a chamfered outer periphery are removed with a predetermined machining allowance.

First, the chamfering widths X1 and X2 and the chamfering angles θ1 and θ2 of the wafer before processing are measured by a chamfering shape measuring apparatus.
Next, the front and back surfaces of the wafer are processed and removed by a predetermined amount. Then, the chamfered widths X1 and X2 of the wafer after processing are measured again by the chamfered shape measuring device.
Thereafter, the machining allowance for each of the front and back surfaces of the wafer is calculated and evaluated based on the amount of change in the chamfer width between the front and back surfaces of the wafer before and after processing.

Specifically, the allowance is calculated by the following equation.
Surface removal allowance = (Chamfering width X1 of wafer surface before processing−Chamfering width X1 of wafer surface after processing) × tan θ1
Back surface removal allowance = (Chamfering width X2 of wafer back surface before processing−Chamfering width X2 of wafer back surface after processing) × tan θ2

With such an evaluation method, a product wafer can be directly evaluated without using a dummy wafer, so that the evaluation accuracy can be improved and the cost can be reduced. Moreover, the machining allowances on both the front and back sides can be easily and separately evaluated in a short time. In addition, in order to improve the measurement accuracy, it is possible to easily increase the measurement frequency by measuring multiple wafers or evaluating the machining allowance based on the chamfer width at multiple positions within the wafer surface. It doesn't take much evaluation time.
Here, the above-described processing process can be any of double-sided lapping, double-sided grinding, and double-sided polishing.
As described above, the evaluation method of the present invention can be applied to various processing processes in which the front and back surfaces of the wafer are simultaneously processed and removed with a predetermined machining allowance.

Next, the manufacturing method of the wafer of this invention is demonstrated.
FIG. 2 shows a flowchart of an example of the wafer manufacturing method of the present invention.
As shown in FIG. 1, first, the outer periphery of the wafer is chamfered (A in FIG. 2). This step is not particularly limited, and chamfering can be performed in the same manner as in the conventional method.
Next, the chamfering widths X1 and X2 and the chamfering angles θ1 and θ2 of the wafer before processing are measured by a chamfering shape measuring apparatus (B in FIG. 2). This measurement can be performed by a conventional method generally performed after chamfering for evaluation of chamfering quality.

  Next, both front and back surfaces of the wafer are removed with a predetermined machining allowance by performing processing such as double-sided lapping (C in FIG. 2). This step is also not particularly limited, and processing can be performed in the same manner as in the conventional method. For example, an example of performing double-sided wrapping will be described below.

FIG. 3 is a schematic view showing an example of a lapping apparatus that can be used in the wafer manufacturing method of the present invention. As shown in FIG. 3, the wrapping apparatus 1 includes a lower surface plate 12 and an upper surface plate 11 that are provided to face each other in the vertical direction. While the upper surface plate 11 is stopped, the lower surface plate 12 is rotated by driving means (not shown). The lower surface plate 12 has a sun gear 13 on the upper surface of the center thereof, and an annular internal gear 14 is provided on the peripheral edge thereof.
In addition, a gear portion 16 that meshes with the sun gear 13 and the internal gear 14 is formed on the outer peripheral surface of the wafer holding carrier 15 to form a gear structure as a whole. The wafer holding carrier 15 is provided with a plurality of holding holes 17. The wafer W to be wrapped is disposed and held in the holding hole 17.

The carrier 15 holding the wafer is sandwiched between the upper and lower surface plates 11 and 12, and planetary gear motion, that is, rotation and revolution, is performed between the rotating lower surface plate 12 and the stopped upper surface plate 11. In order to perform lapping, a liquid turbid liquid such as slurry containing aluminum oxide (Al ₂ O ₃ ), silicon carbide (SiC) or the like and water containing a surfactant is provided on the upper platen 11 from a nozzle. Abrasive grains are fed between the wafer W and the upper and lower surface plates 11 and 12 by flowing into the gap between the upper and lower surface plates 11 and 12 through the formed through holes, and both surfaces of the wafer W are lapped.

In this way, the chamfered widths X1 and X2 of the processed wafer from which a predetermined amount on both the front and back surfaces are removed are measured by a chamfered shape measuring device (D in FIG. 2).
Next, the machining allowance of the wafer after processing is evaluated (E in FIG. 2).
In this step, similarly to the above-described method for evaluating the machining allowance of the present invention, the machining allowance for each of the front and back surfaces of the wafer is calculated and evaluated based on the amount of change in the chamfer width on both the front and back surfaces of the wafer before and after processing.

Specifically, the allowance is calculated by the following equation, in the same manner as the allowance evaluation method of the present invention described above.
Surface removal allowance = (Chamfering width of wafer surface before processing−Chamfering width of wafer surface after processing) × tan θ1
Back surface removal allowance = (Chamfer width of wafer back surface before processing−Chamfer width of wafer back surface after processing) × tan θ2
With such a manufacturing method, a product wafer can be directly evaluated without using a dummy wafer, so that measurement accuracy can be improved and costs can be reduced. Based on the evaluation results, wafers can be manufactured while managing and adjusting the machining allowances for the front and back surfaces separately.

At this time, in order to adjust the machining allowance of the front and back surfaces of the wafer based on the evaluation result in the wafer machining allowance evaluation process, the process of adjusting the machining conditions in the next wafer front and back machining process (F in FIG. 2). ).
For example, a case where wrapping is performed using a wrapping apparatus as shown in FIG. 3 will be described as an example. As described above, in the wrapping apparatus, the lower surface plate rotates with the upper surface plate stopped, and the carrier rotates and revolves.

  When viewed from the wafer, the difference between the rotation speed of the lower surface plate and the revolution speed of the carrier is the ability to wrap the lower surface of the wafer. Moreover, since the upper surface plate is stopped, the revolution speed of the carrier becomes the ability to wrap the upper surface of the wafer. Therefore, by adjusting these rotational speeds, in particular, the revolution speed of the carrier, the front and back difference in lapping can be arbitrarily adjusted. Moreover, it can also adjust combining processing conditions other than rotation speed, for example, conditions, such as a slurry flow rate.

With such a method, it is possible to manufacture a wafer having a stable quality while managing the machining allowance between the front and back surfaces of the wafer.
In addition, by evaluating the change in the front and back machining allowances under various processing conditions in advance using the evaluation method of the present invention, the difference in the front and back machining allowances deviates from the control value due to changes over time due to wear of the surface plate, for example. The difference between the front and back allowances can be adjusted. Thus, by increasing the frequency of the prior evaluation (daily inspection) of the difference between the front and back side allowances and performing the feedback (adjustment), it becomes a wafer manufacturing method capable of supplying a wafer with stable quality.

Further, the processing of both the front and back surfaces of the wafer can be performed by double-sided grinding or double-sided polishing in addition to double-sided lapping.
Thus, the manufacturing method of the present invention can be applied to various processing processes in which both front and back surfaces of a wafer are simultaneously processed and removed with a predetermined machining allowance.

  EXAMPLES Hereinafter, the present invention will be described more specifically with reference to examples and comparative examples of the present invention, but the present invention is not limited to these.

Example 1
One silicon wafer was manufactured according to the wafer manufacturing method of the present invention as shown in FIG. 2, and the stock removal was evaluated by the stock removal evaluation method of the present invention.
First, after chamfering the wafer, the chamfering width and chamfering angle on the front surface side and the back surface side were measured using a chamfering shape measuring device (LEP2200 manufactured by KOBELCO). The position of the wafer for which the machining allowance was evaluated was the 90 ° position shown in FIG.
As a result, the chamfering width X1 on the front surface side was 326.0 μm, the chamfering angle θ1 was 26.2 °, the chamfering width X2 on the back surface side was 352.8 μm, and the chamfering angle θ2 was 25.19 °.

Next, the wafer was lapped using a lapping apparatus as shown in FIG. At this time, the machining allowance was adjusted to 25 μm on one side and the machining allowance on both the front and back surfaces was uniform.
Next, the chamfering width on the front surface side and the back surface side of the processed wafer was measured using a chamfering shape measuring apparatus.
As a result, the chamfering width X1 on the front surface side was 276.4 μm, and the chamfering width X2 on the back surface side was 299.4 μm.

The machining allowance was calculated from the following equation using the measured chamfer width before and after machining.
Surface allowance = (326.0−276.4) × tan (26.2 °) = 24.4 μm
Back surface removal allowance = (352.8−299.4) × tan (25.19 °) = 25.1 μm
Moreover, the front and back machining allowance could be evaluated as follows.
Front / back machining allowance difference = (surface machining allowance−back machining allowance) = (24.4−25.1) = − 0.7 μm
The lapping machine used this time has a uniform front and back allowance, and it was found that it was as intended. The above evaluation could be performed in a shorter time than the conventional method in the comparative example described later.

  As described above, it was confirmed that the machining allowance evaluation method of the present invention can easily and separately evaluate the machining allowances on both the front and back surfaces using a wafer as a product.

(Example 2)
In the same manner as in Example 1, the machining allowance of four silicon wafers was evaluated by the machining allowance evaluation method of the present invention. However, the position of the wafer for which the machining allowance was evaluated was set at 8 locations as follows. That is, as shown in FIG. 4, the positions of 9.1, 45, 90, 135, 180, 225, 270, and 315 ° in the wafer surface were evaluated.
The results are shown in Table 1. Further, FIG. 5 shows the total machining allowance, machining allowance, average value and variation (standard deviation σ) of the machining allowance.

  Thus, the present invention can easily evaluate the machining allowance of a plurality of wafers based on the chamfer widths at a plurality of positions, and can perform more reliable evaluation by, for example, obtaining an average value. I understand. Thus, by increasing the measurement frequency and evaluating, the influence of the slice shape of the wafer before processing and the distribution (σ) of the machining allowance within the wafer surface can be easily estimated. For example, from the average of the machining allowance, it can be confirmed how much the front / back machining allowance can occur in the lapping apparatus used, and from the variation in the machining allowance, it can be evaluated whether the wafer is tilted or not. From the result of the average value of the machining allowance in FIG. 5, it can be seen that in the lapping apparatus used, the machining allowance on the front surface is about 1 to 2 μm higher than that on the back surface.

  On the other hand, in the comparative example described later, it takes a lot of measurement time, and it is difficult to increase the number of wafers to be evaluated.

(Example 3)
A silicon wafer was manufactured in accordance with the wafer manufacturing method of the present invention in the same manner as in Example 1, and the stock removal of the silicon wafer was evaluated at eight positions by the stock removal evaluation method of the present invention in the same manner as in Example 2. However, a lapping device was used under the condition that the surface allowance was about 2 μm larger than the back surface. And the average value and distribution ((sigma)) of the allowance difference were calculated | required. A control value was set for the average value and distribution (σ), and the production and evaluation of the wafer were repeated to confirm the transition. Here, the management value of the average value was set to 3.5 μm, and the management value of the distribution (σ) was set to 2.5 μm.

  The result is shown in FIG. As shown in FIGS. 6A and 6B, it can be seen that the average value and the distribution (σ) are all within the control value, although there is some variation. This confirmed that stable processing was performed.

Example 4
A silicon wafer was manufactured in accordance with the wafer manufacturing method of the present invention in the same manner as in Example 1, and the stock removal of the silicon wafer was evaluated at eight positions by the stock removal evaluation method of the present invention in the same manner as in Example 2. And the manufacture and evaluation of the silicon wafer were repeated while managing the average value of the machining allowance. Here, the management value of the average value of the machining allowance was set to 3.5 μm.
While repeating these, as shown in FIG. 7, the average value sometimes exceeded the control value 3.5 μm, so in order to adjust the machining allowance of the front and back surfaces of the wafer based on the evaluation results, the processing conditions are as follows: Adjusted as follows. Specifically, the number of revolutions of the carrier was adjusted by adjusting the number of rotations of the sun gear and the internal gear of the lapping device used.

As a result, as shown in the latter half of FIG. 7, the wafer could be manufactured with the average value of the machining allowance suppressed to a control value of 3.5 μm or less.
Thus, according to the wafer manufacturing method of the present invention, the machining allowances on both the front and back surfaces can be evaluated separately, and a wafer in which the machining allowances on the front and back surfaces are separately adjusted based on the evaluation results can be manufactured. In addition, it is possible to manufacture a wafer having a stable quality while managing the difference between the front and back surfaces of the wafer.

(Comparative example)
A single silicon wafer was manufactured under the same conditions as in Example 1 except for the evaluation process of the machining allowance, and the machining allowance was evaluated by a conventional method in which a laser mark was printed on the wafer as shown in FIG.
First, a dummy wafer was prepared from the manufactured wafers, and laser marks were printed on both surfaces of the wafer. Here, printing was performed with a hard laser marker at a dot depth of about 50 μm.

After printing the laser mark, the dot depth at an arbitrary position was confirmed with a laser microscope. As a result, the dots printed on the front side were 53.5 μm, and the dots printed on the back side were 54.5 μm.
Next, using the same lapping apparatus as that used in Example 1, the wafer was lapped under the same conditions as in Example 1.

Next, the dot depth of the laser mark on the processed wafer was confirmed. Here, the confirmation position was the same as the position at the time of confirmation before processing. As a result, the laser mark contained foreign substances that seemed to be slurry, and the exact depth could not be confirmed. Therefore, after cleaning the wafer and removing the foreign matter, the dot depth was confirmed again.
As a result, the dots printed on the front side were 29.2 μm, and the dots printed on the back side were 29.6 μm. From these changes in dot depth, it was found that the allowance on the front surface side was 24.3 μm and the allowance on the back surface side was 24.9 μm. Further, the difference in allowance between the front and back surfaces was −0.6 μm.

Thus, by the conventional method using a laser mark, it was confirmed that the processing was performed with the same machining allowance as in Example 1, but in this conventional method, the product wafer could not be directly evaluated, In addition, it was necessary to perform cleaning for removing foreign matters such as slurry that entered the laser mark after printing and processing of the laser mark, and it took a very long time to evaluate.
In addition, since measurement can be performed only at a place where dots are printed, it is necessary to print a lot of laser marks in order to improve evaluation accuracy, and in this case, a long time is required. In particular, when the average of the machining allowance at the outer peripheral portion is accurately evaluated, it is necessary to measure more dot depths, which requires a very long time. Thus, the conventional evaluation method cannot be easily implemented.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

1, 10 ... Wrapping device, 11 ... Upper surface plate, 12 ... Lower surface plate,
13 ... Sun gear, 14 ... Internal gear, 15 ... Wafer holding carrier,
16 ... gear part, 17 ... holding hole, 18 ... through hole, W ... wafer.

Claims (7)

In a processing process for removing both front and back surfaces of a wafer having a chamfered outer periphery with a predetermined machining allowance, a machining allowance evaluation method for evaluating the machining allowance of the wafer after machining,
A machining allowance evaluation method, characterized in that a machining allowance for each front and back surfaces of the wafer is calculated and evaluated based on a change amount of a chamfer width of each front and back surfaces of the wafer before and after processing. When the chamfering angle of the surface of the wafer before processing is θ1 and the chamfering angle of the back surface is θ2,
Surface allowance = (Chamfer width of wafer surface before processing−Chamfer width of wafer surface after processing) × tan θ1,
Back surface removal allowance = (Chamfer width of wafer back surface before processing−Chamfer width of wafer back surface after processing) × tan θ2,
The method for evaluating a stock removal according to claim 1, wherein:   3. The machining allowance evaluation method according to claim 1, wherein the processing process is any one of double-sided lapping, double-sided grinding, and double-sided polishing. In a method for producing a wafer, comprising at least a step of chamfering the outer periphery of the wafer, a step of removing both front and back surfaces of the wafer with a predetermined machining allowance, and a step of evaluating the machining allowance of the wafer after machining,
Furthermore, before and after the processing step of the front and back sides of the wafer, the step of measuring the chamfer width of each of the front and back surfaces of the wafer,
In the step of evaluating the machining allowance of the wafer, the machining allowance of each front and back surfaces of the wafer is calculated and evaluated based on the amount of change in the chamfer width of each front and back surfaces of the wafer measured before and after the processing of the front and back surfaces of the wafer. A method for producing a wafer, comprising: When the chamfering angle of the surface of the wafer before processing is θ1 and the chamfering angle of the back surface is θ2,
Surface allowance = (Chamfer width of wafer surface before processing−Chamfer width of wafer surface after processing) × tan θ1,
Back surface removal allowance = (Chamfer width of wafer back surface before processing−Chamfer width of wafer back surface after processing) × tan θ2,
The wafer manufacturing method according to claim 4, wherein the wafer manufacturing method is calculated by:   In order to adjust the machining allowance of the front and back surfaces of the wafer based on the evaluation result in the evaluation process of the wafer machining allowance, it has a step of adjusting the processing conditions in the next processing process of the front and back surfaces of the wafer, The method for manufacturing a wafer according to claim 4 or 5.   The method for manufacturing a wafer according to any one of claims 4 to 6, wherein the processing of both front and back surfaces of the wafer is performed by any one of double-sided lapping, double-sided grinding, and double-sided polishing.

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