JP5282440B2 - Evaluation wafer and evaluation method of polishing allowance for double-side polishing - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an evaluation wafer for evaluating polishing margins of double-sided polishing, which can check the respective polishing margins on both sides of a wafer in double-sided polishing by a simple method and can reduce an excessive polishing margin due to the difference, and to provide a method of evaluating the polishing margins in double-sided polishing. <P>SOLUTION: The evaluation wafer for evaluating the polishing margins in double-sided polishing has recesses formed on both-sides of the wafer. The evaluation method employs the wafer. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a wafer for evaluation for evaluating a polishing allowance for double-side polishing and a method for evaluating a polishing allowance for double-side polishing using the same.

  When manufacturing a semiconductor wafer, for example, a silicon single crystal ingot is grown by the Czochralski method, this ingot is sliced and processed into a thin disk, and then subjected to various processes such as chamfering, lapping, etching, and polishing. Finished into a mirror-like wafer.

In a silicon wafer polishing process, polishing is usually performed through a plurality of stages from rough polishing to final polishing.
For example, after the lapping step and the etching step, primary polishing is performed with a polishing allowance of about several μm in order to remove distortion on the wafer surface and flatten it. Next, in order to remove scratches and the like generated in the primary polishing and improve the surface roughness, secondary polishing is performed with a polishing margin of about 1 μm. Further, in order to obtain a haze-free surface, finish polishing is performed with a polishing allowance of less than 1 μm.

  In recent years, the diameter of silicon wafers is mainly 300 mm, and the demand for flattening has become increasingly severe. In order to obtain flatness quality and nanotopography quality of such a large diameter wafer, polishing by a double-side polishing apparatus has been generally performed. A double-side polishing apparatus is mainly used for primary polishing, and a single-side polishing apparatus is used for secondary and final polishing (see Patent Document 1).

  As a general double-side polishing apparatus, a so-called 4-way type apparatus using a planetary gear mechanism is known. When polishing a silicon wafer with such a double-side polishing apparatus, the wafer is inserted into a plurality of wafer holding holes formed in the carrier. The wafer is sandwiched and held between the upper surface plate and the lower surface plate.

  While supplying the polishing slurry through the slurry supply hole, the upper surface plate (with the polishing cloth attached) rotates in the clockwise direction, and the lower surface plate (with the polishing cloth attached) rotates in the counterclockwise direction. The carrier rotates and revolves between the sun gear and the internal gear. Thereby, both surfaces of the wafer in each holding hole can be polished simultaneously.

  However, in the case of double-side polishing, there is a problem that the polishing conditions for the front and back surfaces are not always the same due to the influence of gravity or the like, and the polishing allowances for the front and back surfaces are different. Further, even if the total polishing allowance is determined by measuring the thickness of the wafer, the polishing allowance for each of the front and back surfaces cannot be determined. Therefore, the polishing conditions for completely removing the processing distortion due to lapping and etching must be based on the surface with less polishing allowance, and therefore the surface with more polishing allowance is polished more than necessary, and the raw material cost and production It was the cause of sexual deterioration.

JP 09-270401 A

  Therefore, the present invention has been made in view of the above-mentioned problems, and it is possible to investigate the polishing allowance of the front surface and the back surface of the wafer at the time of double-side polishing by a simple method. It is an object of the present invention to provide an evaluation wafer for evaluating a polishing allowance for double-side polishing that can be reduced and a method for evaluating a polishing allowance for double-side polishing.

In order to achieve the above object, the present invention is an evaluation wafer for evaluating the polishing allowance of double-side polishing, wherein concave portions are formed on both front and back surfaces of the wafer. that provides wafer.

  With such an evaluation wafer, since the recesses are formed on both the front and back surfaces of the wafer, it is possible to easily evaluate the polishing allowance for each of both surfaces of the wafer by examining the change in the depth of the recesses before and after polishing. it can. As a result, by adjusting the polishing conditions of the product wafer, it is possible to reduce unnecessary polishing of one surface due to the difference in polishing allowance between the upper surface plate and the lower surface plate, and furthermore, the polishing speed of the surface with less polishing allowance Therefore, the polishing time can be shortened, and the double-side polishing can be performed with high productivity and reduced cost.

In this case, the recess, it is not preferable are those formed by etching.
In this way, if the recess is formed by etching, formation of a desired pattern and accurate adjustment of the depth can be easily performed, so that an evaluation wafer capable of performing more accurate evaluation can be obtained.

In this case, the recess, there is formed in the same pattern on both surfaces of the wafer, it is not preferable to the wafer center and has a rotational symmetry as a symmetric point.
In this way, if the recesses are formed in the same pattern on both the front and back surfaces of the wafer and have rotational symmetry with the wafer center as the symmetry point, the load is evenly distributed within the wafer surface for evaluation during double-side polishing during evaluation. Therefore, since the same polishing as that of the product wafer can be performed, it is possible to obtain an evaluation wafer capable of more accurately evaluating the polishing allowance. In addition, if the recesses are formed in the same pattern on both the front and back sides of the wafer, the area other than the recesses and the pressure applied to the wafer are the same on the back side and the front side. Can be accurately evaluated.

At this time, the area of the recess, it is not preferable that less than half the area of the entire in the wafer plane.
In this way, by setting the area of the recess to less than half of the total area in the wafer surface, the load on the evaluation wafer at the time of double-side polishing can be close to the load on the product wafer at the time of double-side polishing, It can be set as the wafer for evaluation which can investigate polishing cost more correctly.

Further, the present invention is a method for evaluating a polishing allowance of double-side polishing, wherein a wafer for evaluation is formed by forming recesses on both front and back surfaces of the wafer, the evaluation wafer is polished on both sides, and the both surfaces are polished. that provides an evaluation method of polishing stock removal of the double-sided polishing and evaluating the stock removal by polishing the depth of change before and after the recess of the test wafers.

  In this way, by polishing both sides of the evaluation wafer having recesses formed on both the front and back surfaces, the polishing allowance can be evaluated simply by examining the change in the depth of the recesses before and after polishing. The polishing allowance can be accurately evaluated by a simple method.

In this case, the method of forming the concave portion, it is not preferable to form by etching.
In this way, by forming the recesses by etching, the shape and depth of the recesses can be accurately formed by a simple method, and therefore, a highly accurate polishing allowance can be evaluated.

In this case, the recess, the same pattern on both surfaces of the wafer, the wafer center to have the preferable be formed so as to have rotational symmetry as a symmetric point.
In this way, if the recesses are formed in the same pattern on both the front and back surfaces of the wafer and have rotational symmetry with the wafer center as the symmetry point, a uniform load is applied during polishing for evaluation, and the product wafer is polished. Since the same polishing as that at the time can be performed, the polishing allowance can be more accurately evaluated. Further, since the concave portions are formed in the same pattern on both the front and back surfaces of the wafer, the polishing conditions on the front surface and the back surface are the same, and the polishing allowance can be evaluated more accurately.

At this time, the area of the recess, it is not preferable that less than half of the total area of the said wafer surfaces.
Thus, if the area of the recess is made half or less of the entire wafer surface, the load when polishing the product wafer can be approached, so that a more accurate polishing allowance can be evaluated.

Further, the present invention is at least, to evaluate the stock removal by the evaluation method of polishing stock removal of the double-sided polishing of the present invention, that provides a double-sided polishing method characterized by adjusting the polishing conditions of a product wafer.
Thus, by using the polishing allowance evaluation method of the double-side polishing of the present invention, it is possible to accurately evaluate the difference in polishing allowance between the front and back surfaces of the wafer during double-side polishing and the polishing speed. By adjusting the polishing conditions of the product wafer based on the above, it is possible to reduce unnecessary polishing allowance, and furthermore, the polishing speed of the surface with less polishing allowance can be increased, so the polishing time is shortened and the wafer is reduced. Can be polished on both sides with high productivity and low cost.

At this time, the polishing conditions the adjustment, have preferably be a rotational speed of the platen.
In this way, if the polishing conditions to be adjusted are the rotation speed of the surface plate, the polishing allowance on each of the front and back surfaces of the wafer can be changed relatively easily. Can be done easily.

At this time, the polishing conditions the adjustment, it is not preferable that the polishing slurry or replacement cycle of the polishing pad.
As described above, if the polishing condition to be adjusted is a polishing slurry or a cloth replacement cycle, the polishing process can be efficiently maintained and managed by accurately evaluating the polishing allowance by the evaluation method of the present invention. Therefore, both sides can be polished with high productivity.

  As described above, since the evaluation wafer of the present invention has recesses on both the front and back surfaces of the wafer, the polishing allowance can be evaluated by examining the depth change of the recesses before and after polishing, and the rotational speed of the surface plate It is possible to accurately evaluate the polishing allowance for each of the front surface and the back surface of the wafer in accordance with the apparatus conditions such as the above. In this way, according to the present invention, the polishing allowance on both sides of the wafer can be accurately evaluated, and by adjusting the polishing conditions of the product wafer based on this, it is possible to reduce unnecessary polishing on one side. In addition, it is possible to efficiently maintain and manage the polishing process, which enables high-quality double-side polishing with high productivity and low cost.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto.
FIG. 1 is a plan view of both front and back surfaces of an evaluation wafer as an example of an embodiment of the present invention. FIG. 2 is a schematic view of a local etching apparatus.

As shown in FIG. 1, the evaluation wafer W for evaluating the polishing allowance of the double-side polishing of the present invention has recesses 10 formed on both front and back surfaces of the wafer.
The method for producing this evaluation wafer W is not particularly limited. For example, the evaluation wafer is formed by forming recesses on both the front and back surfaces of a wafer produced under the same material and conditions as a product wafer such as a silicon single crystal wafer. Can be produced.

As a method for forming the recess 10, it is preferable to form the recess 10 by etching.
Thus, since the shape and depth can be accurately formed by forming the recess by etching, the polishing allowance can be evaluated with high accuracy by a simple method.
Hereinafter, as a method for forming a recess by etching, for example, a method for forming a recess using a local etching apparatus will be described.

The local etching apparatus shown in FIG. 2 includes a wafer mounting table that can be controlled in rotation, a nozzle 15 that can move in a linear direction for supplying the etching gas 14 to the wafer surface, and an acid mixing container for generating the etching gas 14. It consists of eleven.
First, an acid mixed solution 12 of hydrofluoric acid or nitric acid is placed in an acid mixing container 11, and nitrogen gas 13 is bubbled into the container to generate an etching gas 14. By moving in the direction and rotating the wafer mounting table in the θ direction, recesses with high dimensional accuracy of depth: several μm to several 10 μm and width: several mm to several 100 mm can be formed by etching on the wafer surface.

The recess 10 is preferably formed in the same pattern on both the front and back surfaces of the wafer so as to have rotational symmetry with the wafer center as the symmetry point.
In this way, if the concave portions are formed on both front and back surfaces of the wafer so as to have rotational symmetry with the same pattern as the center of the wafer, the load during polishing for evaluation is uniformly applied on the wafer surface for evaluation. The same polishing as that of the product wafer can be performed, and the polishing allowance can be evaluated more accurately. Further, since the polished area on the front surface and the back surface of the wafer and the pressure applied to the polished surface are the same, the polishing allowance on both surfaces of the wafer can be more accurately evaluated.

  As the pattern shape at this time, for example, as shown in FIG. 1, three fan-shaped concave portions are formed so as to have a rotational symmetry of 120 ° with respect to the center of the wafer (FIG. 1 (a)). Two rectangular recesses can be formed so as to have 90 ° rotational symmetry (FIG. 1B), or concentric recesses can be formed (FIG. 1C). Here, as shown in FIGS. 1A and 1B, if the rotational positions of the front and back patterns are shifted, the load during polishing becomes more uniform. You may form in the same position on both front and back.

Further, it is preferable that the area of the recess 10 is set to be equal to or less than half the entire area in the wafer W plane.
In this way, by reducing the area of the recesses to less than half of the total area in the wafer surface, the load on the evaluation wafer during polishing is comparable to the load on the product wafer, and the polishing allowance is evaluated more accurately. It can be carried out.

In the present invention, the evaluation wafer W manufactured in this way is polished on both sides, and the polishing allowance is evaluated by the change in the depth of the recess 10 before and after the polishing.
With the evaluation wafer of the present invention and the evaluation method of the polishing allowance of double-side polishing, polishing according to the apparatus conditions is possible simply by examining the change in the depth of the recess before and after polishing by polishing both sides of the wafer having recesses on both sides. The bill can be accurately evaluated by a simple method.

  At this time, as the apparatus for performing double-side polishing, the same apparatus as that for polishing a product wafer can be used, and is not particularly limited. For example, a 4-way double-side polishing apparatus shown schematically in FIG. 3 is used. Can be used. FIG. 4 is a schematic plan view showing a planetary gear structure of a 4-way double-side polishing apparatus.

  For example, in the case of using the double-side polishing apparatus 1 shown in FIG. 3, first, the wafer holding hole 3 of the carrier 2 placed on the lower surface plate 9 on which the polishing cloth 6 is attached is formed on the front and back surfaces in advance. A wafer W for evaluation in which the depth of the concave portion is measured is mounted. The number of evaluation wafers W to be mounted is one per minimum batch, preferably one for each carrier 2. Dummy wafers having the same diameter and thickness are mounted in the remaining wafer holding holes 3 on which the evaluation wafers W are set.

  Then, after the upper surface plate 8 having the polishing cloth 6 affixed to the surface is lowered and brought into contact with the evaluation wafer W, the internal gear 5 and the sun gear 4 are driven to rotate and revolve the carrier 2 and supply slurry. The front and back surfaces of the evaluation wafer W are simultaneously polished by rotating the upper and lower surface plates while supplying the polishing slurry from the holes 7. After the polishing is completed, the evaluation wafer W is taken out, the depths of the recesses on the front and back surfaces are measured, and the difference between the measured values before the polishing is determined to determine the polishing allowance on both the front and back surfaces.

  At this time, as a polishing allowance for evaluation, in consideration of removal of processing strain by lapping and etching, which is one of the purposes of double-side polishing, a depth equal to or greater than the depth of the processing strain layer (about 5.5 μm) is polished. It is preferable.

Based on what was evaluated in this way, the polishing conditions of the product wafer can be adjusted to perform double-side polishing.
With the evaluation method of the present invention, the polishing allowance for double-sided polishing can be evaluated for each side of the wafer. Therefore, by adjusting the polishing conditions based on this, the polishing rate for the surface with less polishing allowance can be increased. In addition, useless polishing of one surface due to the difference in polishing allowance between the front surface and the back surface of the wafer can be reduced. In addition, by accurately evaluating the polishing allowance on both sides in advance, when polishing a product wafer, polishing on both sides can be polished under almost equal conditions, reducing unnecessary polishing and further increasing the polishing rate. Therefore, the polishing time is shortened, and high-quality double-side polishing can be performed with high productivity. Thereby, a raw material cost can be reduced and a highly productive wafer can be manufactured.

The polishing conditions to be adjusted are preferably the rotation speed of the surface plate.
In this way, if the polishing allowance is different on the front and back surfaces of the wafer, or if it is necessary to polish more on one surface based on the polishing allowance on both sides of the evaluated wafer, By relatively adjusting the speed rotation of the lower surface plate, it is possible to easily adjust the polishing allowance on the front and back of the wafer and reduce unnecessary polishing, so the cost can be reduced by a simple method. Can do.

Further, as the polishing conditions to be adjusted, it is preferable to use a polishing slurry or a polishing cloth replacement cycle.
With the evaluation method of the present invention, the polishing allowance on both surfaces of the wafer can be easily evaluated. By periodically performing this evaluation, it is possible to evaluate the replacement cycle of the polishing slurry or polishing cloth, and the polishing process. Maintenance and management can be performed efficiently, and high-quality double-side polishing with high productivity can be performed.

  In addition, the polishing conditions to be adjusted are not limited to those described above, and for example, the adjustment can be made by changing the polishing cloth to be attached to the polishing surface plate having the smaller polishing allowance to one having a larger friction coefficient. Is possible.

  EXAMPLES Hereinafter, although an Example demonstrates this invention further in detail, this invention is not limited to this.

(Example)
First, slice a thin 300 mm P-type <100> single crystal silicon ingot (low oxygen, normal resistance: oxygen concentration 10.5 ppma, resistivity 8-10 Ω · cm) pulled up by the Czochralski method A plate-like wafer was obtained. In order to prevent the wafer from cracking and chipping, lapping and etching were performed to flatten the wafer after chamfering the outer edge portion.

  Using the local etching apparatus as shown in FIG. 2, three fan-shaped recesses having a depth of 15 μm and a distance from the wafer center of 20 mm to 145 mm and a central angle of 30 ° are formed on both surfaces of the wafer thus obtained. Thirty evaluation wafers as shown in FIG. 1A were formed by etching. The depth of the recess is an average value of a total of 6 points including 3 points at the center and 3 points at the outer periphery.

A total of three silicon wafers for evaluation were set in the holding holes of the carriers of the double-side polishing apparatus as shown in FIGS. In addition, a total of 12 silicon dummy wafers, each having the same thickness as the evaluation wafer and having no recesses, were set in the remaining holding holes of each carrier, and double-side polishing was performed under the following conditions.
In addition, the polyester nonwoven fabric urethane resin impregnation goods (Asker C hardness 88 degrees) were used for polishing cloth, and the alkaline solution of pH11 containing colloidal silica was used for polishing slurry.

<Polishing conditions (before adjustment)>
Upper surface plate rotation speed (15 rpm), lower surface plate rotation speed (15 rpm)
Wafer polishing pressure by upper and lower surface plates (300 g / cm ² ), slurry supply rate (2 L / min)
Wafer finish thickness (777 μm (target)), polishing rate (0.4 μm / min)

  After polishing 10 batches under the above polishing conditions, the depth of the concave portions on both the front and back surfaces of a total of 30 silicon wafers for evaluation was measured with a capacitance type surface shape measuring instrument (AFS3220 manufactured by ADE). The measurement points were the same 3 points on the center side and 3 points on the outer periphery side as before the polishing, and the average values were as follows.

Surface side: center portion 9.24 μm (polishing allowance 5.73 μm), outer peripheral portion 9.33 μm (polishing allowance 5.67 μm)
Back side: center portion 2.73 μm (polishing allowance 12.27 μm), outer peripheral portion 2.89 μm (polishing allowance 12.11 μm)
From these values, the total polishing amount was 18.00 μm at the center and 17.78 μm at the outer periphery. The time required for polishing was 45 minutes / batch.

From this result, it was found that when polishing was performed under the above polishing conditions, the back surface was polished twice or more compared to the front surface. In order to remove the processing strain, at least 5.5 μm of polishing is required on one side. However, when polishing is performed under the above-described polishing conditions, polishing on the back surface side that is originally not required to be 6 μm or more is performed. It has been done.
Based on this result, the polishing conditions were reviewed so that the polishing allowance on the front and back surfaces of the wafer became uniform, and the upper platen rotation speed was changed, and 10 batches were again polished under the following conditions.

<Polishing conditions (after adjustment)>
Upper surface plate rotation speed (20 rpm), lower surface plate rotation speed (15 rpm)
Wafer polishing pressure by upper and lower surface plates (300 g / cm ² ), slurry supply rate (2 L / min)
Wafer finish thickness (777 μm (target)), polishing rate (0.4 μm / min)

  After polishing 10 batches under the above polishing conditions, the depths of the recesses on both the front and back surfaces of a total of 30 evaluation silicon wafers were measured. The measurement results are as follows.

Surface side: center portion 9.35 μm (polishing allowance 5.65 μm), outer peripheral portion 9.43 μm (polishing allowance 5.57 μm)
Back side: center portion 8.65 μm (polishing allowance 6.35 μm), outer peripheral portion 8.76 μm (polishing allowance 6.24 μm)
From these values, the total polishing amount was 12.00 μm at the center and 11.81 μm at the outer periphery. The time required for polishing was 30 minutes / batch.

  Thus, under the adjusted polishing conditions, the difference in the polishing allowance between the front and back surfaces of the wafer was suppressed to within 1 μm, unnecessary polishing allowance was almost eliminated, and the polishing time was shortened by about 33%.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

It is a top view of the front and back both surfaces of the wafer for evaluation as an example of the embodiment of the present invention. It is the schematic of a local etching apparatus. It is a schematic diagram of a 4-way double-side polishing apparatus. It is a schematic plan view which shows the planetary gear structure of a 4-way double-side polishing apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... 4 way type double-side polish apparatus, 2 ... Carrier, 3 ... Wafer holding hole,
4 ... Sun gear, 5 ... Internal gear, 6 ... Polishing cloth,
7 ... Slurry supply hole, 8 ... Upper platen, 9 ... Lower platen, 10 ... Recessed portion 11 ... Acid mixing container, 12 ... Acid mixed solution, 13 ... Nitrogen gas,
14 ... Etching gas, 15 ... Acid supply nozzle,
W: Wafer for evaluation.

Claims (11)

An evaluation wafer for evaluating the polishing allowance of each of both surfaces of double- side polishing, wherein a recess is formed on both front and back surfaces of the wafer.   The evaluation wafer according to claim 1, wherein the concave portion is formed by etching.   The said recessed part is formed in the same pattern on the front and back both surfaces of the said wafer, Comprising: It has a rotational symmetry with the said wafer center as a symmetry point, The Claim 1 or Claim 2 characterized by the above-mentioned. The evaluation wafer described.   4. The evaluation wafer according to claim 1, wherein an area of the concave portion is not more than half of an entire area in the wafer surface. 5. A method for evaluating grinding allowance of the double-sided polishing, to prepare a test wafers by forming a recess on both sides of the wafer, the test wafers were double-side polishing, both surfaces of the test wafers that have been polished double-sided A polishing allowance evaluation method for double-side polishing, wherein the polishing allowance for each of both surfaces of the wafer is evaluated based on a change in the depth of the recesses before and after polishing.   6. The method for evaluating a polishing allowance for double-side polishing according to claim 5, wherein the method of forming the recess is formed by etching.   The polishing margin for double-side polishing according to claim 5 or 6, wherein the recesses are formed in the same pattern on both front and back surfaces of the wafer so as to have rotational symmetry with the wafer center as a symmetry point. Evaluation method.   The method for evaluating a polishing allowance for double-side polishing according to any one of claims 5 to 7, wherein an area of the concave portion is less than or equal to half of an entire area in the wafer surface.   9. A double-side polishing method comprising: adjusting a polishing condition of a product wafer by evaluating a polishing allowance by at least the polishing allowance evaluation method of double-side polishing according to any one of claims 5 to 8.   The double-side polishing method according to claim 9, wherein the adjusted polishing condition is a rotational speed of a surface plate.   The double-side polishing method according to claim 9 or 10, wherein the adjusted polishing condition is a polishing slurry or a polishing cloth exchange cycle.

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