CN109039337A - Gradual approaching A/D converter based on preemphasis - Google Patents
Gradual approaching A/D converter based on preemphasis Download PDFInfo
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- CN109039337A CN109039337A CN201810768140.1A CN201810768140A CN109039337A CN 109039337 A CN109039337 A CN 109039337A CN 201810768140 A CN201810768140 A CN 201810768140A CN 109039337 A CN109039337 A CN 109039337A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
Abstract
The present invention provides a kind of gradual approaching A/D converter based on preemphasis, it include: capacitive digital analog converter, one input end connects sampled signal, its another input terminal connects reference voltage, according to the reference voltage output conversion voltage of each capacitance switch connection different potentials in control signal control capacitor array；Comparator, one input end connection conversion voltage, another input end grounding, for comparing sampled signal and conversion voltage output comparison signal；Digital logic unit, input terminal are separately connected comparison signal and clock signal, and output end gradually outputs digital signal；Preemphasis circuit, input terminal connect digital logic unit, and output end connects capacitive AD conversion unit, and the high fdrequency component for improving digital signal exports the control signal through preemphasis.By increasing preemphasis circuit, the settling time of capacitive digital analog converter is shortened, in the case where not sacrificing the linearity, its conversion speed is improved with lower hardware consumption and power consumption.
Description
Technical field
The present invention relates to technical field of integrated circuits, turn more particularly to a kind of successive approximation modulus based on preemphasis
Parallel operation.
Background technique
The settling time of existing gradual approaching A/D converter, capacitive digital analog converter (CDAC) constrains its turn
Throw-over degree.As shown in Figure 1, being traditional successive approximation (SAR) analog-digital converter (ADC), it includes comparator, a numbers
Logic and CDAC.As shown in Fig. 2, being the time diagram of traditional gradual approaching A/D converter, comparator work output
After comparison result, comparison result is transferred to digital circuit, digital circuit provides correct control signal and controls capacitive digital-to-analogue turn
Parallel operation CDAC, after capacitive digital analog converter CDAC completes to establish, comparator starts next task.It is analyzed according to above,
The maximum conversion speed of traditional SAR ADC is directly by the comparison time of comparator, the delay of Digital Logic and building for CDAC
It is restricted between immediately.For one N traditional SAR ADC, shown in total conversion time such as formula (1):
In formula (1), tconvThe total conversion time of phase, t are kept for SAR ADCcomp.iRatio when working for comparator i-th
Compared with time, tlogicFor the inherent delay of logic, tDACFor the settling time of CDAC.
The settling time t of capacitive digital analog converter CDACDACIt is every by conversion accuracy, the CDAC time established and CDAC
The voltage amplitude of secondary conversion codetermines, it is necessary to meet the requirement of formula (3).
tDAC≥ln(2)·τ·(N-i) (3)
Wherein in formula (2) and formula (3), VeError, V are established for what CDAC allowedrefFor reference voltage,For i-th
The voltage amplitude of CDAC conversion, τ are the RC time constant of CDAC, and i is to represent i-th conversion, and N is the conversion accuracy of SAR ADC,For least significant bit.
But with the promotion of conversion speed, gradual approaching A/D converter must compress the settling time of CDAC, therefore
The problem of establishing of CDAC becomes the technical bottleneck for improving existing gradual approaching A/D converter speed.Currently, common solution
Certainly method is to reduce timeconstantτ and using redundancy, wherein reduce time constant be with sacrifice the SAR ADC linearity or
Person increases hardware consumption and power consumption is cost；Using redundancy to increase conversion times as cost, need in conversion speed, firmly
Part consumption and tDACBetween compromise.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of gradually forcing based on preemphasis
Plesiotype analog-digital converter, for solve in the prior art gradual approaching A/D converter because its capacitive digital analog converter is established
Overlong time, the problem for causing analog-digital converter conversion speed not high.
In order to achieve the above objects and other related objects, the present invention provides a kind of successive approximation modulus based on preemphasis
Converter, comprising:
Capacitive digital analog converter, one input end connect sampled signal, and another input terminal connects reference voltage, is used for
According to the reference voltage of the on state connection different potentials of each capacitance switch in control signal control capacitor array, base is exported
In the conversion voltage of the sampled signal；
Comparator, one input end connect the conversion voltage, and another input end grounding is believed for the sampling
Number conversion voltage between size export comparison signal；
Digital logic unit, input terminal are separately connected the comparison signal and clock signal, and output end is gradually output
Digital signal；
Preemphasis circuit, input terminal connect the digital logic unit, and output end connects the capacitive modulus and turns
Unit is changed, the high fdrequency component for improving the digital signal exports the control signal through preemphasis to the capacitive modulus and turns
Change unit.
As described above, the gradual approaching A/D converter of the invention based on preemphasis, has the advantages that
By increasing preemphasis circuit in traditional gradual approaching A/D converter, capacitive digital-to-analogue conversion is shortened
The settling time of device, to improve Approach by inchmeal in the case where not sacrificing the linearity with lower hardware consumption and power consumption
The speed of type analog-to-digital converter.In addition, preemphasis mode is transplanted in existing gradual approaching A/D converter, to promoting it
Performance has larger help.
Detailed description of the invention
Fig. 1 is shown as a kind of conventional successive provided by the invention and approaches type analog-to-digital converter torus principle figure；
Fig. 2 is shown as the whole timing diagram that a kind of conventional successive provided by the invention approaches type analog-to-digital converter；
Fig. 3 is shown as a kind of original signal schematic diagram using pre-emphasis technique provided by the invention；
Fig. 4 is shown as a kind of gradual approaching A/D converter structural schematic diagram based on preemphasis provided by the invention；
When Fig. 5 is shown as the gradual approaching A/D converter entirety that a kind of pre-emphasis magnitude provided by the invention is A/2
Sequence figure；
Fig. 6 is shown as the preemphasis logic diagram that a kind of pre-emphasis magnitude provided by the invention is A/2；
When Fig. 7 is shown as the gradual approaching A/D converter entirety that a kind of pre-emphasis magnitude provided by the invention is A/4
Sequence figure；
Fig. 8 is shown as the preemphasis logic diagram that a kind of pre-emphasis magnitude provided by the invention is A/4；
Fig. 9 is shown as a kind of capacitive digital analog converter settling time comparison diagram using preemphasis provided by the invention.
Component label instructions:
1 capacitive digital analog converter
2 comparators
3 digital logic units
4 preemphasis circuits
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.It should be noted that in the absence of conflict, following embodiment and implementation
Feature in example can be combined with each other.
It should be noted that illustrating the basic structure that only the invention is illustrated in a schematic way provided in following embodiment
Think, only shown in schema then with related component in the present invention rather than component count, shape and size when according to actual implementation
Draw, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its assembly layout kenel
It is likely more complexity.
Referring to Fig. 4, being a kind of gradual approaching A/D converter structural representation based on preemphasis provided by the invention
Figure, comprising:
Capacitive digital analog converter 1, one input end connect sampled signal, and another input terminal connects reference voltage, use
In the reference voltage according to the on state connection different potentials of each capacitance switch in control signal control capacitor array, output
Conversion voltage based on the sampled signal；
Specifically, the capacitive digital analog converter includes capacitor array, and the capacitor in the capacitor array is according to from height
It is arranged successively to low, the upper step of each capacitor connects clock signal using sampling switch, and the lower step of the capacitor connects control
System switch is connected to different potentials according to step under the control signal communication, converts voltage extremely by the upper step output of capacitor
The input terminal of the comparator.
Wherein, in capacitor array by setting gradually MSB (most significant bit number) from left to right to LSB (least significant bit
Number), the upper step of all capacitors passes through sampling switch Vi connection clock pulse signal, and lower step is corresponding using control switch
Connect reference voltage (+1/2Vref、-1/2Vref, 0), the closure of control switch is by the control signal Bi that handles through preemphasis circuit
(N of i=1,2,3 ...) is determined, when the control signal of the control switch of some corresponding capacitor is high level, control switch connects
Positive reference voltage is connect, on the contrary, then control switch is grounded.
Comparator 2, one input end connect the conversion voltage, and another input end grounding is used for the sampling
Size exports comparison signal between signal and conversion voltage；
Digital logic unit 3, input terminal are separately connected the comparison signal and clock signal, and output end is gradually output
Digital signal；
Preemphasis circuit 4, input terminal connect the digital logic unit, and output end connects the capacitive modulus and turns
Unit is changed, the high fdrequency component for improving the digital signal exports the control signal through preemphasis to the capacitive modulus and turns
Change unit.
For traditional SAR ADC, comparator 2 exports result after digital logic unit 3 (digital circuit) processing, will be electric
It holds pole plate and is connected to different current potentials.Therefore the output voltage V of CDACDACIt is equivalent to response of the first-order system to step signal.Root
According to the required precision of traditional SAR ADC, the settling time of CDAC needs to meet: tDAC≥ln(2)·τ·(N-i).Therefore, for
High-speed applications scene needs to introduce new technology and breaks original technology bottleneck.
It need to be met such as in the gradual approaching A/D converter using the capacitive digital analog converter after preemphasis circuit
Lower relationship:
In formula (4), A indicates step amplitude, and a is pre-emphasis magnitude, and Δ is preemphasis time, tDACTurn for capacitive digital-to-analogue
The settling time of parallel operation, τ are the RC time constant of capacitive digital analog converter, and LSB is least significant bit.Wherein, the pre-add
Weight circuit adjusts pre-emphasis magnitude, a A/2, A/4, A/8 ... 1/ according to gradual approaching A/D converter binary search principle
2iA, i non-zero natural number are directed to the gradual approaching A/D converter of nonbinary search, and other possibilities exist by a.
The preemphasis circuit includes multiple and door, multiple or door and multiple edge detection devices, the edge detection device
It is generated when rising edge for detection input and output pulse signal；Wherein, the edge detection device include variable delay,
Phase inverter and with door, the variable delay output end connects the inverter input, the inverter output connection
An input terminal with door, another input terminal is connected with the input terminal of the variable delay detects rising edge, it is described and
Gate output terminal output pulse signal；The edge detection device pulse width is configured using variable delay.
Specifically, the preemphasis circuit is according to pre-emphasis magnitude difference, modification or adjusting circuit, using different number
Variable delay and/or door, i.e. pre-emphasis magnitude often successively decrease circuit of the half then relative to a upper amplitude, successively reduce one
Edge detection device and/or door, to configure preemphasis time Δ.
Referring to figure 5., whole for a kind of gradual approaching A/D converter that pre-emphasis magnitude is A/2 provided by the invention
Timing diagram, Fig. 6 are shown as the preemphasis logic diagram that a kind of pre-emphasis magnitude provided by the invention is A/2, and details are as follows:
When using pre-emphasis magnitude for A/2, the preemphasis circuit include first with door, second with door, third and door,
4th with door, the first variable delay, the second variable delay, third variable delay, first or door, second or door and the
Three or door, described first is connected respectively to that first phase is mobile to be believed with an input terminal of door and the input terminal of the first variable delay
Number, described first connect the first digital signal with another input terminal of door, and output end exports first control signal；Described first
The output end connection first of variable delay or an input terminal of door, described first or another input terminal and second of door variable prolong
When device input terminal be separately connected second phase movable signal；Described first or door output end connection second and an input of door
End, another input terminal connect the second digital signal, and output end exports second control signal；Second variable delay
The input terminal of one input terminal of output end connection second or door, another input terminal and third variable delay is separately connected third
Phase shift signal, described second or the output end of door connect an input terminal of the third and door, another input terminal connection
Third digital signal, output end export third and control signal；The output end connection third or door of the third variable delay
An input terminal, the other end is connected to the 4th phase shift signal；Described 4th is separately connected the with two input terminals of door
Three or door output end, the 4th digital signal, output end output the 4th control signal.
In the present embodiment, after comparator exports the first digital signal of result D1, first phase movable signal CK1 is by low
Level becomes high level, and first control signal B1 and second control signal B2 are set to the first digital signal D1 by preemphasis circuit,
Control MSB and (MSB-1) capacitor bottom crown are connected to different potentials, i.e., the capacitor bottom crown that control weight is 8C and 4C is connected to difference
Current potential.After preemphasis time Δ, second control signal B2 is reset, i.e., recovery weight is step current potential under 2C capacitor.To
Comparator exports the second digital signal of result D2 next time after, second phase movable signal CK2 becomes high level from low level, in advance
Second control signal B2 is set to the second digital signal D2 again by emphasizer.The first number is set in second control signal B2
During the Δ of signal D1, that is, realize the effect of preemphasis.Corresponding VDACSimilar Fig. 3 (b) is established, and is reached and is reduced CDAC
The purpose of settling time.For the different situation of a value, circuit can be modified, carries out different pre-emphasis magnitude configurations.
Referring to FIG. 7, whole for a kind of gradual approaching A/D converter that pre-emphasis magnitude is A/4 provided by the invention
Timing diagram, Fig. 8 are shown as the preemphasis logic diagram that a kind of pre-emphasis magnitude provided by the invention is A/4, and details are as follows:
For when using pre-emphasis magnitude for A/4, the preemphasis circuit include first with door, second with door, third with
Door, the 4th with door, the first variable delay, the second variable delay, first or door and second or door, described first with door
The input terminal of one input terminal and the first variable delay is connected respectively to first phase movable signal, and described first is another with door
Input terminal connects the first digital signal, and output end exports first control signal；The output end of first variable delay connects
Connect an input terminal of first or door, described first or another input terminal of door connect third phase movable signal, described first or
Output end connection second and an input terminal of door for door, another input terminal connect third digital signal, output end output the
Three control signals；Described second connect the second digital signal with one input terminal of door, described second with another input terminal of door and the
The input terminal of two variable delays is separately connected second phase movable signal, described second with the second control of output end output of door
Signal；Described second or two input terminals of door be separately connected the input terminal of the second variable delay, the 4th phase shift signal,
Described 4th is separately connected output end, the 4th digital signal of second or door with two input terminals of door, output end output the
Four control signals.
In the present embodiment, after comparator exports the first digital signal of result D1, first phase movable signal CK1 is by low
Level becomes high level, and first control signal B1 and third control signal B3 are set to the first digital signal D1 and worked as by preemphasis circuit
Preceding level, control MSB and (MSB-2) capacitor bottom crown are connected to different potentials, that is, control the capacitor bottom crown that weight is 8C and 2C
It is connected to different potentials.After preemphasis time Δ, third control signal B3 is reset, i.e., recovery weight is step under C capacitor
Current potential.Equally, according to design requirement, circuit can be modified or be adjusted, configures preemphasis time Δ.
To sum up, different for pre-emphasis magnitude a value, circuit can be modified, different pre-emphasis magnitude configurations are carried out, is configured
The pulse width of edge detection device, by formula (3) it is found that CDAC longest the time required to the initially foundation of switching device several times,
Therefore optionally only to MSBSFoundation carry out preemphasis, thus reach promoted overall conversion speed the case where, meanwhile, with
This mode, which carries out preemphasis also, can reduce the hardware consumption of preemphasis circuit.
Using in the present embodiment, on the basis of original signal, in 10 SAR ADC by CDAC when establishing
Between, the simulation result comparison diagram established using pre-emphasis technique with the CDAC without using pre-emphasis technique is detailed in Fig. 9, wherein adopt
It is reduced by about 65% relative to the settling time of unused pre-emphasis technique with the settling time of pre-emphasis technique CDAC, improves ADC
Conversion speed about 23%.
In conclusion the present invention is shortened by increasing preemphasis circuit in traditional gradual approaching A/D converter
Settling time of capacitive digital analog converter, thus in the case where not sacrificing the linearity, with lower hardware consumption and function
Consumption, improves the speed of gradual approaching A/D converter.In addition, preemphasis mode is transplanted to existing successive approximation modulus
In converter, there is larger help to its performance is promoted.So the present invention effectively overcomes various shortcoming in the prior art and has
High industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (10)
1. a kind of gradual approaching A/D converter based on preemphasis characterized by comprising
Capacitive digital analog converter, one input end connect sampled signal, and another input terminal connects reference voltage, are used for basis
The reference voltage of the on state connection different potentials of each capacitance switch in signal control capacitor array is controlled, output is based on institute
State the conversion voltage of sampled signal；
Comparator, one input end connect the conversion voltage, another input end grounding, for the sampled signal with
It converts size between voltage and exports comparison signal；
Digital logic unit, input terminal are separately connected the comparison signal and clock signal, and output end gradually outputs number
Signal；
Preemphasis circuit, input terminal connect the digital logic unit, and output end connects the capacitive analog-to-digital conversion list
Member for improving the high fdrequency component of the digital signal, and exports the control signal through preemphasis to the capacitive modulus and turns
Change unit.
2. the gradual approaching A/D converter according to claim 1 based on preemphasis, which is characterized in that it is described gradually
Following relationship need to be met using the capacitive digital analog converter after preemphasis circuit by approaching in type analog-to-digital converter:
In formula, A is step amplitude, and a is pre-emphasis magnitude, and Δ is preemphasis time, tDACFor the foundation of capacitive digital analog converter
Time, τ are the RC time constant of capacitive digital analog converter, and LSB is least significant bit.
3. the gradual approaching A/D converter according to claim 1 or 2 based on preemphasis, which is characterized in that described
Preemphasis circuit adjusts pre-emphasis magnitude according to gradual approaching A/D converter binary search principle.
4. the gradual approaching A/D converter according to claim 1 based on preemphasis, which is characterized in that the pre-add
Weight circuit includes multiple and door, multiple or door and multiple edge detection devices, and the edge detection device is for detection input
Generation and output pulse signal when rising edge.
5. the gradual approaching A/D converter according to claim 4 based on preemphasis, which is characterized in that the pre-add
Weight circuit adjusts edge detection device, the quantity with door and/or door according to pre-emphasis magnitude difference is corresponding.
6. the gradual approaching A/D converter according to claim 4 based on preemphasis, which is characterized in that the edge
Detector include variable delay, phase inverter and with door, the variable delay output end connects the inverter input,
The inverter output connection input terminal with door, the input terminal phase of another input terminal and the variable delay
Even detection rising edge, described and gate output terminal output pulse signal.
7. the gradual approaching A/D converter according to claim 5 based on preemphasis, which is characterized in that using variable
Delayer configures the edge detection device pulse width.
8. the gradual approaching A/D converter according to claim 4 based on preemphasis, which is characterized in that when using pre-
When exacerbation amplitude is A/2, the preemphasis circuit include first with door, second with door, third and door, the 4th with door, first can
Change delayer, the second variable delay, third variable delay, first or door, second or door and third or door, described first
First phase movable signal is connected respectively to an input terminal of door and the input terminal of the first variable delay, described first and door
Another input terminal connect the first digital signal, output end export first control signal；First variable delay it is defeated
One input terminal of outlet connection first or door, described first or door another input terminal and the second variable delay input terminal point
It Lian Jie not second phase movable signal；Described first or door output end connection second and an input terminal of door, another input
The second digital signal of end connection, output end export second control signal；The output end connection the of second variable delay
Two or door an input terminal, the input terminal of another input terminal and third variable delay is separately connected that third phase is mobile to be believed
Number, described second or the output end of door connect an input terminal of the third and door, another input terminal connection third number letter
Number, output end exports third and controls signal；The output end connection third of the third variable delay or an input terminal of door,
Its other end is connected to the 4th phase shift signal；Described 4th is separately connected the output of third or door with two input terminals of door
End, the 4th digital signal, the 4th control signal of output end output.
9. the gradual approaching A/D converter according to claim 1 based on preemphasis, which is characterized in that when using pre-
When exacerbation amplitude is A/4, the preemphasis circuit include first with door, second with door, third and door, the 4th with door, first can
Become delayer, the second variable delay, first or door and second or door, described first is variable with an input terminal of door and first
The input terminal of delayer is connected respectively to first phase movable signal, and described first connect the first number with another input terminal of door
Signal, output end export first control signal；The output end connection first of first variable delay or an input of door
End, described first or door another input terminal connect third phase movable signal, described first or door output end connection second
With an input terminal of door, another input terminal connects third digital signal, and output end exports third and controls signal；Described second
Connect the second digital signal with one input terminal of door, described second with another input terminal of door and the input terminal of the second variable delay
It is separately connected second phase movable signal, described second exports second control signal with the output end of door；Described second or door
Two input terminals are separately connected the input terminal of the second variable delay, the 4th phase shift signal, the described 4th with two of door
Input terminal is separately connected output end, the 4th digital signal of second or door, the 4th control signal of output end output.
10. the gradual approaching A/D converter according to claim 1 based on preemphasis, which is characterized in that the electricity
Appearance type digital analog converter includes capacitor array, and the capacitor in the capacitor array is arranged successively according to from high to low, each capacitor
Upper step using sampling switch connect clock signal, the capacitor lower step connection control switch according to the control signal
It is connected to lower step and is connected to different potentials, the input terminal of voltage to the comparator is converted by the upper step output of capacitor.
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| CN110708072A (en) * | 2019-10-29 | 2020-01-17 | 湖南国科微电子股份有限公司 | Analog-to-digital conversion device and conversion method |
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