CN109039323A - A kind of input control circuit interlocking realization circuit - Google Patents
A kind of input control circuit interlocking realization circuit Download PDFInfo
- Publication number
- CN109039323A CN109039323A CN201710686136.6A CN201710686136A CN109039323A CN 109039323 A CN109039323 A CN 109039323A CN 201710686136 A CN201710686136 A CN 201710686136A CN 109039323 A CN109039323 A CN 109039323A
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- pins
- logic chip
- resistance
- pin
- input
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- 239000013641 positive control Substances 0.000 abstract description 4
- 230000005611 electricity Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 230000000750 progressive effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/08—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors
- H02H7/097—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for dynamo-electric motors against wrong direction of rotation
Abstract
It is interlocked the invention discloses a kind of input control circuit and realizes circuit, including first interface pin and second interface pin, the first interface pin is connected respectively to 2 pins, 2 pins of amplifier U2A and 6 pins of logic chip U2B of logic chip U1A after resistance R4 and resistance R27 partial pressure;The second interface pin is connected separately with 1 pin, 1 pin of logic chip U2A and 5 pins of logic chip U1B of logic chip U1A after resistance R2 and resistance R26 partial pressure.Circuit is realized in the interlocking of this input control circuit, positive control input signal and Reverse Turning Control input signal can be actually used while being inputted, it is not turned on, it avoids the occurrence of and simultaneously turns on, in the case where external interlock control device is not added, realizes that input control circuit interlocks control function, can satisfy working conditions of motor, it is worked normally under high-temperature, high humidity, low cost.
Description
Technical field
The present invention relates to crane motor control technology fields, in particular to a kind of to control semiconductor for motor positive and inverse
It switchs the interlocking of input control circuit and realizes circuit.
Background technique
With being constantly progressive for motor control industry, electric machine controller is continued to develop.The electricity such as contactor currently on the market
Machine controller does not have interlock function, and part realizes that interlock function is also to increase interlocking control device by outside to realize, this
Interlock method is implemented to have certain limitations in the field of equipment.
With being constantly progressive for motor control industry, motor control is positive intelligent, can communicate continuous development.In order to protect
The operational safety of crane system, it is to be ensured that the controller operation that control electric appliance uses in crane is extremely reliable, this is just needed
There is electric interlock (interlocking) inside controller.
Control electric appliance currently on the market is mostly tradition machinery electric appliance, does not have interlock function, and interlock function is realized in part
And realize that using has the controller of contact or intermediate relay defeated as signal by the external interlocking control device that increases
Enter control point, due to using mechanical structure, will appear mechanical stuck, the failures such as contact adhesion, to cause in practical applications
The case where forward and reverse signal inputs simultaneously, brings security risk to crane.This interlock method is implemented in the field of equipment
Certain restrictions avoids the occurrence of forward and reverse while output electricity so needing to design one kind when controlling signal while inputting
Road prevents the risks such as major loop phase fault.
Summary of the invention
It is interlocked the purpose of the present invention is to provide a kind of input control circuit and realizes circuit, had and external interlock control is being not added
In the case where device processed, realizes that input control circuit interlocks control function, can satisfy working conditions of motor, high-temperature, high humidity
It is worked normally under the conditions of degree, inexpensive advantage, to solve the problems mentioned in the above background technology.
To achieve the above object, the invention provides the following technical scheme: circuit, packet are realized in a kind of interlocking of input control circuit
First interface pin and second interface pin are included, the first interface pin connects respectively after resistance R4 and resistance R27 partial pressure
It is connected to 6 pins of 2 pins of logic chip U1A, 2 pins of amplifier U2A and logic chip U2B;The second interface pin
It is connected separately with 1 pin of logic chip U1A, 1 pin of logic chip U2A after resistance R2 and resistance R26 partial pressure and patrols
Collect 5 pins of chip U1B;3 pins of the logic chip U1A are connected with 6 pins of logic chip U1B, logic chip U1B's
4 pins are connected with 8 pins of logic chip U1C;3 pins of the logic chip U2A are connected with the 5 of logic chip U2B and draw
Foot, 4 pins of logic chip U2B are connected with 8 pins of logic chip U2C, 9 pins of logic chip U1C and logic chip U2C
10 pins for being all connected with voltage source VDD, amplifier U1C and amplifier U2C are respectively connected with output interface.
As a further solution of the present invention: the resistance R2 connects with resistance R26, and resistance R4 connects with resistance R27.
As a further solution of the present invention: the resistance R26 and resistance R27 connects and resistance R26 and resistance R27 connect
Ground.
Compared with prior art, the invention has the advantages that:
The interlocking of this input control circuit realizes that circuit, first interface pin are reversed input control signal, and second interface is drawn
Foot is positive input control signal, can actually use positive control input signal and Reverse Turning Control input signal while input, no
Conducting, avoids the occurrence of and simultaneously turns on, and the risk of major loop short trouble occurs, the case where external interlock control device is not added
Under, it realizes that input control circuit interlocks control function, can satisfy working conditions of motor, it is normal under high-temperature, high humidity
Work, and low cost.
Detailed description of the invention
Fig. 1 is circuit connection diagram of the invention;
Fig. 2 is chip characteristics truth table of the invention.
In figure: 1- first interface pin;2- second interface pin;101- output interface.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Referring to FIG. 1-2, in the embodiment of the present invention, a kind of input control circuit interlocking realization circuit, including first interface
Pin 1 and second interface pin 2, first interface pin 1 are connected separately with logic chip after resistance R4 and resistance R27 partial pressure
6 pins of 2 pins of U1A, 2 pins of logic chip U2A and logic chip U2B;Second interface pin 2 by resistance R2 and
1 pin of logic chip U1A2,1 pin of logic chip U2A and logic chip U1B are connected separately with after resistance R26 partial pressure
5 pins;3 pins of logic chip U1A are connected with 6 pins of logic chip U1B, and 4 pins of logic chip U1B are connected with logic
8 pins of chip U1C;3 pins of logic chip U2A are connected with 5 pins of logic chip U2B, 4 pins of logic chip U2B
It is connected with 8 pins of logic chip U2C, 9 pins of logic chip U1C and logic chip U2C are respectively connected with power supply 9, logic core
10 pins of piece U1C and logic chip U2C are respectively connected with output interface 10, and resistance R2 connects with resistance R26, resistance R4 and resistance
R27 connects, and resistance R26 and resistance R27 parallel connection and resistance R26 and resistance R27 ground connection, 2 input signal of second interface pin pass through
R2, R26 electric resistance partial pressure are input to 1 pin of logic chip U1A and 1 pin of logic chip U2A;First interface pin 1 is defeated
Enter signal, by R4, R27 electric resistance partial pressure, is input to 2 pins of logic chip U1A and 2 pins of logic chip U2A.
Working principle: first interface pin 1 is reversed input control signal, and second interface pin 2 is positive input control
When signal, first interface pin 1 and second interface pin 2 input different level signals, four kinds of situations, the first feelings can be generated
Condition: when second interface pin 2 is high level signal (having input signal), first interface pin 1 is that low level signal (does not input
Signal) when, 1 pin of logic chip U1A is high level, and 2 pins of logic chip U1A are low level;The 3 of logic chip U1A
Pin exports high level, is input to 6 pins of logic chip U1B;5 pins of logic chip U1B are high electricity as 1 pin
Flat, the 4 pins output of logic chip U1B is low level, is input to 8 pins of logic chip U1C;9 pins of logic chip U1C
Access voltage source VDD;10 pins and output interface 10 output of logic chip U1C is high level, and drive control circuit behavior is patrolled
1 pin for collecting chip U2A is high level, and 2 pins of logic chip U2A are low level;3 pins of logic chip U2A export high
Level is input to 5 pins of logic chip U2B;6 pins of logic chip U2B are low level, logic core as 2 pins
4 pins of piece U2B export high level, are input to 8 pins of logic chip U2C;9 pins of logic chip U2C access power supply 9,
10 pins and output interface 10 output of logic chip U2C is low level, not drive control circuit behavior.
Second situation: when second interface pin 2 is low level signal (not having input signal), first interface pin 1 is
When high level signal (having input signal), 1 pin of logic chip U1A is low level, and 2 pins of logic chip U1A are high electricity
It is flat;3 pins of logic chip U1A export high level, are input to 6 pins of logic chip U1B;5 pins of logic chip U1B with
1 pin is the same, is low level, and the 4 pins output of logic chip U1B is high level, is input to 8 pins of logic chip U1C;It patrols
9 pins for collecting chip U1C access voltage source VDD, and 10 pins and output interface 10 output of logic chip U1C is low level, no
Drive control circuit behavior;1 pin of logic chip U2A is low level, and 2 pins of logic chip U2A are high level;Logic
3 pins of chip U2A export high level, are input to 5 pins of logic chip U2B;6 pins and 2 pins of logic chip U2B
It equally, is high level, the 4 pins output of logic chip U2B is low level, is input to 8 pins of logic chip U2C;Logic core
9 pins of piece U2C access voltage source VDD, and the 10 of logic chip U2C are high level with the output of output interface 10, and drive control is returned
Road movement.
The third situation: when second interface pin 2 is low level signal (not having input signal), first interface pin 1 is
When low level signal (not having input signal), 1 pin of logic chip U1A is low level, and 2 pins of logic chip U1A are low
Level;3 pins of logic chip U1A export high level, are input to 6 pins of logic chip U1B;5 pins of logic chip U1B
It is low level as 1 pin, 4 pins of logic chip U1B export high level, are input to 8 pins of logic chip U1C;It patrols
9 pins for collecting chip U1C access voltage source VDD, and 10 pins and output interface 10 output of logic chip U1C is low level, no
Drive control circuit behavior;1 pin of logic chip U2A is low level, and 2 pins of logic chip U2A are low level;Logic
3 pins of chip U2A export high level, are input to 5 pins of logic chip U2B;6 pins and 2 pins of logic chip U2B
It equally, is low level, 4 pins of logic chip U2B export high level, are input to 8 pins of logic chip U2C;Logic chip
9 pins of U2C access power supply 9, and the 10 of logic chip U2C are low level with the output of output interface 10, and drive control circuit is not dynamic
Make.
4th kind of situation: when second interface pin 2 is high level signal (having input signal), first interface pin 1 is height
When level signal (having input signal), 1 pin of logic chip U1A is high level, and 2 pins of logic chip U1A are high level;
3 pins of logic chip U1A export low level, are input to 6 pins of logic chip U1B;5 pins of logic chip U1B draw with 1
Foot is the same, is high level, and 4 pins of logic chip U1B export high level, are input to 8 pins of logic chip U1C;Logic core
9 pins of piece U1C access voltage source VDD, and 10 pins and output interface 10 output of logic chip U1C is low level, do not drive
Control loop movement;1 pin of logic chip U2A is high level, and 2 pins of logic chip U2A are high level;Logic chip
The 3 pins output of U2A is low level, is input to 5 pins of logic chip U2B;6 pins of logic chip U2B and 2 pins one
Sample, is high level, and 4 pins of logic chip U2B export high level, are input to 8 pins of logic chip U2C;Logic chip
9 pins of U2C access voltage source VDD, and the 10 of logic chip U2C are low level with the output of output interface 10, and drive control is not returned
Road movement can actually use positive control input signal and Reverse Turning Control input signal while input, be not turned on, avoid the occurrence of same
When be connected, occur major loop short-circuit fault risk, in the case where external interlock control device is not added, realize input control circuit
Control function is interlocked, working conditions of motor is can satisfy, is worked normally under high-temperature, high humidity, and low cost.
In summary;The interlocking of this input control circuit realizes that circuit, first interface pin 1 are reversed input control signal,
Second interface pin 2 is positive input control signal, can actually use positive control input signal and Reverse Turning Control input signal
It inputs, is not turned on simultaneously, avoid the occurrence of and simultaneously turn on, major loop short-circuit fault risk occurs, external interlock control dress is being not added
In the case where setting, realizes that input control circuit interlocks control function, can satisfy working conditions of motor, high-temperature, high humility item
It is worked normally under part, and low cost.
It is obvious to a person skilled in the art that invention is not limited to the details of the above exemplary embodiments, Er Qie
In the case where without departing substantially from spirit or essential attributes of the invention, the present invention can be realized in other specific forms.Therefore, no matter
From the point of view of which point, the present embodiments are to be considered as illustrative and not restrictive, and the scope of the present invention is by appended power
Benefit requires rather than above description limits, it is intended that all by what is fallen within the meaning and scope of the equivalent elements of the claims
Variation is included within the present invention.Any reference signs in the claims should not be construed as limiting the involved claims.
In addition, it should be understood that although this specification is described in terms of embodiments, but not each embodiment is only wrapped
Containing an independent technical solution, this description of the specification is merely for the sake of clarity, and those skilled in the art should
It considers the specification as a whole, the technical solutions in the various embodiments may also be suitably combined, forms those skilled in the art
The other embodiments being understood that.
Claims (3)
1. circuit, including first interface pin (1) and second interface pin (2) are realized in a kind of input control circuit interlocking, described
First interface pin (1) is connected respectively to 2 pins, the amplifier of logic chip U1A after resistance R4 and resistance R27 partial pressure
2 pins of U2A and 6 pins of logic chip U2B;The second interface pin (2) is divided after resistance R2 and resistance R26 partial pressure
It is not connected with 5 pins of 1 pin of logic chip U1A, 1 pin of logic chip U2A and logic chip U1B;The logic core
3 pins of piece U1A are connected with 6 pins of logic chip U1B, and 4 pins of logic chip U1B are connected with the 8 of logic chip U1C and draw
Foot;3 pins of the logic chip U2A are connected with 5 pins of logic chip U2B, and 4 pins of logic chip U2B, which are connected with, patrols
9 pins of 8 pins of volume chip U2C, logic chip U1C and logic chip U2C are all connected with voltage source VDD, amplifier U1C and put
10 pins of big device U2C are respectively connected with output interface (101).
2. circuit is realized in a kind of input control circuit interlocking according to claim 1, it is characterised in that: the resistance R2 with
Resistance R26 is in parallel, and resistance R4 is in parallel with resistance R27.
3. circuit is realized in a kind of input control circuit interlocking according to claim 1, it is characterised in that: the resistance R26
With resistance R27 series connection and resistance R26 and resistance R27 ground connection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710686136.6A CN109039323B (en) | 2017-08-11 | Input control loop interlocking realization circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710686136.6A CN109039323B (en) | 2017-08-11 | Input control loop interlocking realization circuit |
Publications (2)
Publication Number | Publication Date |
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CN109039323A true CN109039323A (en) | 2018-12-18 |
CN109039323B CN109039323B (en) | 2024-04-26 |
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CN109814446A (en) * | 2019-01-14 | 2019-05-28 | 武汉盛硕电子有限公司 | A kind of control device, a kind of mixer truck |
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