Summary of the invention
The object of the present invention is to provide one when power drive system breaks down, charge circuit can be cut off in time, realize the electric drive system for electric vehicles initiatively short-circuit protection circuit to the protection of electrokinetic cell.
For achieving the above object, present invention employs following technical scheme: a kind of electric drive system for electric vehicles is short-circuit protection circuit initiatively, comprise the NOR gate circuit for receiving the two-way hardware trigger signal that hardware circuit exports, the mouth of NOR gate circuit is connected with the second input end of trigger circuit, the first input end of trigger circuit receives the main control chip energizing signal of power drive system main control chip output, the mouth of trigger circuit is connected with the input end of logic inversion circuit, the mouth of logic inversion circuit respectively with three bridges on motor driver, the input end of time delay logic inversion circuit is connected, the mouth of time delay logic inversion circuit is connected with three bridges under motor driver.
Described NOR gate circuit is by NAND gate U1A, NAND gate U1B, NAND gate U1C and NAND gate U1D composition, input 1 pin of NAND gate U1A connects a road hardware trigger signal of hardware circuit output respectively, input 4 pin of NAND gate U1B, input 2 pin of NAND gate U1A connects another road hardware trigger signal of hardware circuit output respectively, input 10 pin of NAND gate U1C, output 3 pin of NAND gate U1A respectively with input 5 pin of NAND gate U1B, input 9 pin of NAND gate U1C is connected, output 6 pin and the NAND gate U1D of NAND gate U1B input 12 pin and are connected, output 8 pin of NAND gate U1D is connected with input 13 pin of NAND gate U1D, output 11 pin of NAND gate U1D is as the mouth of NOR gate circuit.
Described trigger circuit adopt NAND gate U2A, and it inputs the main control chip energizing signal that 1 pin connects the output of power drive system main control chip, and it inputs 2 pin and is connected with the mouth of NOR gate circuit, and it exports the mouth of 3 pin as trigger circuit.
Described logic inversion circuit adopts NAND gate U2B, and it inputs the mouth contacting Power Generation Road after 4 pin are connected with input 5 pin, and it exports 6 pin and is connected with the input end of three bridges, time delay logic inversion circuit on motor driver respectively.
Described time delay logic inversion circuit is made up of RC time delay circuit and NAND gate U2C, described RC time delay circuit is made up of resistance R1 and electric capacity C1, one end of resistance R1 is connected with the mouth of logic inversion circuit, its other end is connected with one end of electric capacity C1, input 10 pin of NAND gate U2C respectively, the other end ground connection of electric capacity C1, input 9 pin of NAND gate U2C is connected with input 10 pin of NAND gate U2C, and output 8 pin of NAND gate U2C is connected with three bridges under motor driver.
As shown from the above technical solution, Real-Time Monitoring power drive system running state of the present invention, when system malfunctions quits work, both can send main control chip energizing signal by main control chip to protect, when main control chip occurs abnormal, also can the exception of main control chip be detected by hardware circuit and send hardware trigger signal and protect; The present invention can the three-phase windings of short circuit power drive system motor internal, locked drive motor, prevents that generation current is counter to be poured in electrokinetic cell, and protection electrokinetic cell is not damaged.
Detailed description of the invention
A kind of electric drive system for electric vehicles initiatively short-circuit protection circuit, comprise the NOR gate circuit 1 for receiving the two-way hardware trigger signal that hardware circuit exports, the mouth of NOR gate circuit 1 is connected with the second input end of trigger circuit 2, the first input end of trigger circuit 2 receives the main control chip energizing signal of power drive system main control chip output, the mouth of trigger circuit 2 is connected with the input end of logic inversion circuit 3, the mouth of logic inversion circuit 3 respectively with three bridges on motor driver, the input end of time delay logic inversion circuit 4 is connected, the mouth of time delay logic inversion circuit 4 is connected with three bridges under motor driver.Whether NOR gate circuit 1 meets the condition of initiatively short-circuit protection for checking system, and trigger circuit 2 are according to actual conditions, and selection adopts initiatively chip to trigger or adopts hardware circuit to trigger; Upper three bridges that logic inversion circuit 3 controls motor driver three-phase bridge are closed, and under time delay logic inversion circuit 4 control and drive system three-phase bridge, three bridges are open-minded, thus the three-phase windings of short circuit power drive system motor internal.The present invention, when critical failure appears in system, carries out short circuit to the three-phase windings of motor, prevent power drive system when fault counter for electric energy fill with to high-tension battery cause high-tension battery overcharge damage and cause potential safety hazard, as shown in Figure 1.
As shown in Figure 1, described NOR gate circuit 1 is by NAND gate U1A, NAND gate U1B, NAND gate U1C and NAND gate U1D composition, input 1 pin of NAND gate U1A connects a road hardware trigger signal of hardware circuit output respectively, input 4 pin of NAND gate U1B, input 2 pin of NAND gate U1A connects another road hardware trigger signal of hardware circuit output respectively, input 10 pin of NAND gate U1C, input 14 pin of NAND gate U1A meets power supply VCC, the input 7 pin ground connection of NAND gate U1A, output 3 pin of NAND gate U1A respectively with input 5 pin of NAND gate U1B, input 9 pin of NAND gate U1C is connected, output 6 pin and the NAND gate U1D of NAND gate U1B input 12 pin and are connected, output 8 pin of NAND gate U1D is connected with input 13 pin of NAND gate U1D, output 11 pin of NAND gate U1D is as the mouth of NOR gate circuit 1.
As shown in Figure 1, described trigger circuit 2 adopt NAND gate U2A, it inputs the main control chip energizing signal that 1 pin connects the output of power drive system main control chip, it inputs 2 pin and is connected with the mouth of NOR gate circuit 1, it exports the mouth of 3 pin as trigger circuit 2, input 14 pin of NAND gate U2A meets power supply VCC, the input 7 pin ground connection of NAND gate U2A; Described logic inversion circuit 3 adopts NAND gate U2B, and it inputs the mouth contacting Power Generation Road 2 after 4 pin are connected with input 5 pin, and it exports 6 pin and is connected with the input end of three bridges, time delay logic inversion circuit 4 on motor driver respectively.Described time delay logic inversion circuit 4 is made up of RC time delay circuit and NAND gate U2C, described RC time delay circuit is made up of resistance R1 and electric capacity C1, one end of resistance R1 is connected with the mouth of logic inversion circuit 3, its other end is connected with one end of electric capacity C1, input 10 pin of NAND gate U2C respectively, the other end ground connection of electric capacity C1, input 9 pin of NAND gate U2C is connected with input 10 pin of NAND gate U2C, and output 8 pin of NAND gate U2C is connected with three bridges under motor driver.
Below in conjunction with Fig. 1, the present invention is further illustrated.
When power drive system main control chip normally works, if main control chip detects that state of the system meets the condition of initiatively short-circuit protection, then by sending the protection instruction of main control chip energizing signal, namely export input 1 pin of main control chip energizing signal low level to NAND gate U2A; Simultaneously, when main control chip normally works, the two-way hardware trigger signal level that hardware circuit exports is different, NOR gate circuit 1 exports input 2 pin of high level to NAND gate U2A, output 3 pin of NAND gate U2A is high level, output 6 pin of NAND gate U2B is low level, namely on power drive system actuator, three bridge drive levels set low, after the time delay of RC time delay circuit, and reverse through logic level, under power drive system actuator, three bridge drive levels set high, thus the three-phase windings of short circuit power drive system motor internal, prevent charging current from flowing into electrokinetic cell;
When power drive system main control chip operation irregularity, hardware circuit can by hardware trigger signal detection to system exception, now send protection instruction by hardware trigger pin, two-way hardware trigger signal level is identical, NOR gate circuit 1 output low level is to input 2 pin of NAND gate U2A, the output 3 of NAND gate U2A is high level, output 6 pin of NAND gate U2B is low level, namely on power drive system actuator, three bridge drive levels set low, after the time delay of RC time delay circuit, and reverse through logic level, under power drive system actuator, three bridge drive levels set high, thus the three-phase windings of short circuit power drive system motor internal, prevent charging current from flowing into electrokinetic cell.
In sum, when system malfunctions quits work, the present invention both can send main control chip energizing signal by main control chip and protect, and when main control chip occurs abnormal, also can the exception of main control chip be detected by hardware circuit and send hardware trigger signal and protect; The present invention can the three-phase windings of short circuit power drive system motor internal, locked drive motor, prevents that generation current is counter to be poured in electrokinetic cell, and protection electrokinetic cell is not damaged.