A kind of electric drive system for electric vehicles actively short-circuit protection circuit
Technical field
The present invention relates to electric vehicle engineering field, especially a kind of electric drive system for electric vehicles actively short-circuit protection circuit.
Background technology
In the driving process of electric automobile, if power drive system quits work because of fault, now system drive motor will be naturally transformed into generating state by motoring condition, to electric automobile power battery charging, it is likely to result in the overcharge of electrokinetic cell and causes electrokinetic cell to lose efficacy, even result in electrokinetic cell overvoltage on fire, cause major hidden danger to traffic safety.Therefore this phenomenon must be carried out real-time guard, this kind of fault once occurs, charge circuit should be cut off immediately, to protect the safety of electric automobile power battery.But, so far not about the open report of electric drive system for electric vehicles actively short-circuit protection circuit.
Summary of the invention
It is an object of the invention to provide a kind of when power drive system breaks down, it is possible to cut off charge circuit in time, it is achieved the electric drive system for electric vehicles actively short-circuit protection circuit to the protection of electrokinetic cell.
For achieving the above object, present invention employs techniques below scheme: a kind of electric drive system for electric vehicles actively short-circuit protection circuit, NOR gate circuit including the two-way hardware trigger signal for receiving hardware circuit output, the outfan of NOR gate circuit is connected with the second input triggering circuit, the first input end triggering circuit receives the main control chip triggering signal of power drive system main control chip output, the outfan triggering circuit is connected with the input of logic inversion circuit, the outfan of logic inversion circuit respectively with three bridges on motor driver, the input of time delay logic inversion circuit is connected, the outfan of time delay logic inversion circuit is connected with three bridges under motor driver.
Described NOR gate circuit is by NAND gate U1A, NAND gate U1B, NAND gate U1C and NAND gate U1D composition, input 1 foot of NAND gate U1A connects a road hardware trigger signal of hardware circuit output respectively, input 4 foot of NAND gate U1B, input 2 foot of NAND gate U1A connects another road hardware trigger signal of hardware circuit output respectively, input 10 foot of NAND gate U1C, output 3 foot of NAND gate U1A respectively with input 5 foot of NAND gate U1B, input 9 foot of NAND gate U1C is connected, output 6 foot of NAND gate U1B inputs 12 feet and is connected with NAND gate U1D, output 8 foot of NAND gate U1D is connected with input 13 foot of NAND gate U1D, output 11 foot of NAND gate U1D is as the outfan of NOR gate circuit.
Described triggering circuit uses NAND gate U2A, and it inputs 1 foot and connects the main control chip triggering signal of power drive system main control chip output, and it inputs 2 feet and is connected with the outfan of NOR gate circuit, and it exports 3 feet as the outfan triggering circuit.
Described logic inversion circuit uses NAND gate U2B, and it inputs 4 feet and inputs 5 feet and be connected the outfan being followed by triggering circuit, and it exports 6 feet and is connected with three bridges, the input of time delay logic inversion circuit on motor driver respectively.
Described time delay logic inversion circuit is made up of RC delay circuit and NAND gate U2C, described RC delay circuit is made up of resistance R1 and electric capacity C1, one end of resistance R1 is connected with the outfan of logic inversion circuit, its other end is connected with one end of electric capacity C1, input 10 foot of NAND gate U2C respectively, the other end ground connection of electric capacity C1, input 9 foot of NAND gate U2C is connected with input 10 foot of NAND gate U2C, and output 8 foot of NAND gate U2C is connected with three bridges under motor driver.
As shown from the above technical solution; the present invention monitors power drive system running status in real time; when system malfunctions quits work; both can send main control chip triggering signal by main control chip to protect; when main control chip occurs abnormal, it is also possible to the exception of main control chip detected by hardware circuit and send hardware trigger signal and protect;The present invention can the three-phase windings of short circuit power drive system motor internal, locked driving motor, prevent that generation current is counter to be poured in electrokinetic cell, protection electrokinetic cell is without damage.
Accompanying drawing explanation
Fig. 1 is the circuit theory diagrams of the present invention.
Detailed description of the invention
A kind of electric drive system for electric vehicles actively short-circuit protection circuit, NOR gate circuit 1 including the two-way hardware trigger signal for receiving hardware circuit output, the outfan of NOR gate circuit 1 is connected with the second input triggering circuit 2, the first input end triggering circuit 2 receives the main control chip triggering signal of power drive system main control chip output, the outfan triggering circuit 2 is connected with the input of logic inversion circuit 3, the outfan of logic inversion circuit 3 respectively with three bridges on motor driver, the input of time delay logic inversion circuit 4 is connected, the outfan of time delay logic inversion circuit 4 is connected with three bridges under motor driver.Whether NOR gate circuit 1 meets the condition of actively short-circuit protection for detecting system, and triggering circuit 2 is according to practical situation, and selection is to use actively chip to trigger or use hardware circuit triggering;Logic inversion circuit 3 controls upper three bridges of motor driver three-phase bridge and closes, and it is open-minded that time delay logic inversion circuit 4 controls three bridges under driver three-phase bridge, thus the three-phase windings of short circuit power drive system motor internal.The present invention, when critical failure occurs in system, carries out short circuit to the three-phase windings of motor, prevents power drive system from causing high-tension battery overcharge damage to cause potential safety hazard, as shown in Figure 1 to high-tension battery counter for electric energy filling when fault.
nullAs shown in Figure 1,Described NOR gate circuit 1 is by NAND gate U1A、NAND gate U1B、NAND gate U1C and NAND gate U1D composition,Input 1 foot of NAND gate U1A connects a road hardware trigger signal of hardware circuit output respectively、Input 4 foot of NAND gate U1B,Input 2 foot of NAND gate U1A connects another road hardware trigger signal of hardware circuit output respectively、Input 10 foot of NAND gate U1C,Input 14 foot of NAND gate U1A meets power supply VCC,The input 7 foot ground connection of NAND gate U1A,Output 3 foot of NAND gate U1A respectively with input 5 foot of NAND gate U1B、Input 9 foot of NAND gate U1C is connected,Output 6 foot of NAND gate U1B inputs 12 feet and is connected with NAND gate U1D,Output 8 foot of NAND gate U1D is connected with input 13 foot of NAND gate U1D,Output 11 foot of NAND gate U1D is as the outfan of NOR gate circuit 1.
As shown in Figure 1, described triggering circuit 2 uses NAND gate U2A, it inputs 1 foot and connects the main control chip triggering signal of power drive system main control chip output, it inputs 2 feet and is connected with the outfan of NOR gate circuit 1, it exports 3 feet as the outfan triggering circuit 2, input 14 foot of NAND gate U2A meets power supply VCC, the input 7 foot ground connection of NAND gate U2A;Described logic inversion circuit 3 uses NAND gate U2B, and it inputs 4 feet and inputs 5 feet and be connected the outfan being followed by triggering circuit 2, and it exports 6 feet and is connected with three bridges, the input of time delay logic inversion circuit 4 on motor driver respectively.Described time delay logic inversion circuit 4 is made up of RC delay circuit and NAND gate U2C, described RC delay circuit is made up of resistance R1 and electric capacity C1, one end of resistance R1 is connected with the outfan of logic inversion circuit 3, its other end is connected with one end of electric capacity C1, input 10 foot of NAND gate U2C respectively, the other end ground connection of electric capacity C1, input 9 foot of NAND gate U2C is connected with input 10 foot of NAND gate U2C, and output 8 foot of NAND gate U2C is connected with three bridges under motor driver.
Below in conjunction with Fig. 1, the present invention is further illustrated.
When power drive system main control chip normally works; if main control chip detects that system mode meets the condition of actively short-circuit protection; the protection then triggering signal by sending main control chip instructs, i.e. output main control chip triggers signal low level to input 1 foot of NAND gate U2A;Simultaneously, when main control chip normally works, the two-way hardware trigger signal level of hardware circuit output is different, NOR gate circuit 1 exports high level to input 2 foot of NAND gate U2A, output 3 foot of NAND gate U2A is high level, output 6 foot of NAND gate U2B is low level, i.e. in power drive system driver, three bridge drive levels set low, after RC delay circuit time delay, and invert through logic level, under power drive system driver, three bridge drive levels set high, thus the three-phase windings of short circuit power drive system motor internal, prevent charging current from flowing into electrokinetic cell;
When power drive system main control chip operation irregularity, hardware circuit can be by hardware trigger signal detection to system exception, protection instruction is sent now by hardware trigger pin, two-way hardware trigger signal level is identical, NOR gate circuit 1 output low level is to input 2 foot of NAND gate U2A, the output 3 of NAND gate U2A is high level, output 6 foot of NAND gate U2B is low level, i.e. in power drive system driver, three bridge drive levels set low, after RC delay circuit time delay, and invert through logic level, under power drive system driver, three bridge drive levels set high, thus the three-phase windings of short circuit power drive system motor internal, prevent charging current from flowing into electrokinetic cell.
In sum; when system malfunctions quits work; the present invention both can send main control chip by main control chip and trigger signal and protect, when main control chip occurs abnormal, it is also possible to the exception of main control chip detected by hardware circuit and sends hardware trigger signal and protect;The present invention can the three-phase windings of short circuit power drive system motor internal, locked driving motor, prevent that generation current is counter to be poured in electrokinetic cell, protection electrokinetic cell is without damage.