CN106291320A - A kind of USB charging port control chip testing circuit - Google Patents
A kind of USB charging port control chip testing circuit Download PDFInfo
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- CN106291320A CN106291320A CN201610633343.0A CN201610633343A CN106291320A CN 106291320 A CN106291320 A CN 106291320A CN 201610633343 A CN201610633343 A CN 201610633343A CN 106291320 A CN106291320 A CN 106291320A
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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Abstract
The invention discloses a kind of USB charging port control chip testing circuit, use pressure reduction output module, threshold generation circuits, comparison circuit and logic judging circuit to set up and form.Testing circuit disclosed by the invention can detect the data transmission anode of USB charging port control chip, the working range of data transmission negative terminal, judge whether identification chip welds good and reliably working, and corresponding instruction is provided, it is ensured that the performance reliability of USB charging port control chip.It is an advantage of the current invention that: 1, can USB charging port control chip be detected comprehensively, include whether that welding is good, if can reliably working；2, testing circuit simple in construction, testing cost are relatively low；3, improve the work efficiency of testing staff；4, improve the performance reliability of USB charging port control chip.
Description
Technical field
The present invention relates to integrated circuit fields, be specifically related to a kind of USB charging port control chip testing circuit.
Background technology
In portable power source or intelligent charger, USB (Universal Serial Bus USB (universal serial bus)) charges
Port controller can detect characteristic automatically, monitors usb data line voltage distribution, and automatically provides correct on data circuit
Electric characteristic, charges for compatible equipment in special charging system configures.When portable power source or intelligent charger produce, need
Whether USB charging port control chip to be detected welds well, and output is normal, the most whole charging system cisco unity malfunction.
Summary of the invention
It is an object of the invention to detect before production is dispatched from the factory to solve USB charging port control chip in prior art
Complex procedures, and can not the problem of the simultaneously multiple function of detection chip, thus cause the performance of USB charging port control chip
The problem that reliability reduces；A kind of USB charging port control chip testing circuit is provided.
In order to achieve the above object, the present invention is achieved through the following technical solutions:
A kind of USB charging port control chip testing circuit, described testing circuit comprises:
Pressure reduction output module, described pressure reduction output module is connected with USB charging port control chip to be detected so that institute
State output signal voltage and the output of data transmission negative terminal of the data transmission anode of USB charging port control chip to be detected
Signal voltage has pressure reduction；
Comparison circuit, the input of described comparison circuit obtains first threshold voltage signal, Second Threshold voltage letter respectively
Number, and be connected with data transmission anode, the data transmission negative terminal of described USB charging port control chip to be detected；Described ratio
Relatively circuit exports respectively: judge described data transmission anode and described data transmission negative terminal whether short-circuit signal, it is judged that described number
According to transmission anode whether open circuit signaling, it is judged that described data transmission negative terminal whether open circuit signaling, it is judged that described data transmission anode
The voltage of output signal whether signal within normal range, it is judged that whether the voltage of described data transmission negative terminal output signal is just
Often range signals；
Logic judging circuit, obtains the described judgement described data transmission anode of described comparison circuit outfan output respectively
And described data transmission negative terminal whether short-circuit signal, described judge described data transmission anode whether open circuit signaling, described judgement
Described data transmission negative terminal whether open circuit signaling, described judge that whether the voltage of described data transmission anode output signal is normally
Range signals, the described voltage whether signal within normal range judging described data transmission negative terminal output signal, and carry out
Logical judgment.
It is preferred that described first threshold voltage signal, described Second Threshold voltage signal are all to pass through threshold generation circuits
Producing, described threshold generation circuits comprises:
Low-dropout linear voltage-regulating circuit, the input voltage of described low-dropout linear voltage-regulating circuit and described USB to be detected
The input voltage of charging port control chip is identical；
First threshold voltage follower circuit, the input of described first threshold voltage follower circuit and described low pressure difference linearity
The outfan of mu balanced circuit connects, and the outfan of described first threshold voltage follower circuit exports described first threshold voltage letter
Number；
Second Threshold voltage follower circuit, the input of described Second Threshold voltage follower circuit and described low pressure difference linearity
The outfan of mu balanced circuit connects, and the outfan of described Second Threshold voltage follower circuit exports described Second Threshold voltage letter
Number.
It is preferred that described first threshold voltage follower circuit comprises:
First impedance, one end of described first impedance is connected with the outfan of described low-dropout linear voltage-regulating circuit；
Second impedance, one end of described second impedance is connected with the other end of described first impedance, described second impedance
Other end ground connection；
The outfan of described first threshold voltage follower circuit is the junction point of described first impedance and described second impedance；
Described first impedance is 1: 10 with the impedance ratio of described second impedance.
It is preferred that described Second Threshold voltage follower circuit comprises:
3rd impedance, described one end of 3rd impedance is connected with the outfan of described low-dropout linear voltage-regulating circuit；
4th impedance, one end of described 4th impedance is connected with the other end of described 3rd impedance, described 4th impedance
Other end ground connection；
The outfan of described Second Threshold voltage follower circuit is the junction point of described 3rd impedance and described 4th impedance；
Described 3rd impedance is 1: 1 with the impedance ratio of described 4th impedance.
It is preferred that described pressure reduction output module comprises: blood pressure lowering impedance；One end of described blood pressure lowering impedance is with described to be detected
The data transmission anode of USB charging port control chip connects, the other end ground connection of described blood pressure lowering impedance.
It is preferred that described pressure reduction output module comprises: blood pressure lowering impedance；One end of described blood pressure lowering impedance is with described to be detected
The data transmission negative terminal of USB charging port control chip connects, the other end ground connection of described blood pressure lowering impedance.
It is preferred that described comparison circuit comprises:
First comparing unit circuit, comprises the first comparator；The positive input of described first comparator is to be checked with described
The data transmission negative terminal of the USB charging port control chip surveyed connects, and the negative input of described first comparator is treated with described
The data transmission anode of the USB charging port control chip of detection connects；
Second comparing unit circuit, comprises the second comparator；The positive input of described second comparator and described data
Transmission anode connects, and the negative input of described second comparator obtains described Second Threshold voltage signal；
3rd comparing unit circuit, comprises the 3rd comparator；The positive input of described 3rd comparator obtains described the
One threshold voltage signal, the negative input of described 3rd comparator is connected with described data transmission anode；
4th comparing unit circuit, comprises the 4th comparator；The positive input of described 4th comparator and described data
Transmission negative terminal connects, and the negative input of described 4th comparator obtains described Second Threshold voltage signal；
5th comparing unit circuit, comprises the 5th comparator；The positive input of described 5th comparator obtains described the
One threshold voltage signal, the negative input of described 5th comparator is connected with described data transmission negative terminal.
It is preferred that described comparison circuit comprises:
First comparing unit circuit, comprises the first comparator；The positive input of described first comparator is to be checked with described
The data transmission anode of the USB charging port control chip surveyed connects, and the negative input of described first comparator is treated with described
The data transmission negative terminal of the USB charging port control chip of detection connects；
Second comparing unit circuit, comprises the second comparator；The positive input of described second comparator and described data
Transmission anode connects, and the negative input of described second comparator obtains described Second Threshold voltage signal；
3rd comparing unit circuit, comprises the 3rd comparator；The positive input of described 3rd comparator obtains described the
One threshold voltage signal, the negative input of described 3rd comparator is connected with described data transmission anode；
4th comparing unit circuit, comprises the 4th comparator；The positive input of described 4th comparator and described data
Transmission negative terminal connects, and the negative input of described 4th comparator obtains described Second Threshold voltage signal；
5th comparing unit circuit, comprises the 5th comparator；The positive input of described 5th comparator obtains described the
One threshold voltage signal, the negative input of described 5th comparator is connected with described data transmission negative terminal.
It is preferred that described logic judging circuit comprises:
First logic circuit, comprises the first logic and operation device, the first input end of described first logic and operation device with
The outfan of described second comparing unit circuit connects, the second input of described first logic and operation device and described 3rd ratio
The outfan of relatively element circuit connects；
Second logic circuit, comprises the second logic and operation device, the first input end of described second logic and operation device with
The outfan of described 4th comparing unit circuit connects, the second input of described second logic and operation device and described 5th ratio
The outfan of relatively element circuit connects；
3rd logic circuit, comprises the 3rd logic and operation device, the first input end of described 3rd logic and operation device with
The outfan of described first logic circuit connects, the second input of described 3rd logic and operation device and described second logic electricity
The outfan on road connects；
4th logic circuit, comprises the 4th logic and operation device, the first input end of described 4th logic and operation device with
The outfan of described first comparing unit circuit connects, and the second input of described 4th logic and operation device is patrolled with the described 3rd
The outfan collecting circuit connects.
It is preferred that described logic judging circuit also comprises display circuit, described display circuit comprises:
5th impedance, one end of described 5th impedance is connected with external power source；
First light emitting diode, the positive pole of described first light emitting diode is connected with the other end of described 5th impedance, institute
The outfan of the negative pole and described 4th logical AND circuit of stating the first light emitting diode is connected；
6th impedance, one end of described 6th impedance is connected with the outfan of described 4th logical AND circuit；
Second light emitting diode, the positive pole of described second light emitting diode pipe is connected with the other end of described 6th impedance,
The minus earth of described second light emitting diode.
On the basis of meeting common sense in the field, above-mentioned each optimum condition, can combination in any, obtain each preferable reality of the present invention
Example.
The most progressive effect of the present invention is:
A kind of USB charging port control chip testing circuit disclosed by the invention, uses pressure reduction output module, threshold value to produce
Circuit, comparison circuit and logic judging circuit are set up and are formed.Testing circuit disclosed by the invention can detect USB charging port control
The data transmission anode of coremaking sheet, the working range of data transmission negative terminal, it is judged that whether identification chip welds good and reliable work
Make, and corresponding instruction is provided, it is ensured that the performance reliability of USB charging port control chip.It is an advantage of the current invention that: 1,
USB charging port control chip can be detected comprehensively, include whether that welding is good, if short circuit or open circuit feelings occur
Condition, if can reliably working；2, testing circuit simple in construction, testing cost are relatively low；3, improve the work effect of testing staff
Rate；4, improve the performance reliability of USB charging port control chip.
Accompanying drawing explanation
Fig. 1 is the overall structure block diagram of the present invention a kind of USB charging port control chip testing circuit.
Fig. 2 is the threshold generation circuits figure of the present invention a kind of USB charging port control chip testing circuit.
Fig. 3-1 is the first comparing unit circuit diagram of the present invention a kind of USB charging port control chip testing circuit.
Fig. 3-2 is the second comparing unit circuit diagram of the present invention a kind of USB charging port control chip testing circuit.
Fig. 3-3 is the 3rd comparing unit circuit diagram of the present invention a kind of USB charging port control chip testing circuit.
Fig. 3-4 is the 4th comparing unit circuit diagram of the present invention a kind of USB charging port control chip testing circuit.
Fig. 3-5 is the 5th comparing unit circuit diagram of the present invention a kind of USB charging port control chip testing circuit.
Fig. 4 is the logic judging circuit figure of the present invention a kind of USB charging port control chip testing circuit.
Fig. 5 is that in the present invention a kind of USB charging port control chip testing circuit, pressure reduction output module fills with USB to be measured
Electricity port controlling chip connection diagram.
Detailed description of the invention
Further illustrate the present invention below by the mode of embodiment, but the most therefore limit the present invention to described reality
Execute among example scope.The experimental technique of unreceipted actual conditions in the following example, conventionally and condition, or according to business
Product description selects.
As it is shown in figure 1, a kind of USB charging port control chip testing circuit, this testing circuit comprises: pressure reduction output module
1, threshold generation circuits 2, comparison circuit 3 and logic judging circuit 4.Wherein, comparison circuit 3 charges with USB to be detected respectively
Port controlling chip, threshold generation circuits 2 and logic judging circuit 4 connect, and pressure reduction output module 1 charges with USB to be detected
Port controlling chip connects.
In the present invention, threshold generation circuits 2 is used for exporting first threshold voltage signal V1, Second Threshold voltage signal V2；
Comparison circuit 3 obtains first threshold voltage signal V1, the Second Threshold voltage signal V2 of threshold generation circuits 2 output, simultaneously with
The data transmission anode DP of pressure reduction output module 1, data transmission negative terminal DM connect；It is defeated that logic judging circuit 4 obtains comparison circuit 3
The comparative result signal that goes out also carries out logical process and display.
As it is shown in figure 5, pressure reduction output module 1 is connected with USB charging port control chip 11.In the present embodiment, pressure reduction is defeated
Go out module 1 and comprise a blood pressure lowering impedance R10.
The pin of USB charging port control chip 11 comprises: power end Vin, earth terminal GND, data transmission anode DP and
Data transmission negative terminal DM.Wherein, data transmission anode DP transmits anode DP as the data of pressure reduction output module 1；Data are transmitted
Negative terminal DM transmits negative terminal DM as the data of pressure reduction output module 1.The power end Vin of USB charging port control chip 11 obtains
Input voltage, earth terminal GND ground connection.
In the present embodiment, one end of blood pressure lowering impedance R10 is connected with data transmission anode DP, the other end of blood pressure lowering impedance R10
Ground connection.In the present invention, when USB charging port control chip 11 normally works, data transmission anode DP, data transmission negative terminal DM
Output valve the most identical, then cannot by general voltage detecting judge data transmission anode DP, data transmission negative terminal DM be
No short circuit.Further, owing to data transmission anode DP exists output impedance, then the present invention uses blood pressure lowering impedance R10 to transmit with data
Anode DP connects, it is possible to reduce the output voltage of data transmission anode DP transmission signal so that data transmission anode DP transmission letter
Number and data transmission negative terminal DM transmission signal between there is bigger pressure reduction, for use below comparison circuit 3 complete data transmission
Anode DP relatively designs offer condition with the short-circuit ratio of data transmission negative terminal DM.
In the present embodiment, the USB charging port control chip using model to be 2514A is as detection object.This chip
The input voltage that power end Vin requires is 5V, the data transmission anode DP of this chip, the transmission signal electricity of data transmission negative terminal DM
Pressure value is 2.7V.
In actual use, the power end Vin of general USB charging port control chip is usually 4.5V-5.5V,
Data transmission anode DP, the transmission signal voltage value of data transmission negative terminal DM are usually 2.56V-2.87V.
As in figure 2 it is shown, threshold generation circuits 2 comprises: low-dropout linear voltage-regulating circuit 21, first threshold voltage follower circuit
22 and Second Threshold voltage follower circuit 23.The input of first threshold voltage follower circuit 22 and low-dropout linear voltage-regulating circuit
The outfan of 21 connects, and the input of Second Threshold voltage follower circuit 23 connects with the outfan of low-dropout linear voltage-regulating circuit 21
Connect.Wherein, the input voltage of low-dropout linear voltage-regulating circuit 21 is identical with the input voltage of pressure reduction output module 1.First threshold
The outfan output first threshold voltage signal V1 of voltage follower circuit 22；The outfan of Second Threshold voltage follower circuit 23 is defeated
Go out Second Threshold voltage signal V2.
In the present embodiment, the input required in view of the power end Vin of the USB charging port control chip that model is 2514A
Voltage is 5V, then the input voltage of low-dropout linear voltage-regulating circuit 21 is 5V.
In the present invention, low-dropout linear voltage-regulating circuit 21 comprises low pressure difference linear voltage regulator the 211, first electric capacity C4, and second
Electric capacity C5.Wherein, the input electricity that the voltage input end Vi input of low pressure difference linear voltage regulator 211 is identical with pressure reduction output module 1
Pressure；And one end of the first electric capacity C4 is connected with the voltage input end Vi of low pressure difference linear voltage regulator 211, the first electric capacity C4's is another
One end ground connection；The voltage output end Vo of low pressure difference linear voltage regulator 211 respectively with the input of first threshold voltage follower circuit 22
End, the input of Second Threshold voltage follower circuit 23 connect；And one end of the second electric capacity C5 and low pressure difference linear voltage regulator
The voltage output end Vo of 211 connects, the other end ground connection of the second electric capacity C5；The earth terminal Vss of low pressure difference linear voltage regulator 211 connects
Ground.The outfan of low-dropout linear voltage-regulating circuit 21 is the voltage output end Vo of low pressure difference linear voltage regulator 211.
As in figure 2 it is shown, first threshold voltage follower circuit 22 comprises: the first impedance R16, the second impedance R18.First impedance
One end of R16 is connected with the outfan of low-dropout linear voltage-regulating circuit 21；One end of second impedance R18 is with the first impedance R16's
The other end connects, the other end ground connection of the second impedance R18.The outfan of first threshold voltage follower circuit 22 is the first impedance
R16 and the junction point of the second impedance R18.The impedance ratio requiring the first impedance R16 and the second impedance R18 in the present invention is 1: 10.
As in figure 2 it is shown, Second Threshold voltage follower circuit 23 comprises: the 3rd impedance R15, the 4th impedance R17.Wherein,
One end of three impedance R15 is connected with the outfan of low-dropout linear voltage-regulating circuit 21；One end of 4th impedance R17 and the 3rd impedance
The other end of R15 connects, the other end ground connection of the 4th impedance R17.The outfan of Second Threshold voltage follower circuit 23 is the 3rd
Impedance R15 and the junction point of the 4th impedance R17.The impedance ratio requiring the 3rd impedance R15 and the 4th impedance R17 in the present invention is 1:
1。
In the present embodiment, in view of the input voltage of USB charging port control chip is 5V, the data transmission anode of this chip
DP, the transmission signal voltage value of data transmission negative terminal DM is 2.7V, then sets first threshold voltage signal V1 defeated of requirement
Go out voltage be 3V, requirement for 1.65V.In order to reach above-mentioned requirements, the first electric capacity C4, the value of the second electric capacity C5 is all at 1uF-
Between 10uF, the first electric capacity C4 in the present embodiment, the second electric capacity C5 are 10uF.Meanwhile, the first impedance R16, the second impedance R18
Value is 3K Ω, 30K Ω respectively；3rd impedance R15, the 4th equal value of impedance R17 are 30K Ω.
In actual use, the output voltage range of the first threshold voltage signal V1 required is set as 2.9V-
3.2V, sets the output voltage range of the Second Threshold voltage signal V2 required as 1.4V-1.8V.
Comparison circuit 3 comprises: first comparing unit circuit the 31, second comparing unit circuit the 32, the 3rd comparing unit circuit
33, the 4th comparing unit circuit 34 and the 5th comparing unit circuit 35.
As shown in figure 3-1, the first comparing unit circuit 31 comprises the first comparator 311.The forward of the first comparator 311 is defeated
Entering end to be connected with the data transmission negative terminal DM of pressure reduction output module 1, the negative input of the first comparator 311 exports mould with pressure reduction
The data transmission anode DP of block 1 connects.In the present invention, the first comparing unit circuit 31 is used for judging data transmission negative terminal DM output
Signal and data transmit the output voltage size of anode DP output signal, and then judge whether above-mentioned two transmission ends has short circuit existing
As.
In another embodiment, when one end of blood pressure lowering impedance R10 is connected with data transmission negative terminal DM, blood pressure lowering impedance R10's
During other end ground connection；The positive input of the first comparator 311 transmits anode DP with the data of USB charging port control chip 11
Connecting, the negative input of the first comparator 311 transmits negative terminal DM with the data of USB charging port control chip 11 and is connected.Profit
With the first comparing unit circuit 31 for judging data transmission negative terminal DM output signal and data transmission anode DP output signal
Output voltage size, and then judge whether above-mentioned two transmission ends has short circuit phenomenon.
As shown in figure 3-2, the second comparing unit circuit 32 comprises the second comparator 321.The forward of the second comparator 321 is defeated
Entering end to be connected with data transmission anode DP, the negative input of the second comparator 321 obtains Second Threshold voltage signal V2.This
In bright, the second comparing unit circuit 32 is for judging output voltage and the Second Threshold voltage of data transmission anode DP output signal
The size of signal V2, and then judge whether data transmission anode DP occurs breaking phenomena.
As shown in Fig. 3-3, the 3rd comparing unit circuit 33 comprises the 3rd comparator 331.The forward of the 3rd comparator 331 is defeated
Entering end and obtain first threshold voltage signal V1, the negative input of the 3rd comparator 331 is connected with data transmission anode DP.This
In bright, the 3rd comparing unit circuit 33 is for judging output voltage and the first threshold voltage of data transmission anode DP output signal
The size of signal V1, and then judge that the output voltage of data transmission anode DP output signal is whether in normal voltage range.
As shown in Figure 3-4, the 4th comparing unit circuit 34 comprises the 4th comparator 341.The forward of the 4th comparator 341 is defeated
Entering end to be connected with data transmission negative terminal DM, the negative input of the 4th comparator 341 obtains Second Threshold voltage signal V2.This
In bright, the 4th comparing unit circuit 34 is used for judging the size of data transmission negative terminal DM and Second Threshold voltage signal V2, and then
Judge whether data transmission negative terminal DM occurs breaking phenomena.
As in Figure 3-5, the 5th comparing unit circuit 35 comprises the 5th comparator 351.The forward of the 5th comparator 351 is defeated
Entering end and obtain first threshold voltage signal V1, the negative input of the 5th comparator 351 is connected with data transmission negative terminal DM.This
In bright, the 5th comparing unit circuit 35 is used for judging the size of data transmission negative terminal DM and first threshold voltage signal V1, and then
Judge that the output voltage of data transmission negative terminal DM output signal is whether in normal voltage range.
As shown in Figure 4, logic judging circuit 4 comprises: the first logic circuit, the second logic circuit, the 3rd logic circuit,
Four logic circuits and display circuit 45.The input of display circuit 45 and the outfan of the 4th logic circuit connect.
In the present embodiment, using model is multiple as logic judging circuit 4 of the integrated chip of logical AND gate of 74HC08
Logic and operation device.
As shown in Fig. 3-2, Fig. 3-3, Fig. 4, the first logic circuit comprises the first logic and operation device 411.First logical AND
The first input end of arithmetical unit 411 and the outfan 1A of the second comparing unit circuit 32 connect, the first logic and operation device 411
The outfan 1B of the second input and the 3rd comparing unit circuit 33 connects.
As shown in Fig. 3-4, Fig. 3-5, Fig. 4, the second logic circuit comprises the second logic and operation device 421.Second logical AND
The first input end of arithmetical unit 421 and the outfan 2A of the 4th comparing unit circuit 34 connect, the second logic and operation device 421
The outfan 2B of the second input and the 5th comparing unit circuit 35 connects.
3rd logic circuit comprises the 3rd logic and operation device 431.The first input end of the 3rd logic and operation device 431 with
The outfan of the first logic circuit 41 connects, the second input of the 3rd logic and operation device 431 and the second logic circuit 42
Outfan connects.
As shown in Fig. 3-1, Fig. 4, the 4th logic circuit comprises the 4th logic and operation device 441.4th logic and operation device
The first input end of 441 and the outfan 3A of the first comparing unit circuit 31 connect, and the second of the 4th logic and operation device 441 is defeated
Enter end to be connected with the outfan of the 3rd logic circuit 43.
Display circuit 45 comprises: the 5th impedance R20, the first light emitting diode D8, the 6th impedance R1 and the second light-emitting diodes
Pipe D7.Wherein, one end of the 5th impedance R20 is connected with external power source；The positive pole of the first light emitting diode D8 and the 5th impedance
The other end of R20451 connects, and the negative pole of the first light emitting diode D8 and the outfan of the 4th logical AND circuit connect；6th resistance
One end of anti-R19 is connected with the outfan of the 4th logical AND circuit；The positive pole of the second light emitting diode D7 pipe and the 6th impedance R19
The other end connect, the minus earth of the second light emitting diode D7.
A kind of USB charging port control chip testing circuit disclosed by the invention, specific works principle is as follows:
Through above-mentioned pressure reduction output module 1, threshold generation circuits 2, comparison circuit 3 and the design of logic judging circuit 4, when
Threshold generation circuits 2 exports first threshold voltage signal V1 respectively, Second Threshold voltage signal V2 is to comparison circuit 3, and presses
When difference output module 1 exports data transmission anode DP output signal, data transmission negative terminal DM outputs signal to comparison circuit 3；Logical
Cross comparison circuit 3 and obtain multiple logical judgment result.
Judge that data transmission anode DP output signal, data are transmitted by the first comparing unit circuit 31 of comparison circuit 3
The magnitude relationship of negative terminal DM output signal.When the first comparator 311 exports high level signal, illustrate data transmission anode DP,
Data transmission negative terminal DM is not all short-circuited；When the first comparator 311 output low level signal, illustrate that data transmit anode
In DP, data transmission negative terminal DM, arbitrary transmission port is short-circuited phenomenon.
Data transmission anode DP output signal and Second Threshold is judged by the second comparing unit circuit 32 of comparison circuit 3
The magnitude relationship of voltage signal V2.When the second comparator 321 exports high level signal, illustrate that data transmission anode DP does not exists
Open circuit phenomenon；When the second comparator 321 output low level signal, conclusion is contrary.
Data transmission anode DP output signal and first threshold is judged by the 3rd comparing unit circuit 33 of comparison circuit 3
The magnitude relationship of voltage signal V1.When the 3rd comparator 331 exports high level signal, data transmission anode DP output letter is described
Number output voltage in normal range of operation；When the 3rd comparator 331 output low level signal, conclusion is contrary.
Data transmission negative terminal DM output signal and Second Threshold is judged by the 4th comparing unit circuit 34 of comparison circuit 3
The magnitude relationship of voltage signal V2.When the 4th comparator 341 exports high level signal, illustrate that data transmission negative terminal DM does not exists
Open circuit phenomenon；When the 4th comparator 341 output low level signal, conclusion is contrary.
Data transmission negative terminal DM output signal and first threshold is judged by the 5th comparing unit circuit 35 of comparison circuit 3
The magnitude relationship of voltage signal V1.When the 5th comparator 351 exports high level signal, data transmission negative terminal DM output letter is described
Number output voltage in normal range of operation；When the 5th comparator 351 output low level signal, conclusion is contrary.
Comparison circuit 3 the first logic circuit of five output end signals input logic decision circuitry 4 respectively, second patrol
After collecting in circuit, the 3rd logic circuit and the 4th logic circuit, when the 4th logic circuit exports high level, illustrate that data are transmitted
Anode DP, data transmission negative terminal DM is not all short-circuited, and data transmission anode DP does not exist open circuit phenomenon and can be just
There is not open circuit phenomenon and can normally work in often work, data transmission negative terminal DM；Then the second luminescence two of display circuit 45
Pole pipe D7 works, and display USB charging port control chip performance is normal.When the 4th logic circuit output low level, number is described
According to transmission anode DP, data transmission negative terminal DM it may happen that short circuit, and/or data transmission anode DP exist open a way phenomenon and/or
Can not normally work, there is open circuit phenomenon and/or can not normally work in data transmission negative terminal DM；Then the of display circuit 45
One light emitting diode D8 work, display USB charging port control chip performance is abnormal.
Although the foregoing describing the detailed description of the invention of the present invention, it will be appreciated by those of skill in the art that these
Being merely illustrative of, protection scope of the present invention is defined by the appended claims.Those skilled in the art is not carrying on the back
On the premise of the principle and essence of the present invention, these embodiments can be made various changes or modifications, but these change
Protection scope of the present invention is each fallen within amendment.
Claims (10)
1. a USB charging port control chip testing circuit, it is characterised in that described testing circuit comprises:
Pressure reduction output module, described pressure reduction output module is connected with USB charging port control chip to be detected so that described in treat
The output signal voltage of the data transmission anode of the USB charging port control chip of detection and the output signal of data transmission negative terminal
Voltage has pressure reduction；
Comparison circuit, the input of described comparison circuit obtains first threshold voltage signal, Second Threshold voltage signal respectively, and
Transmit anode with the data of described USB charging port control chip to be detected, data transmission negative terminal is connected；Described comparison circuit
Output respectively: judge described data transmission anode and described data transmission negative terminal whether short-circuit signal, it is judged that described data are transmitted
Anode whether open circuit signaling, it is judged that described data transmission negative terminal whether open circuit signaling, it is judged that described data transmission anode output letter
Number voltage whether signal within normal range, it is judged that whether the voltage of described data transmission negative terminal output signal in normal range
Interior signal；
Logic judging circuit, obtains described judgement described data transmission anode and the institute of the output of described comparison circuit outfan respectively
State data transmission negative terminal whether short-circuit signal, described judge described in described data transmission anode whether open circuit signaling, described judgement
Data transmission negative terminal whether open circuit signaling, described judge that whether the voltage of described data transmission anode output signal is in normal range
Interior signal, the described voltage whether signal within normal range judging described data transmission negative terminal output signal, and carry out logic
Judge.
2. USB charging port control chip testing circuit as claimed in claim 1, it is characterised in that described first threshold electricity
Pressure signal, described Second Threshold voltage signal are all produced by threshold generation circuits, and described threshold generation circuits comprises:
Low-dropout linear voltage-regulating circuit, the input voltage of described low-dropout linear voltage-regulating circuit and described USB charging to be detected
The input voltage of port controlling chip is identical；
First threshold voltage follower circuit, the input of described first threshold voltage follower circuit and described low pressure difference linearity voltage stabilizing
The outfan of circuit connects, and the outfan of described first threshold voltage follower circuit exports described first threshold voltage signal；
Second Threshold voltage follower circuit, the input of described Second Threshold voltage follower circuit and described low pressure difference linearity voltage stabilizing
The outfan of circuit connects, and the outfan of described Second Threshold voltage follower circuit exports described Second Threshold voltage signal.
3. USB charging port control chip testing circuit as claimed in claim 2, it is characterised in that described first threshold electricity
Voltage follower circuit comprises:
First impedance, one end of described first impedance is connected with the outfan of described low-dropout linear voltage-regulating circuit；
Second impedance, one end of described second impedance is connected with the other end of described first impedance, another of described second impedance
End ground connection；
The outfan of described first threshold voltage follower circuit is the junction point of described first impedance and described second impedance；Described
First impedance is 1: 10 with the impedance ratio of described second impedance.
4. USB charging port control chip testing circuit as claimed in claim 2, it is characterised in that described Second Threshold electricity
Voltage follower circuit comprises:
3rd impedance, described one end of 3rd impedance is connected with the outfan of described low-dropout linear voltage-regulating circuit；
4th impedance, one end of described 4th impedance is connected with the other end of described 3rd impedance, another of described 4th impedance
End ground connection；
The outfan of described Second Threshold voltage follower circuit is the junction point of described 3rd impedance and described 4th impedance；Described
3rd impedance is 1: 1 with the impedance ratio of described 4th impedance.
5. USB charging port control chip testing circuit as claimed in claim 1, it is characterised in that described pressure reduction output mould
Block comprises: blood pressure lowering impedance；The data transmission of one end of described blood pressure lowering impedance and described USB charging port control chip to be detected
Anode connects, the other end ground connection of described blood pressure lowering impedance.
6. USB charging port control chip testing circuit as claimed in claim 1, it is characterised in that described pressure reduction output mould
Block comprises: blood pressure lowering impedance；The data transmission of one end of described blood pressure lowering impedance and described USB charging port control chip to be detected
Negative terminal connects, the other end ground connection of described blood pressure lowering impedance.
7. USB charging port control chip testing circuit as claimed in claim 5, it is characterised in that described comparison circuit bag
Contain:
First comparing unit circuit, comprises the first comparator；The positive input of described first comparator is with described to be detected
The data transmission negative terminal of USB charging port control chip connects, and the negative input of described first comparator is to be detected with described
USB charging port control chip data transmission anode connect；
Second comparing unit circuit, comprises the second comparator；The positive input of described second comparator transmits with described data
Anode connects, and the negative input of described second comparator obtains described Second Threshold voltage signal；
3rd comparing unit circuit, comprises the 3rd comparator；The positive input of described 3rd comparator obtains described first threshold
Threshold voltage signal, the negative input of described 3rd comparator is connected with described data transmission anode；
4th comparing unit circuit, comprises the 4th comparator；The positive input of described 4th comparator transmits with described data
Negative terminal connects, and the negative input of described 4th comparator obtains described Second Threshold voltage signal；
5th comparing unit circuit, comprises the 5th comparator；The positive input of described 5th comparator obtains described first threshold
Threshold voltage signal, the negative input of described 5th comparator is connected with described data transmission negative terminal.
8. USB charging port control chip testing circuit as claimed in claim 6, it is characterised in that described comparison circuit bag
Contain:
First comparing unit circuit, comprises the first comparator；The positive input of described first comparator is with described to be detected
The data transmission anode of USB charging port control chip connects, and the negative input of described first comparator is to be detected with described
USB charging port control chip data transmission negative terminal connect；
Second comparing unit circuit, comprises the second comparator；The positive input of described second comparator transmits with described data
Anode connects, and the negative input of described second comparator obtains described Second Threshold voltage signal；
3rd comparing unit circuit, comprises the 3rd comparator；The positive input of described 3rd comparator obtains described first threshold
Threshold voltage signal, the negative input of described 3rd comparator is connected with described data transmission anode；
4th comparing unit circuit, comprises the 4th comparator；The positive input of described 4th comparator transmits with described data
Negative terminal connects, and the negative input of described 4th comparator obtains described Second Threshold voltage signal；
5th comparing unit circuit, comprises the 5th comparator；The positive input of described 5th comparator obtains described first threshold
Threshold voltage signal, the negative input of described 5th comparator is connected with described data transmission negative terminal.
9. USB charging port control chip testing circuit as claimed in claim 7 or 8, it is characterised in that described logical judgment
Circuit comprises:
First logic circuit, comprises the first logic and operation device, and the first input end of described first logic and operation device is with described
The outfan of the second comparing unit circuit connects, and the second input of described first logic and operation device compares single with the described 3rd
The outfan of unit's circuit connects；
Second logic circuit, comprises the second logic and operation device, and the first input end of described second logic and operation device is with described
The outfan of the 4th comparing unit circuit connects, and the second input of described second logic and operation device compares single with the described 5th
The outfan of unit's circuit connects；
3rd logic circuit, comprises the 3rd logic and operation device, and the first input end of described 3rd logic and operation device is with described
The outfan of the first logic circuit connects, the second input of described 3rd logic and operation device and described second logic circuit
Outfan connects；
4th logic circuit, comprises the 4th logic and operation device, and the first input end of described 4th logic and operation device is with described
The outfan of the first comparing unit circuit connects, the second input of described 4th logic and operation device and described 3rd logic electricity
The outfan on road connects.
10. USB charging port control chip testing circuit as claimed in claim 9, it is characterised in that described logical judgment electricity
Road also comprises display circuit, and described display circuit comprises:
5th impedance, one end of described 5th impedance is connected with external power source；
First light emitting diode, the positive pole of described first light emitting diode is connected with the other end of described 5th impedance, and described
The negative pole of one light emitting diode is connected with the outfan of described 4th logical AND circuit；
6th impedance, one end of described 6th impedance is connected with the outfan of described 4th logical AND circuit；
Second light emitting diode, the positive pole of described second light emitting diode pipe is connected with the other end of described 6th impedance, described
The minus earth of the second light emitting diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610633343.0A CN106291320B (en) | 2016-08-04 | 2016-08-04 | USB charging port control chip detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610633343.0A CN106291320B (en) | 2016-08-04 | 2016-08-04 | USB charging port control chip detection circuit |
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| CN106291320A true CN106291320A (en) | 2017-01-04 |
| CN106291320B CN106291320B (en) | 2024-02-02 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610633343.0A Active CN106291320B (en) | 2016-08-04 | 2016-08-04 | USB charging port control chip detection circuit |
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| CN107247179A (en) * | 2017-05-03 | 2017-10-13 | 北京世纪龙脉科技有限公司 | A kind of voltage detecting circuit of USB device |
| CN113589202A (en) * | 2020-04-30 | 2021-11-02 | 华为技术有限公司 | Detection circuit and detection device for charging interface |
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Also Published As
| Publication number | Publication date |
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| CN106291320B (en) | 2024-02-02 |
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