CN108962119B - Level shift circuit, driving method thereof and display device - Google Patents
Level shift circuit, driving method thereof and display device Download PDFInfo
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- CN108962119B CN108962119B CN201810862059.XA CN201810862059A CN108962119B CN 108962119 B CN108962119 B CN 108962119B CN 201810862059 A CN201810862059 A CN 201810862059A CN 108962119 B CN108962119 B CN 108962119B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
The invention discloses a level shift circuit, a driving method thereof and a display device. The circuit includes: the level shifter comprises a level shifter sub-circuit and a switch control sub-circuit, wherein the switch control sub-circuit is connected with a driving signal end, a first power supply end, a second power supply end and the level shifter sub-circuit. And the switch control sub-circuit controls the first power supply end and the second power supply end and the level transfer sub-circuit to be switched off when no driving signal is input into the driving signal end. That is, the first power source terminal and the second power source terminal cannot input the power source signal to the level shift sub-circuit, and the level shift sub-circuit does not generate the quiescent current. The level shifter sub-circuit generates a quiescent current with respect to the first power supply terminal and the second power supply terminal inputting the power supply signal to the level shifter sub-circuit when no driving signal is input. The static current of the level shift sub-circuit is reduced, the discharge time of the first power supply end and the second power supply end is prolonged, residual charges can be effectively released, and the cross striation phenomenon is improved. The display device has a good display effect.
Description
Technical Field
The invention relates to the technical field of display, in particular to a level shift circuit, a driving method thereof and a display device.
Background
The display device generally includes a gate driving circuit for driving the pixel unit to emit light, and the gate driving circuit may input a gate driving signal to the pixel unit under the control of the driving signal. However, since the driving signal (such as a clock signal or a turn-on signal) provided to the gate driving circuit has a low potential, and the transistor in the gate driving circuit may not be sufficiently turned on, a plurality of level shift circuits are generally provided, wherein each level shift circuit can amplify one driving signal and then provide the amplified driving signal to the gate driving circuit.
In the related art, in order to adapt to gate driving circuits with various structures, the number of level shift circuits provided in a display device is generally greater than the number of driving signal terminals in the gate driving circuit. Each of the level-shift circuits may be connected to a first power source terminal that can input a first power source signal to the level-shift circuit and a second power source terminal that can input a second power source signal to the level-shift circuit, and the level-shift circuit may amplify the driving signal under control of the two power source signals. And when the first power supply end and the second power supply end input power signals to the level shift circuit, a quiescent current is generated in the level shift circuit, and the magnitude of the quiescent current is in direct proportion to the discharge time of the first power supply end and the second power supply end.
However, since the level shifter circuit in the related art is used or not, the first power supply terminal and the second power supply terminal input the power supply signal to the level shifter circuit, that is, the unused level shifter circuit also generates a quiescent current. Accordingly, a quiescent current of a level shifter included in the display device is large, and accordingly, a discharge time of the first power source terminal and the second power source terminal is small. In an environment with a low temperature, residual charges generated due to the performance deterioration of transistors in the gate driving circuit may not be effectively released in the short time, and the display effect of the display device is poor because the residual charges cause the horizontal stripe phenomenon of the display screen of the display device to be effectively improved.
Disclosure of Invention
The invention provides a level shift circuit, a driving method thereof and a display device, which can solve the problem of poor display effect of the display device in the related art, and the technical scheme is as follows:
in a first aspect, a level shift circuit is provided, including: a level shift sub-circuit and a switch control sub-circuit;
the switch control sub-circuit is respectively connected with a driving signal end, a first power end, a second power end and the level shift sub-circuit, the switch control sub-circuit is used for controlling the first power end to be conducted with the first end of the level shift sub-circuit when a driving signal is input to the driving signal end, controlling the second power end to be conducted with the second end of the level shift sub-circuit and inputting the driving signal to the third end of the level shift sub-circuit, and the switch control sub-circuit is further used for controlling the first power end and the second power end to be turned off with the level shift sub-circuit when no driving signal is input to the driving signal end;
the level shift sub-circuit is further connected to the output terminal, and the level shift sub-circuit is configured to amplify the driving signal when being conducted with the first power source terminal and the second power source terminal, and input the amplified driving signal to the output terminal.
Optionally, the switch control sub-circuit includes: the device comprises a detection module and a switch module;
the detection module is respectively connected with the driving signal end, the reference power end and the third end, and is used for detecting whether a signal provided by the driving signal end is the same as a reference power signal provided by the reference power end, when the signal provided by the driving signal end is the same as the reference power signal, the detection module determines that the driving signal end has a driving signal input, inputs the driving signal to the third end, and inputs an on signal to the switch module, and the detection module is further used for determining that the driving signal end has no driving signal input and inputs an off signal to the switch module when the signal provided by the driving signal end is different from the reference power signal, wherein the reference power signal is an input signal provided by the timing controller to the level transfer circuit;
the switch module is respectively connected with the first power end, the second power end, the first end, the second end and the third end, and is used for controlling the first power end to be conducted with the first end and the second end to be conducted when receiving the turn-on signal, and is also used for controlling the first power end, the second power end and the level transfer sub-circuit to be turned off when receiving the turn-off signal.
Optionally, the detection module includes: an AND gate;
and the first input end of the AND gate is connected with the driving signal end, the second input end of the AND gate is connected with the reference power supply end, and the output end of the AND gate is connected with the third end.
Optionally, the detection module further includes: a first resistor, a second resistor and a capacitor;
one end of the first resistor is connected with the reference power supply end, and the other end of the first resistor is connected with the first input end of the AND gate;
one end of the second resistor is connected with the first input end of the AND gate, and the other end of the second resistor is connected with a grounding end;
one end of the capacitor is connected with the reference power supply end, and the other end of the capacitor is connected with the grounding end.
Optionally, the detection module further includes: a follower;
one end of the follower is connected with the third end, and the other end of the follower is connected with the switch module.
Optionally, the switch module includes: the circuit comprises a first transistor, a second transistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor;
a gate of the first transistor is connected to the third terminal, a first electrode of the first transistor is connected to the first power supply terminal, and a second electrode of the first transistor is connected to the first terminal;
a gate of the second transistor is connected to the third terminal, a first electrode of the second transistor is connected to the second power supply terminal, and a second electrode of the second transistor is connected to the second terminal;
one end of the third resistor is connected with the first power supply end, and the other end of the third resistor is connected with the third end;
one end of the fourth resistor is connected with the first end, and the other end of the fourth resistor is connected with the grounding end;
one end of the fifth resistor is connected with the second power supply end, and the other end of the fifth resistor is connected with the third end;
one end of the sixth resistor is connected to the second end, and the other end of the sixth resistor is connected to the ground terminal.
Optionally, the switch module further includes: a seventh resistor and an eighth resistor;
one end of the seventh resistor is connected with the third end, and the other end of the seventh resistor is connected with the grid electrode of the first transistor;
one end of the eighth resistor is connected with the third end, and the other end of the eighth resistor is connected with the grid electrode of the second transistor.
In a second aspect, there is provided a driving method of a level shift circuit, the method being applied to the level shift circuit according to the first aspect, the level shift circuit including: a level shift sub-circuit and a switch control sub-circuit; the method comprises the following steps:
the switch control sub-circuit detects whether a driving signal is input at a driving signal end;
when the switch control sub-circuit detects that a driving signal is input at the driving signal end, the switch control sub-circuit controls a first power end to be conducted with a first end of the level shift sub-circuit, controls a second power end to be conducted with a second end of the level shift sub-circuit, and inputs the driving signal to a third end of the level shift sub-circuit, and the level shift sub-circuit amplifies the driving signal and inputs the amplified driving signal to an output end under the control of a first power signal provided by the first power end and a second power signal provided by the second power end;
and when the switch control sub-circuit detects that no driving signal is input into the driving signal end, the first power end and the second power end and the level transfer sub-circuit are controlled to be switched off.
In a third aspect, there is provided a display device including: at least one level shifter circuit, gate driver circuit and pixel unit as described in the first aspect;
each driving signal end of the grid driving circuit is connected with the output end of one level transfer circuit, and the output end of the grid driving circuit is connected with the pixel unit.
Optionally, the number of the level shift circuits in the display device is greater than the number of the driving signal terminals arranged in the gate driving circuit.
The technical scheme provided by the invention has the beneficial effects that:
the embodiment of the invention provides a level shift circuit, a driving method thereof and a display device. The level shift circuit includes a level shift sub-circuit and a switch control sub-circuit, which may be connected to the driving signal terminal, the first power terminal, the second power terminal, and the level shift sub-circuit. The switch control sub-circuit may control the first power terminal and the second power terminal to turn off the level shifter sub-circuit when the driving signal terminal does not have the driving signal input, that is, the first power terminal cannot input the first power signal to the level shifter sub-circuit, and the second power terminal cannot input the second power signal to the level shifter sub-circuit. Accordingly, no static current is generated in the level shift sub-circuit when no driving signal is input to the driving signal terminal, and compared with the related art in which no driving signal is input to the driving signal terminal, the first power terminal and the second power terminal both input power signals to the level shift sub-circuit and the level shift sub-circuit generates static current. The display device has a good display effect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a level shift circuit according to an embodiment of the present invention;
FIG. 2 is a timing diagram of a first power signal and a clock signal according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another level shifter according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a structure of another level shifter according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a further level shifter according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a further level shifter according to an embodiment of the present invention;
fig. 7 is a flowchart of a driving method of a level shift circuit according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices having the same characteristics, and the transistors used in embodiments of the present invention are mainly switching transistors depending on the role in the circuit. Since the source and drain of the switching transistor used herein are symmetrical, the source and drain may be interchanged. In the embodiment of the present invention, the source is referred to as a first stage, and the drain is referred to as a second stage. The form of the figure provides that the middle end of the transistor is a grid, the signal input end is a source, and the signal output end is a drain. In addition, the switching transistor used in the embodiment of the present invention may include any one of a P-type switching transistor that is turned on when the gate is at a low level and turned off when the gate is at a high level and an N-type switching transistor that is turned on when the gate is at a high level and turned off when the gate is at a low level.
Fig. 1 is a schematic structural diagram of a Level shift circuit (LS) according to an embodiment of the present invention, and as shown in fig. 1, the Level shift circuit may include: a level shift sub-circuit 10 and a switch control sub-circuit 20.
The switch control sub-circuit 20 may be connected to the driving signal terminal Vin, the first power terminal VGH, the second power terminal VGL, and the level shift sub-circuit 10, respectively. For example, in fig. 1, the switch control sub-circuit 20 may be connected to the first terminal P1, the second terminal P2, and the third terminal P3 of the level shift sub-circuit 10, respectively. The switch control sub-circuit 20 can control the first power terminal VGH to be conducted with the first terminal P1 of the level shifter sub-circuit 10, control the second power terminal VGL to be conducted with the second terminal P2 of the level shifter sub-circuit 10, and input the driving signal to the third terminal P3 of the level shifter sub-circuit 10 when the driving signal terminal Vin has the driving signal input. The switch control sub-circuit 20 may further control the first power terminal VGH and the second power terminal VGL to turn off the level shift sub-circuit 10 when the driving signal terminal Vin has no driving signal input.
In the embodiment of the present invention, in order to adapt to gate driving circuits with various structures, level shift circuits with more number than driving signal terminals in the gate driving circuits are generally disposed, so that there may be a case where no driving signal is input to the driving signal terminal Vin of the level shift circuit, that is, there may be a case where an input/output channel (channel) of the level shift circuit is not used. The input/output channel may refer to a signal transmission channel between the driving signal terminal Vin and the output terminal OUT in the level shift circuit. The unused input/output channel means that the driving signal terminal Vin has no driving signal input, and correspondingly, the output terminal OUT has no amplified driving signal output.
In the related art, even if the driving signal terminal Vin has no driving signal input and the level shift circuit is not used, the first power terminal VGH and the second power terminal VGL are both turned on by the level shift circuit, that is, both input power signals to the level shift sub-circuit 10, and the level shift sub-circuit 10 generates a static current. The quiescent current of the level shifter circuit 10 is large. The quiescent current is the current within the level shifting sub-circuit 10. When the quiescent current of the level shifter circuit 10 is large, the power-down time of the first power source terminal VGH and the second power source terminal VGL is reduced. The power-down time refers to the time when the signal end of the display device discharges after the shutdown operation is executed. The quantity of the released residual charges generated on the display device is in direct proportion to the power-down time, namely the longer the power-down time is, the more the residual charges are released; the shorter the power down time, the less residual charge is discharged. Therefore, when the power-down time is short, residual charges generated on a display screen of the display device may not be effectively released within the short power-down time, and the display device cannot effectively improve the horizontal stripe phenomenon due to the residual charges.
In the embodiment of the present invention, the level shift circuit includes the switch control sub-circuit 20, and the switch control sub-circuit 20 can control the first power source terminal VGH and the second power source terminal VGL to be turned off from the level shift sub-circuit 10 when the driving signal terminal Vin has no driving signal input, that is, when the level shift circuit is not used, the first power source terminal VGH cannot input the first power source signal to the level shift sub-circuit 10, and the second power source terminal VGL cannot input the second power source signal to the level shift sub-circuit 10, accordingly, the level shift sub-circuit 10 will not generate the quiescent current. The level shift sub-circuit 10 provided by the embodiment of the present invention has a smaller quiescent current. The power-down time of the first power supply terminal VGH and the second power supply terminal VGL is increased, that is, the discharge time of the first power supply terminal VGH and the second power supply terminal VGL can be prolonged, and the residual charges can be effectively released in the prolonged discharge time, so that the cross-striation phenomenon of the display device can be effectively improved.
For example, it is assumed that 14 level shift sub-circuits 10 are provided in the display device, wherein 12 level shift sub-circuits 10 are used for amplifying the CLK signal and supplying the amplified CLK signal to the gate driving circuit, and 2 level shift sub-circuits 10 are used for amplifying the STV signal and supplying the amplified STV signal to the gate driving circuit. Assuming that the gate driving circuit in the display device has a 19T1C structure (i.e. consisting of 19 transistors and 1 capacitor), it needs 11 driving signal terminals (including 10 clock signal terminals CLK and 1 turn-on signal terminal STV). Therefore, after 11 driving signal terminals of the gate driving circuit are connected to the corresponding level shift sub-circuits 10, 2 level shift sub-circuits 10 for amplifying the CLK signal and 1 level shift word circuit 10 for amplifying the STV signal remain without driving signal input. At this time, the switch control sub-circuit 01 can control both the first power source terminal VGH and the second power source terminal VGL to be turned off from the remaining 3 level shift sub-circuits 10. At this time, the first power source terminal VGH cannot input the first power source signal to the remaining 3 level-shift sub-circuits 10, and the second power source terminal VGL cannot input the second power source signal to the remaining 3 level-shift sub-circuits 10.
Referring to fig. 1, the level shift sub-circuit 10 may be further connected to the output terminal OUT, and the level shift sub-circuit 10 may amplify the driving signal and input the amplified driving signal to the output terminal OUT when turned on with the first power source terminal VGH and the second power source terminal VGL.
In the embodiment of the present invention, the level shift sub-circuit 10 may be an amplifier. When the switch control sub-circuit 20 controls the first power supply terminal VGH to be conducted with the first terminal P1 of the level shifter sub-circuit 10, and controls the second power supply terminal VGL to be conducted with the second terminal P2 of the level shifter sub-circuit 10, the level shifter sub-circuit 10 may amplify the driving signal input from the switch control sub-circuit 20 to the third terminal P3 under the control of the first power supply signal provided by the first power supply terminal VGH and the second power supply signal provided by the second power supply terminal VGL, and input the amplified driving signal to the output terminal OUT. The output terminal OUT may input the amplified driving signal to the gate driving circuit, so as to drive the gate driving circuit to operate. Accordingly, when the switch control sub-circuit 20 controls the first power terminal VGH and the second power terminal VGL to be turned off from the level shift sub-circuit 10, neither the first power terminal VGH nor the second power terminal VGL can input the power signal to the level shift sub-circuit 10, and accordingly, the level shift sub-circuit 10 does not generate the quiescent current.
For example, assuming that the potential of the first power signal supplied from the first power terminal VGH is 30 volts (V), the potential of the second power signal supplied from the second power terminal VGL is-7V, and the potential of the driving signal supplied from the driving signal terminal Vin varies from 0 to 3.3V. When the switch control sub-circuit 20 controls the first power terminal VGH to be conducted with the first terminal P1 of the level shift sub-circuit 10, and controls the second power terminal VGL to be conducted with the second terminal P2 of the level shift sub-circuit 10, the level shift sub-circuit 10 can amplify the variation range of the electric potential of the driving signal from 0 to 3.3V to-7V to 30V according to the first power signal and the second power signal, and input the electric potential to the output terminal OUT. That is, the potential of the gate driving signal finally inputted to the gate driving circuit varies from-7V to 30V.
In summary, the level shift circuit provided in the embodiments of the present invention includes a level shift sub-circuit and a switch control sub-circuit, where the switch control sub-circuit can be connected to the driving signal terminal, the first power terminal, the second power terminal, and the level shift sub-circuit. The switch control sub-circuit may control the first power terminal and the second power terminal to turn off the level shift sub-circuit when the driving signal terminal does not have the driving signal input, that is, the first power terminal cannot input the first power signal to the level shift sub-circuit, and the second power terminal cannot input the second power signal to the level shift sub-circuit. Therefore, no driving signal is input at the driving signal end, no static current is generated in the level shift sub-circuit, and compared with the prior art that no matter whether the driving signal end has the driving signal input, the first power supply end and the second power supply end input power signals into the level shift sub-circuit and the level shift sub-circuit generates the static current, the static current of the level shift sub-circuit in the display device provided by the invention is reduced, correspondingly, the discharge time of the first power supply end and the second power supply end is prolonged relative to the prior art, residual charges can be effectively released in the prolonged time, and the cross striation phenomenon of the display screen of the display device due to the residual charges is improved. The display device has a good display effect.
Optionally, when the display device is tested in a low-temperature environment, for example, the test conditions are as follows: in the environment of-5 ℃, the display device is started and shut down once every 3 seconds, and when testing, a tester needs to firstly adjust the Power-on time sequence to the minimum value specified in the test specification, namely adjust the effective time of Power-on to the minimum time; and adjusts the Power-off timing to the minimum specified in the test specification, i.e., adjusts the effective time of Power-off to the minimum time. The tester finds that a gate driving circuit in the display device is prone to have a problem of Limit Power Sequence (LPS), that is, a transistor in the gate driving circuit has poor performance in a low temperature environment, and the electron mobility is correspondingly poor, so that a charge residue phenomenon is generated, and a cross-striation phenomenon or a block (block) phenomenon occurs on a display screen of the display device.
The present invention can extend the power-down time of the power source terminal in the display device, for example, the power-down time of the VGH signal or the CLK signal, by reducing the quiescent current of the level shifter sub-circuit 10. Fig. 2 is a timing diagram illustrating changes of VGH signals and VGH signals according to an embodiment of the present invention. As shown in fig. 2, the time required for the power-down of the VGH signal and the CLK signal in the related art is T1, and the time required for the power-down of the VGH signal and the CLK signal in the invention is T2, and it can be seen from fig. 2 that T2 is greater than T1. By prolonging the time required by the power failure of the VGH signal and the CLK signal, the display device can release more residual charges, so that the elimination of the cross striation phenomenon or the block phenomenon is facilitated, and the display effect of the display device is improved.
Optionally, in order to prolong the time required for the VGH signal and the CLK signal to be powered off and improve the horizontal stripe phenomenon, the level shift sub-circuit 10 may further pull up the potential of the CLK signal or the potential of the VGH signal to a higher potential after the display device performs the shutdown operation, and then perform the discharging.
Fig. 3 is a schematic structural diagram of another level shift circuit according to an embodiment of the present invention, and as shown in fig. 3, the switch control sub-circuit 20 may include: a detection module 201 and a switch module 202.
Referring to fig. 2, the detection module 201 may be respectively connected to the driving signal terminal Vin, the reference power terminal Vref, and the third terminal P3, and the detection module 201 may detect whether a signal provided by the driving signal terminal Vin is the same as a reference power signal provided by the reference power terminal Vref. When the signal provided by the driving signal terminal Vin is the same as the reference power signal, the detection module 201 may determine that the driving signal terminal Vin has a driving signal input, input a driving signal to the third terminal P3, and input an on signal to the switch module 202; the detection module 201 may further determine that the driving signal terminal Vin has no driving signal input when the signal provided by the driving signal terminal Vin is different from the reference power signal, and input a turn-off signal to the switch module 202.
In an embodiment of the present invention, the reference power supply signal provided by the reference power supply terminal Vref may be an input signal provided to the level shifter circuit by a Timing Controller (Tcon). The driving signal provided by the driving signal terminal Vin is also provided by the Tcon. In addition, when manufacturing the display device, an operator can control the connection state of the output end of the Tcon and the driving signal end Vin according to the connection state of the output end OUT of the level shift circuit and the gate driving circuit, so that the Tcon can only provide signals for the driving signal end Vin connected with the Tcon. The signal provided by the Tcon may generally include an STV signal and a CLK signal.
Optionally, in the embodiment of the present invention, an output terminal of Tcon may be connected to the reference power terminal Vref and the driving signal terminal Vin of each level shifter circuit in two paths. One path of the output end of the Tcon can be directly connected with a reference power supply end Vref of each level shifter circuit, and provides an input signal for the reference power supply end Vref; the other path of the output terminal of Tcon may be connected to the driving signal terminal Vin of each level shifter through a 0 ohm resistor, and provides a driving signal to the driving signal terminal Vin.
When the output end OUT of a certain level shift circuit is connected with the grid drive circuit, an operator can adjust the connection relation between the Tcon and the level shift circuit, and the Tcon can provide signals for both the drive signal end Vin and the reference power supply end Vref of the level shift circuit; when the output terminal OUT of a certain level shift circuit is not connected to the gate driving circuit, an operator may disconnect the output terminal of Tcon from the driving signal terminal Vin of the level shift circuit by removing a 0 ohm resistor between Tcon and the level shift circuit (for example, when the resistor is a chip resistor, power may not be supplied to the chip resistor), so that Tcon may supply a signal only to the reference power terminal Vref of the level shift circuit, but not to the driving signal terminal Vin of the level shift circuit. Or, another path of the output end of the Tcon may also be directly connected to the driving signal terminal Vin of each level shift circuit, and when the output end OUT of a certain level shift circuit is not connected to the gate driving circuit, an operator may directly disconnect the output end of the Tcon from the path of the connection of the driving signal terminal Vin of the level shift circuit, so that the Tcon may not provide a driving signal to the driving signal terminal Vin of the level shift circuit.
For example, assuming that the output terminal OUT of a certain level shifter circuit is connected to the first clock signal terminal CLK1 of the gate driver circuit, Tcon may supply the first clock signal CLK1 to both the driving signal terminal Vin and the reference power supply terminal Vref of the level shifter circuit. At this time, the detection module 201 can detect that the signal CLK1 provided by the driving signal terminal Vin is the same as the reference power signal CLK1 provided by the reference power terminal Vref, and can determine that the driving signal terminal Vin has the driving signal input, and the detection module 201 can input the driving signal CLK1 to the third terminal P3 and input the turn-on signal to the switch module 202. Assuming that the output terminal OUT of a certain level shifter circuit is not connected to the gate driver circuit, an operator may remove a 0 ohm resistor between Tcon and the level shifter circuit to disconnect the output terminal of Tcon from the driving signal terminal Vin, so that Tcon may supply the reference power signal only to the reference power terminal Vref of the level shifter circuit, and not to the driving signal terminal Vin of the level shifter circuit. At this time, the driving signal terminal Vin has no signal input, the detection module 201 may detect that the signal provided by the driving signal terminal Vin is at a low level, which is different from the reference power signal provided by the reference power terminal Vref, and may determine that the driving signal terminal Vin has no driving signal input, and the detection module 201 may input a turn-off signal to the switch module 202.
Further, referring to fig. 2, the switch module 202 may be respectively connected to the first power source terminal VGH, the second power source terminal VGL, the first terminal P1, the second terminal P2 and the third terminal P3, and the switch module 202 may control the first power source terminal VGH to be conducted with the first terminal P1 and the second power source terminal VGL to be conducted with the second terminal P2 when receiving the turn-on signal. At this time, the first power source terminal VGH may input the first power source signal to the level shift sub-circuit 10 through the first terminal P1, and the second power source terminal VGL may input the second power source signal to the level shift sub-circuit 10 through the second terminal P2. The level shift sub-circuit 10 may amplify the driving signal received by the third terminal P3 according to the first power signal and the second power signal.
The switch module 202 may further control the first power source terminal VGH and the second power source terminal VGL to turn off the level shift sub-circuit 10 when receiving the turn-off signal, at this time, the first power source terminal VGH cannot input the first power source signal to the level shift sub-circuit 10, and the second power source terminal VGL cannot input the second power source signal to the level shift sub-circuit 10, and accordingly, the level shift sub-circuit 10 may not generate the quiescent current. The quiescent current of the level shift circuit of the display device is small.
Fig. 4 is a schematic structural diagram of another level shift circuit according to an embodiment of the present invention, and as shown in fig. 4, the detecting module 201 may include: and gate &.
A first input terminal of the and gate & may be connected to the driving signal terminal Vin, a second input terminal of the and gate & may be connected to the reference power source terminal Vref, and an output terminal of the and gate & may be connected to the third terminal P3.
In the embodiment of the present invention, the and gate & may perform an and operation on the signal provided from the driving signal terminal Vin and the reference power signal provided from the reference power terminal Vref. As can be seen from the logical operation relationship of the and gate & may input a signal at the first potential, which is the turn-on signal input to the switch module 202, to the third terminal P3 when the signal provided by the driving signal terminal Vin is the same as the reference power signal. When the signal provided by the driving signal terminal Vin is different from the reference power signal, the and gate & may input a signal at a second potential, that is, a turn-off signal input to the switch module 202, to the third terminal P3. Wherein, the first potential is an effective potential, and the second potential is an ineffective potential.
Optionally, the detecting module 201 may also include a nand gate or other logic gates capable of detecting whether two signals (i.e., the reference power signal and the signal provided by the driving signal terminal Vin) are the same, and the type of the logic gate is not limited in the embodiment of the present invention.
Optionally, fig. 5 is a schematic structural diagram of another level shift circuit provided in an embodiment of the present invention, and as shown in fig. 5, the detecting module 201 may further include: a first resistor R1, a second resistor R2 and a capacitor C.
One end of the first resistor R1 may be connected to the reference power terminal Vref, and the other end of the first resistor R1 may be connected to a first input terminal of the gate & gate.
One end of the second resistor R2 may be connected to the first input terminal of the gate & and the other end of the second resistor R2 may be connected to the ground GND.
One end of the capacitor C may be connected to the reference power terminal Vref, and the other end of the capacitor C may be connected to the ground terminal GND.
The first resistor R1 may be used as a current limiting resistor, and the second resistor R2 may be used as a pull-down resistor, both of which may be used to improve the stability of the operation of the detection module 201 and to improve the safety of the and gate & operation. The capacitor C may be used for filtering, suppressing the influence of other signals on the reference power signal, and improving the performance of the detection module 201.
Optionally, fig. 6 is a schematic structural diagram of another level shift circuit provided in the embodiment of the present invention, and as shown in fig. 6, the detecting module 201 may further include: a follower F.
One end of the follower F may be connected to the third terminal P3, and the other end of the follower F may be connected to the switch module 202.
In the embodiment of the present invention, the follower F may be a voltage follower, and the follower F may serve as a buffer stage between the detection module 201 and the switch module 202, so as to improve stability of the signal input to the switch module 202.
Alternatively, referring to fig. 4 to 6, the switch module 202 may include: a first transistor M1, a second transistor M2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6.
The gate of the first transistor M1 may be connected to the third terminal P3, the first pole of the first transistor M1 may be connected to the first power source terminal VGH, and the second pole of the first transistor M1 may be connected to the first terminal P1.
The gate of the second transistor M2 may be connected to the third terminal P3, the first pole of the second transistor M2 may be connected to the second power source terminal VGL, and the second pole of the second transistor M2 may be connected to the second terminal P2.
One end of the third resistor R3 may be connected to the first power source terminal VGH, and the other end of the third resistor R3 may be connected to the third terminal P3.
One end of the fourth resistor R4 may be connected to the first end P1, and the other end of the fourth resistor R4 may be connected to the ground GND.
One end of the fifth resistor R5 may be connected to the second power source terminal VGL, and the other end of the fifth resistor R5 may be connected to the third terminal P3.
One end of the sixth resistor R6 may be connected to the second terminal P2, and the other end of the sixth resistor R6 may be connected to the ground GND.
The third resistor R3 and the fifth resistor R5 may be used as load resistors, and the fourth resistor R4 and the sixth resistor R6 may be used as pull-down resistors, both of which may improve the operation stability of the level shift circuit and may facilitate the detection of the fault cause of the circuit when the subsequent circuit has a fault.
Optionally, referring to fig. 5 and 6, the switch module 202 may further include: a seventh resistor R7 and an eighth resistor R8.
One end of the seventh resistor R7 may be connected to the third terminal P3, and the other end of the seventh resistor R7 may be connected to the gate of the first transistor M1.
One end of the eighth resistor R8 may be connected to the third terminal P3, and the other end of the eighth resistor R8 may be connected to the gate of the second transistor M2.
The seventh resistor R7 and the eighth resistor R8 may be current limiting resistors.
In the above embodiments, the first transistor M1 and the second transistor M2 are P-type transistors, and the first potential is low relative to the second potential. Of course, the first transistor M1 and the second transistor M2 may also be N-type transistors, and when both the first transistor M1 and the second transistor M2 are N-type transistors, the first potential is high relative to the second potential.
In summary, the level shift circuit provided in the embodiments of the present invention includes a level shift sub-circuit and a switch control sub-circuit, where the switch control sub-circuit can be connected to the driving signal terminal, the first power terminal, the second power terminal, and the level shift sub-circuit. The switch control sub-circuit may control the first power terminal and the second power terminal to turn off the level shift sub-circuit when the driving signal terminal does not have the driving signal input, that is, the first power terminal cannot input the first power signal to the level shift sub-circuit, and the second power terminal cannot input the second power signal to the level shift sub-circuit. Therefore, no driving signal is input at the driving signal end, no static current is generated in the level shift sub-circuit, and compared with the prior art that no matter whether the driving signal end has the driving signal input, the first power supply end and the second power supply end input power signals into the level shift sub-circuit and the level shift sub-circuit generates the static current, the static current generated by the display device provided by the invention is reduced, correspondingly, the discharge time of the first power supply end and the second power supply end is prolonged relative to the prior art, residual charges can be effectively released in the prolonged time, and the cross striation phenomenon of the display screen of the display device due to the residual charges is improved. The display device has a good display effect.
Fig. 7 is a flowchart of a driving method of a level shift circuit according to an embodiment of the present invention, and as shown in fig. 7, the method may be applied to the level shift circuit shown in any one of fig. 1 and fig. 3 to fig. 6, and referring to fig. 1, the level shift circuit may include: a level shift sub-circuit 10 and a switch control sub-circuit 20. Referring to fig. 7, the method may include:
The switch control sub-circuit can determine whether the input/output channel of the level shift circuit is used by detecting whether the driving signal is input from the driving signal terminal. And when the switch control sub-circuit detects that the driving signal is input at the driving signal end, the following step 702 can be executed; when the switch control sub-circuit detects that no driving signal is input to the driving signal terminal, the following step 703 may be performed.
And step 703, controlling the first power supply end and the second power supply end to be turned off from the level shift sub-circuit.
By controlling the first power supply terminal and the second power supply terminal to be turned off from the level shifter sub-circuit when it is detected that the driving signal terminal does not have the driving signal input, it is possible to control the first power supply terminal to not input the first power supply signal to the level shifter sub-circuit and to control the second power supply terminal to not input the second power supply signal to the level shifter sub-circuit when the level shifter circuit is not in use, and accordingly, the level shifter sub-circuit does not generate the quiescent current. Correspondingly, the discharge time of the first power end and the second power end can be prolonged, so that residual charges can be effectively released in the prolonged discharge time, and the cross striation phenomenon can be effectively improved.
In summary, in the driving method of the level shift circuit according to the embodiment of the present invention, the switch control sub-circuit may control the first power source terminal and the second power source terminal to turn off the level shift sub-circuit when detecting that the driving signal terminal does not have the driving signal input, that is, the first power source terminal cannot input the first power source signal to the level shift sub-circuit, and the second power source terminal cannot input the second power source signal to the level shift sub-circuit. Therefore, when no driving signal is input into the driving signal end, no static current can be generated in the level shift sub-circuit, and compared with the prior art that no matter whether the driving signal end has the driving signal input, the first power supply end and the second power supply end input power supply signals into the level shift sub-circuit. The display device has a good display effect.
Referring to fig. 3, the switch control circuit 20 may include a detection module 201 and a switch module 202, where the detection module 201 may include: and, the switching module 202 may include: a first transistor M1, a second transistor M2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6.
Accordingly, in the embodiment of the present invention, the and gate & in the detection module 20 may determine whether the driving signal is input to the driving signal terminal by performing and operation on the driving signal and the reference power signal.
When the signal provided from the driving signal terminal Vin and the reference power signal provided from the reference power terminal Vref are the same, the and gate may output the driving signal provided from the driving signal terminal Vin to the third terminal P3 and may output a turn-on signal at the first potential, at which the first transistor M1 and the second transistor M2 may be turned on, to the third terminal P3 after performing the and operation. At this time, the first transistor M1 may control the first power supply terminal VGH and the first terminal P1 of the level shifter circuit 10 to be turned on, and the second transistor M2 may control the second power supply terminal VGL and the second terminal P2 of the level shifter circuit 10 to be turned on. The level shifter circuit 10 amplifies the driving signal inputted from the third terminal P3 according to the first power signal provided from the first power source terminal VGH and the second power signal provided from the second power source terminal VGL, and inputs the amplified driving signal to the output terminal OUT. When the driving signal provided by the driving signal terminal Vin is different from the reference power signal provided by the reference power terminal Vref, the and gate may output an off signal at the second potential to the third terminal P3 after performing the and operation, the first transistor M1 and the second transistor M2 may be turned off by the off signal, the first transistor M1 may control the first power terminal VGH and the first terminal P1 of the level shift sub-circuit 10 to be turned off, the second transistor M2 may control the second power terminal VGL and the second terminal P2 of the level shift sub-circuit 10 to be turned off, the first power terminal VGH cannot input the first power signal to the level shift sub-circuit 10, the second power terminal VGL cannot input the second power signal to the level shift sub-circuit 10, and accordingly, the level shift sub-circuit 10 may not generate the static current.
In the above embodiments, the first transistor M1 and the second transistor M2 are P-type transistors, and the first potential is low relative to the second potential. Of course, the first transistor M1 and the second transistor M2 may also be N-type transistors, and when both the first transistor M1 and the second transistor M2 are N-type transistors, the first potential is high relative to the second potential.
In summary, in the driving method of the level shift circuit according to the embodiment of the present invention, the switch control sub-circuit may control the first power source terminal and the second power source terminal to turn off the level shift sub-circuit when detecting that the driving signal terminal does not have the driving signal input, that is, the first power source terminal cannot input the first power source signal to the level shift sub-circuit, and the second power source terminal cannot input the second power source signal to the level shift sub-circuit. Therefore, when no driving signal is input into the driving signal end, no static current can be generated in the level shift sub-circuit, and compared with the prior art that no matter whether the driving signal end has the driving signal input, the first power supply end and the second power supply end input power supply signals into the level shift sub-circuit. The display device has a good display effect.
Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 8, the display device AA may include: at least one level shifter circuit 01 as shown in fig. 1 and 3 to 6, a gate driver circuit 02, and a pixel unit (not shown in fig. 8).
IN the embodiment of the present invention, each driving signal terminal IN of the gate driving circuit 02 may be connected to an output terminal OUT of one level shifter circuit, and an output terminal of the gate driving circuit 02 may be connected to a pixel unit (not shown IN fig. 8). The first terminal of the level shifter 01 may be connected to the first power terminal VGH, the second terminal may be connected to the second power terminal VGL, and the third terminal of the level shifter 01 may be connected to the reference power terminal Vref and the driving signal terminal Vin.
The level shift circuit 01 can amplify the driving signal terminal Vin according to the first power signal provided by the first power terminal VGH and the second power signal provided by the second power terminal VGL, that is, the driving signal input to the driving signal terminal IN of the gate driving circuit 02 by the level shift circuit 01, so as to amplify the driving signal provided by the driving signal terminal Vin, so that the gate driving circuit 02 can operate under the amplified driving signal. For example, the gate driving circuit 02 may drive the pixel unit to emit light under the amplified driving signal.
IN order to adapt the level shifter circuit 01 to the gate driver circuits 02 having various configurations, the number of the level shifter circuits 01 IN the display device AA may be larger than the number of the driving signal terminals IN of the gate driver circuits 02. For example, as shown IN fig. 8, the number of the level shifter circuits 01 is 5, and the number of the driving signal terminals IN is 4. By the level shift circuit 01 provided by the embodiment of the present invention, when a certain level shift circuit 01 is not used, the first power source terminal VGH and the second power source terminal VGL are controlled not to input a power source signal to the level shift circuit 01, and accordingly, when the level shift circuit is not used, the level shift circuit does not generate a static current. Accordingly, the quiescent current of the level shifter circuit is reduced, the discharge time of the first power supply terminal and the second power supply terminal is prolonged relative to the related art, the residual charge can be effectively released within the prolonged time, and the cross striation phenomenon of the display screen of the display device due to the residual charge is improved.
In addition, the display device may be: the display device comprises any product or component with a display function, such as a liquid crystal panel, electronic paper, an OLED panel, an AMOLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working process of the level shift circuit described above may refer to the corresponding process in the foregoing method embodiment, and is not described herein again.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A level shift circuit, comprising: a level shift sub-circuit and a switch control sub-circuit;
the switch control sub-circuit is respectively connected with a driving signal end, a first power end, a second power end and the level shift sub-circuit, the switch control sub-circuit is used for controlling the first power end to be conducted with the first end of the level shift sub-circuit when a driving signal is input to the driving signal end, controlling the second power end to be conducted with the second end of the level shift sub-circuit and inputting the driving signal to the third end of the level shift sub-circuit, and the switch control sub-circuit is further used for controlling the first power end and the second power end to be turned off with the level shift sub-circuit when no driving signal is input to the driving signal end;
the level shift sub-circuit is further connected to an output terminal, and the level shift sub-circuit is configured to amplify the driving signal when being conducted with the first power source terminal and the second power source terminal, and input the amplified driving signal to the output terminal.
2. The circuit of claim 1, wherein the switch control sub-circuit comprises: the device comprises a detection module and a switch module;
the detection module is respectively connected with the driving signal end, the reference power end and the third end, and is used for detecting whether a signal provided by the driving signal end is the same as a reference power signal provided by the reference power end, when the signal provided by the driving signal end is the same as the reference power signal, the detection module determines that the driving signal end has a driving signal input, inputs the driving signal to the third end, and inputs an on signal to the switch module, and the detection module is further used for determining that the driving signal end has no driving signal input and inputs an off signal to the switch module when the signal provided by the driving signal end is different from the reference power signal, wherein the reference power signal is an input signal provided by the timing controller to the level transfer circuit;
the switch module is respectively connected with the first power end, the second power end, the first end, the second end and the third end, and is used for controlling the first power end to be conducted with the first end and the second end to be conducted when receiving the turn-on signal, and is also used for controlling the first power end, the second power end and the level transfer sub-circuit to be turned off when receiving the turn-off signal.
3. The circuit of claim 2, wherein the detection module comprises: an AND gate;
and the first input end of the AND gate is connected with the driving signal end, the second input end of the AND gate is connected with the reference power supply end, and the output end of the AND gate is connected with the third end.
4. The circuit of claim 3, wherein the detection module further comprises: a first resistor, a second resistor and a capacitor;
one end of the first resistor is connected with the reference power supply end, and the other end of the first resistor is connected with the first input end of the AND gate;
one end of the second resistor is connected with the first input end of the AND gate, and the other end of the second resistor is connected with a grounding end;
one end of the capacitor is connected with the reference power supply end, and the other end of the capacitor is connected with the grounding end.
5. The circuit of claim 3, wherein the detection module further comprises: a follower;
one end of the follower is connected with the third end, and the other end of the follower is connected with the switch module.
6. The circuit of claim 2, wherein the switch module comprises: the circuit comprises a first transistor, a second transistor, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor;
a gate of the first transistor is connected to the third terminal, a first electrode of the first transistor is connected to the first power supply terminal, and a second electrode of the first transistor is connected to the first terminal;
a gate of the second transistor is connected to the third terminal, a first electrode of the second transistor is connected to the second power supply terminal, and a second electrode of the second transistor is connected to the second terminal;
one end of the third resistor is connected with the first power supply end, and the other end of the third resistor is connected with the third end;
one end of the fourth resistor is connected with the first end, and the other end of the fourth resistor is connected with a grounding end;
one end of the fifth resistor is connected with the second power supply end, and the other end of the fifth resistor is connected with the third end;
one end of the sixth resistor is connected to the second end, and the other end of the sixth resistor is connected to the ground terminal.
7. The circuit of claim 6, wherein the switch module further comprises: a seventh resistor and an eighth resistor;
one end of the seventh resistor is connected with the third end, and the other end of the seventh resistor is connected with the grid electrode of the first transistor;
one end of the eighth resistor is connected with the third end, and the other end of the eighth resistor is connected with the grid electrode of the second transistor.
8. A driving method of a level shifter circuit, the method being applied to the level shifter circuit according to any one of claims 1 to 7, the level shifter circuit comprising: a level shift sub-circuit and a switch control sub-circuit; the method comprises the following steps:
the switch control sub-circuit detects whether a driving signal is input at a driving signal end;
when the switch control sub-circuit detects that a driving signal is input at the driving signal end, the switch control sub-circuit controls a first power end to be conducted with a first end of the level shift sub-circuit, controls a second power end to be conducted with a second end of the level shift sub-circuit, and inputs the driving signal to a third end of the level shift sub-circuit, and the level shift sub-circuit amplifies the driving signal and inputs the amplified driving signal to an output end under the control of a first power signal provided by the first power end and a second power signal provided by the second power end;
and when the switch control sub-circuit detects that no driving signal is input into the driving signal end, the first power end and the second power end and the level transfer sub-circuit are controlled to be switched off.
9. A display device, characterized in that the display device comprises: at least one level shifter circuit, gate driver circuit and pixel cell according to any one of claims 1 to 7;
each driving signal end of the grid driving circuit is connected with the output end of one level transfer circuit, and the output end of the grid driving circuit is connected with the pixel unit.
10. The display device according to claim 9, wherein the number of the level shift circuits in the display device is larger than the number of the driving signal terminals provided in the gate driver circuit.
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| CN201810862059.XA CN108962119B (en) | 2018-08-01 | 2018-08-01 | Level shift circuit, driving method thereof and display device |
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