CN108780420B - 在基于处理器的系统中的存储器中的经压缩存储器线的基于优先级的存取 - Google Patents

在基于处理器的系统中的存储器中的经压缩存储器线的基于优先级的存取 Download PDF

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CN108780420B
CN108780420B CN201780015368.7A CN201780015368A CN108780420B CN 108780420 B CN108780420 B CN 108780420B CN 201780015368 A CN201780015368 A CN 201780015368A CN 108780420 B CN108780420 B CN 108780420B
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memory
access request
compressed
lower priority
read access
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CN108780420A (zh
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A·A·奥波尔图斯瓦伦祖埃拉
A·安萨里
R·辛尼尔
N·根格
A·贾纳吉拉曼
G·S·查布拉
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Qualcomm Inc
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    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0611Improving I/O performance in relation to response time
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
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    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
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    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
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    • G06F3/0601Interfaces specially adapted for storage systems
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    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
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    • G06F3/0661Format or protocol conversion arrangements
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    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0662Virtualisation aspects
    • G06F3/0665Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • G06F2212/1044Space efficiency improvement
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1056Simplification
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/152Virtualized environment, e.g. logically partitioned system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40Specific encoding of data in memory or cache
    • G06F2212/401Compressed data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Detection And Correction Of Errors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
CN201780015368.7A 2016-03-18 2017-02-22 在基于处理器的系统中的存储器中的经压缩存储器线的基于优先级的存取 Active CN108780420B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/074,444 US9823854B2 (en) 2016-03-18 2016-03-18 Priority-based access of compressed memory lines in memory in a processor-based system
US15/074,444 2016-03-18
PCT/US2017/018876 WO2017160480A1 (en) 2016-03-18 2017-02-22 Priority-based access of compressed memory lines in memory in a processor-based system

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CN108780420A CN108780420A (zh) 2018-11-09
CN108780420B true CN108780420B (zh) 2022-05-03

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US (1) US9823854B2 (enExample)
EP (1) EP3430519B1 (enExample)
JP (1) JP6945544B2 (enExample)
KR (1) KR102780546B1 (enExample)
CN (1) CN108780420B (enExample)
CA (1) CA3014444A1 (enExample)
ES (1) ES2871123T3 (enExample)
TW (1) TWI644216B (enExample)
WO (1) WO2017160480A1 (enExample)

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US10437747B2 (en) * 2015-04-10 2019-10-08 Rambus Inc. Memory appliance couplings and operations
CN112083875B (zh) * 2019-06-12 2022-09-30 三星电子株式会社 用于在存储系统中减少读取端口并加速解压缩的方法
US11048413B2 (en) * 2019-06-12 2021-06-29 Samsung Electronics Co., Ltd. Method for reducing read ports and accelerating decompression in memory systems
JP7310462B2 (ja) * 2019-09-04 2023-07-19 富士通株式会社 ストレージ制御装置,分散ストレージシステムおよびストレージ制御プログラム
US11868244B2 (en) * 2022-01-10 2024-01-09 Qualcomm Incorporated Priority-based cache-line fitting in compressed memory systems of processor-based systems
US11829292B1 (en) 2022-01-10 2023-11-28 Qualcomm Incorporated Priority-based cache-line fitting in compressed memory systems of processor-based systems
KR102731761B1 (ko) * 2022-01-10 2024-11-20 퀄컴 인코포레이티드 프로세서 기반 시스템의 압축 메모리 시스템에서 우선순위 기반 캐시 라인 피팅
US12287740B2 (en) * 2023-06-07 2025-04-29 Dell Products L.P Data caching strategies for storage with ownership of logical address slices
CN120540577A (zh) * 2024-02-26 2025-08-26 杭州阿里云飞天信息技术有限公司 数据处理方法、装置、设备、存储介质及程序产品
GB2639633A (en) * 2024-03-20 2025-10-01 Advanced Risc Mach Ltd Interleaved memory transaction tracking for transactions with unrelated lengths

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TWI644216B (zh) 2018-12-11
EP3430519A1 (en) 2019-01-23
WO2017160480A1 (en) 2017-09-21
TW201734820A (zh) 2017-10-01
US20170269851A1 (en) 2017-09-21
US9823854B2 (en) 2017-11-21
EP3430519B1 (en) 2021-05-05
BR112018068611A2 (pt) 2019-02-05
KR102780546B1 (ko) 2025-03-11
KR20180122357A (ko) 2018-11-12
ES2871123T3 (es) 2021-10-28
JP6945544B2 (ja) 2021-10-06
CN108780420A (zh) 2018-11-09
JP2019512794A (ja) 2019-05-16
CA3014444A1 (en) 2017-09-21

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