BR112018068611A2 - acesso com base em prioridade de linhas de memória comprimidas em memória em um sistema com base em processador - Google Patents

acesso com base em prioridade de linhas de memória comprimidas em memória em um sistema com base em processador

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Publication number
BR112018068611A2
BR112018068611A2 BR112018068611A BR112018068611A BR112018068611A2 BR 112018068611 A2 BR112018068611 A2 BR 112018068611A2 BR 112018068611 A BR112018068611 A BR 112018068611A BR 112018068611 A BR112018068611 A BR 112018068611A BR 112018068611 A2 BR112018068611 A2 BR 112018068611A2
Authority
BR
Brazil
Prior art keywords
memory
priority
access
compressed
processor
Prior art date
Application number
BR112018068611A
Other languages
English (en)
Inventor
Ansari Amin
Janakiraman Anand
Alejandro Oportus Valenzuela Andres
Singh Chhabra Gurvinder
Geng Nieyan
Senior Richard
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112018068611A2 publication Critical patent/BR112018068611A2/pt

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0611Improving I/O performance in relation to response time
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284Multiple user address space allocation, e.g. using different base addresses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626Reducing size or complexity of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0661Format or protocol conversion arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0662Virtualisation aspects
    • G06F3/0665Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1041Resource optimization
    • G06F2212/1044Space efficiency improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1056Simplification
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/152Virtualized environment, e.g. logically partitioned system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40Specific encoding of data in memory or cache
    • G06F2212/401Compressed data
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

os aspectos descritos referem-se a um acesso com base em prioridade de linhas de memória comprimidas em um sistema com base em processador. em um aspecto, um dispositivo de acesso de memória no sistema com base em processador recebe uma solicitação de acesso de leitura para memória. se a solicitação de acesso de leitura for de prioridade mais alta, o dispositivo de acesso de memória usa o endereço de memória lógica da solicitação de acesso de leitura como o endereço de memória física para acessar a linha de memória comprimida. entretanto, se a solicitação de acesso de leitura for de prioridade menos alta, o dispositivo de acesso de memória translada o endereço de memória lógica da solicitação de acesso de leitura para um ou mais endereços de memória física no espaço de memória deixado pela compressão de linhas de prioridade mais alta. desta maneira, a eficácia dos acessos à memória comprimida de prioridade mais alta é aperfeiçoada através da remoção de um nível de indireção que é de outra forma solicitado para encontrar e acessar linhas de memória comprimidas.
BR112018068611A 2016-03-18 2017-02-22 acesso com base em prioridade de linhas de memória comprimidas em memória em um sistema com base em processador BR112018068611A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/074,444 US9823854B2 (en) 2016-03-18 2016-03-18 Priority-based access of compressed memory lines in memory in a processor-based system
PCT/US2017/018876 WO2017160480A1 (en) 2016-03-18 2017-02-22 Priority-based access of compressed memory lines in memory in a processor-based system

Publications (1)

Publication Number Publication Date
BR112018068611A2 true BR112018068611A2 (pt) 2019-02-05

Family

ID=58213373

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112018068611A BR112018068611A2 (pt) 2016-03-18 2017-02-22 acesso com base em prioridade de linhas de memória comprimidas em memória em um sistema com base em processador

Country Status (10)

Country Link
US (1) US9823854B2 (pt)
EP (1) EP3430519B1 (pt)
JP (1) JP6945544B2 (pt)
KR (1) KR20180122357A (pt)
CN (1) CN108780420B (pt)
BR (1) BR112018068611A2 (pt)
CA (1) CA3014444A1 (pt)
ES (1) ES2871123T3 (pt)
TW (1) TWI644216B (pt)
WO (1) WO2017160480A1 (pt)

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US11048413B2 (en) * 2019-06-12 2021-06-29 Samsung Electronics Co., Ltd. Method for reducing read ports and accelerating decompression in memory systems
CN112083875B (zh) * 2019-06-12 2022-09-30 三星电子株式会社 用于在存储系统中减少读取端口并加速解压缩的方法
JP7310462B2 (ja) * 2019-09-04 2023-07-19 富士通株式会社 ストレージ制御装置,分散ストレージシステムおよびストレージ制御プログラム
US11868244B2 (en) * 2022-01-10 2024-01-09 Qualcomm Incorporated Priority-based cache-line fitting in compressed memory systems of processor-based systems
US11829292B1 (en) 2022-01-10 2023-11-28 Qualcomm Incorporated Priority-based cache-line fitting in compressed memory systems of processor-based systems
WO2023133019A1 (en) * 2022-01-10 2023-07-13 Qualcomm Incorporated Priority-based cache-line fitting in compressed memory systems of processor-based systems

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Also Published As

Publication number Publication date
US20170269851A1 (en) 2017-09-21
KR20180122357A (ko) 2018-11-12
TW201734820A (zh) 2017-10-01
JP6945544B2 (ja) 2021-10-06
US9823854B2 (en) 2017-11-21
EP3430519B1 (en) 2021-05-05
CA3014444A1 (en) 2017-09-21
WO2017160480A1 (en) 2017-09-21
CN108780420B (zh) 2022-05-03
EP3430519A1 (en) 2019-01-23
TWI644216B (zh) 2018-12-11
CN108780420A (zh) 2018-11-09
JP2019512794A (ja) 2019-05-16
ES2871123T3 (es) 2021-10-28

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