Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiment is only a part of the embodiment of the present invention, instead of all the embodiments.Based on this
Embodiment in invention, the every other reality that those of ordinary skill in the art are obtained without creative efforts
Example is applied, shall fall within the protection scope of the present invention.
Differential pressure pressure sensor includes three sensitivity, the linearity and reliability performance indicators.Sensitivity refers to differential pressure pressure
Force snesor changes △ y to the ratio of input quantity variation △ x in steady operation output quantity, i.e., output quantity is to inputting quantitative change
The sensitivity of change, when pressure-sensitive film is thinner, the deformation after stress is bigger, i.e. differential pressure pressure sensor is sensitiveer, it is seen that spirit
The thickness of sensitivity and pressure-sensitive film is inversely proportional.The linearity refers to the output quantity y of differential pressure pressure sensor in working pressure range
The maximum deviation of linear relation between input quantity x, when pressure-sensitive film is too thin, stress and apply pressure that pressure-sensitive film generates
To be no longer in a linear relationship, i.e. pressure-sensitive film is thinner, and the linearity is poorer, it is seen that the thickness of the linearity and pressure-sensitive film is directly proportional.
Reliability refers within a certain period of time, trouble-freely executes the ability or possibility for specifying function, pressure-sensitive film under certain condition
Thickness it is bigger, be less susceptible to rupture, reliability is higher, it is seen that the thickness of reliability and pressure-sensitive film is directly proportional.
Fig. 1 show the flow chart of the preparation method of the differential pressure pressure sensor of one embodiment of the invention offer.The preparation
Method is particularly suitable for preparing differential pressure pressure sensor, it can be seen from the figure that the preparation method of the differential pressure pressure sensor
100 include:
Step S101 prepares the insulator wafer with cavity, and the insulator wafer with cavity includes being sequentially stacked
Device layer, oxide layer and substrate layer include the annular housing being located in substrate layer between substrate layer and oxide layer.
Step S102 prepares varistor on the surface of device layer.
Step S103 etches away portions of substrate layer within the scope of the orthographic projection of annular housing to exposing annular housing.
In one embodiment, the preparation method of differential pressure pressure sensor as shown in Figure 1, further comprises:
Step S104 forms the second convex island in the second groove of surface etch of device layer, and varistor is located at the second convex island
On.
Step S105 etches away remaining substrate layer and oxide layer within the scope of the orthographic projection of annular housing, until exposing device
Layer.
The preparation method of differential pressure pressure sensor provided by the invention is specifically described below in conjunction with the accompanying drawings.
Fig. 2 a~Fig. 2 i are shown in the preparation process of the insulator wafer with cavity of one embodiment of the invention offer
The schematic cross-section of obtained device architecture.
The first step prepares band island wafer as shown in Figure 2 e, which includes groove 203 and surrounded by groove 203
Convex island 204.
Specifically, referring initially to Fig. 2 a, wafer 10 is provided, which includes upper and lower two surfaces, i.e. first surface
And second surface.
Wafer, that is, silicon wafer, generally circular laminated structure, surface can be with the various circuit elements of processing and fabricating, and then shape
At silicon semiconductor integrated circuit.
Referring next to Fig. 2 b, first surface and second surface to wafer 10 carry out thermal oxide and are respectively formed the first titanium dioxide
Silicon layer 201 and the second silicon dioxide layer 202.
First silicon dioxide layer 201 plays the role of mask in the subsequent process, and the second silicon dioxide layer 202 is for preventing
The lower surface of wafer 10 is scratched.Certainly, if external mechanical damage influences to ignore caused by the lower surface of wafer 10
If, can also thermal oxide only be carried out to first surface and form the first silicon dioxide layer 201.
First silicon dioxide layer 201 and 1 microns are generally with the thickness of the second silicon dioxide layer 202, but is not limited to
This,
Referring next to Fig. 2 c and Fig. 2 d, Fig. 2 d be Fig. 2 c shown in device architecture vertical view, using photoetching process or wait from
Daughter etching technics is etched down to from the surface of the first silicon dioxide layer 201 inside wafer 10, forms the first groove of annular
203, then dry etching or wet-etching technology is used to etch away remaining first silicon dioxide layer 201.
First groove 203 can be any regular or irregular annular groove, such as rectangle ring groove or ring groove.
So far, band island wafer 20 as shown in Figure 2 e is obtained, which includes front and back, with island wafer
Front includes the first groove 203 and the first convex island 204 surrounded by the first groove 203.Specifically, the islands the present embodiment Zhong Dai
Wafer includes stacked above and below silicon substrate 205 and the second silicon dioxide layer 202, wherein the surface of silicon substrate 205 includes first
Groove 203 and the first convex island 204 surrounded by the first groove 203.
Second step provides insulator wafer, and the front of the insulator wafer includes the first silicon layer.
Fig. 2 f show the structural schematic diagram of the insulator wafer of one embodiment of the invention offer.Insulator wafer 30 is profit
With substrate is engineered made of silicon on insulator (Silicon-On-Insulator, SOI) technology, i.e., two layers silicon substrate it
Between enclose the oxide layer of an insulation, such as silicon dioxide layer, to form being sequentially stacked from top to bottom as shown in figure 2f
303 structure of first silicon layer 301, oxide layer 302 and the second silicon layer is used for wherein the thickness of the first silicon layer 301 can accurately control
Circuit structure is formed, preferably 5~15 microns in the present embodiment, the surface of the first silicon layer 301 is usually as insulator wafer 30
Front, the back side of the surface of the second silicon layer 303 usually as insulator wafer.
Third walks, and the front of insulator wafer and the front with island wafer are bonded.
Specifically, referring initially to Fig. 2 g, hot oxygen is carried out respectively to the upper and lower surface of insulator wafer 30 shown in Fig. 2 f
Change forms third silicon dioxide layer 401 and the 4th silicon dioxide layer 402.
Third silicon dioxide layer 401 is used for the bonding process in subsequent technique, and the 4th silicon dioxide layer 402 is for preventing from serving as a contrast
The surface of bottom 401 is scratched.Certainly, if influenced caused by the lower surface of insulator wafer 30 can be with for external mechanical damage
If ignoring, can also thermal oxide only be carried out to upper surface and form third silicon dioxide layer 401.
The thickness of third silicon dioxide layer 401 and the 4th silicon dioxide layer 402 is generally hundreds of nanometers, but not limited to this.
Referring next to Fig. 2 h, the insulator wafer 30 after thermal oxide shown in Fig. 2 g is inverted above and below makes its back side upward,
Front with island wafer 20 shown in the back side of insulator wafer 30 after thermal oxide and Fig. 2 e is subjected to titanium dioxide silicon-silicon bond
It closes, the open top of groove 203 circularizes cavity 206 by 401 enclosed shape of third silicon dioxide layer.
4th step is etched down to the first silicon layer 301 for exposing insulator wafer from the back side of insulator wafer.
Refering to Fig. 2 h, chemical mechanical grinding is carried out to the second silicon for exposing insulator wafer to the 4th silicon dioxide layer 402
Layer 303;Then tetramethyl ammonium hydroxide solution is used to erode the second silicon layer 303 to the oxide layer 302 for exposing insulator wafer;
Hydrofluoric acid solution wet etching is finally used to fall oxide layer 302 to the first silicon layer 301 for exposing insulator wafer, such as Fig. 2 i institutes
Show.
It will be understood by those skilled in the art that when not carrying out hot oxygen to the lower surface of insulator wafer 30 in step S103
When changing four silicon dioxide layer 402 of formation, it can be omitted in step S104 and chemical machinery carried out to the 4th silicon dioxide layer 402
Be ground to expose the second silicon layer 303 process, but directly using tetramethyl ammonium hydroxide solution erode the second silicon layer 303 to
Expose the oxide layer 302 of insulator wafer;Then it is brilliant to insulator is exposed oxide layer 302 to be fallen using hydrofluoric acid solution wet etching
The first round silicon layer 301.
So far, the insulator wafer 40 with cavity as shown in fig. 2i is formed.This carries the insulator wafer 40 of cavity
Including device layer 402, oxide layer 403, substrate layer 404, the protective layer 405 being sequentially stacked, wherein oxide layer 403 and substrate layer
Include the annular compartment 406 being located in substrate layer 404, the thickness controllable precise of device layer 402 between 404.
Insulator wafer of the utilization with cavity that Fig. 3 a- Fig. 3 e show one embodiment of the invention offer prepares differential pressure pressure
Device architecture schematic diagram during force snesor.
The first step, according to step S102, in the device layer 402 of the insulator wafer 40 with cavity as shown in fig. 2i
Surface prepares varistor.
Refering to Fig. 3 a, in the heavily doped region 502 that the surface of device layer 402 forms lightly doped district 501 and contacts.This is light
Doped region 501 is used as varistor, and heavily doped region 502 is used as drawing the conducting wire of the resistance value in varistor.
The formation lightly doped district 501 and the process of the heavily doped region 502 contacted therewith include:First to device layer 402
Upper surface carry out photoetching corrosion formation and wait for doped region, including wait for heavily doped region and waiting for lightly doped region, then use from
Sub- injection technology treats heavily doped region and carries out heavy doping respectively, treats lightly doped region and is lightly doped.It just forms in this way
The heavily doped region 502 used as conducting wire and the lightly doped district 501 used as varistor.
In one embodiment, step S102 can further include the Wheatstone bridge that preparation includes varistor.
Specifically, referring initially to Fig. 3 b, using depositing operation in device layer 402, lightly doped district 501 and heavily doped region
502 surface prepares insulation composite 503.
Insulation composite 503 as shown in Figure 3b includes the first silicon dioxide layer being sequentially stacked from top to bottom, silicon nitride
Layer and the second silicon dioxide layer.In other embodiments, insulation composite can also only include the first silicon dioxide layer and shallow lake
Silicon nitride layer of the product in the first silicon dioxide layer upper surface.The thickness ratio of each film layer is to reach stress equilibrium in insulation composite
Subject to state.
Referring next to Fig. 3 c, prepares metal line and form wheatstone bridge configuration.
For example, being formed through exhausted in the upper surface of insulation composite 503 using photoetching corrosion or anisotropic etch process
Edge composite layer 503 and the through hole contacted with heavily doped region 502 in through hole, the upper surface of insulation composite 503, penetrate through
Metal is deposited around hole, to form the pressure welding point 504 that is contacted with heavily doped region 502, pressure welding point 504 by with heavily doped region
502 contact to draw the resistance signal in the lightly doped district 501 as varistor, using pressure welding point 504 as varistor
Connection terminal build wheatstone bridge configuration.
Second step within the scope of the orthographic projection of annular housing 406, is carried out according to step S103 from the surface of protective layer 405
It is etched to and exposes annular housing 406.
Referring initially to Fig. 3 d, the orthographic projection range of annular housing 406 is etched away using photoetching or plasma etch process
Interior protective layer 405 to expose substrate layer 404.
Referring next to Fig. 3 e, mask is made with remaining protective layer 405, using deep reaction ion etching or plasma etching
Technique, etch away sections substrate layer 404 to exposing annular housing 406.
It will be appreciated by those skilled in the art that when not carrying out thermal oxide shape to the second surface of wafer 10 in step S101
When at the second silicon dioxide layer 202 (i.e. protective layer 405), step S103 may include using deep reaction ion etching or plasma
Body etching technics etches away the portions of substrate layer 404 within the scope of the orthographic projection of annular housing 406, until exposing annular housing 406.
So far, differential pressure pressure sensor 50 as shown in Figure 3 e is obtained, device layer 402 forms the differential pressure pressure sensor
The lower surface of 50 pressure-sensitive film 505, pressure-sensitive film 505 is fixedly connected with convex island 506 by oxide layer 403, the thickness on the convex island 506
Preferably 20~50 microns of degree, with the heavy burden ability of the ironed film of satisfaction 505.
According to the preparation method of differential pressure pressure sensor 50 provided by the invention, generated when 505 stress of pressure-sensitive film is bent
Stress when being concentrated to middle part increase pressure-sensitive film 506, convex island since the lower section of pressure-sensitive film 505 includes convex island 506
The thickness for setting place, to improve the linearity and reliability of differential pressure pressure sensor.In addition, the thickness of pressure-sensitive film 505 takes
The thickness of first silicon layer 301 certainly in insulator wafer 30, due to the thickness controllable precise of the first silicon layer 301 so that using together
The consistency of thickness of one insulator wafer or the pressure-sensitive film in multiple differential pressure pressure sensors of different insulative body wafer production, i.e.,
The sensitivity of the differential pressure pressure sensor of batch production is consistent.
Insulator wafer of the utilization with cavity that Fig. 4 a- Fig. 4 b show one embodiment of the invention offer prepares differential pressure pressure
Device architecture schematic diagram in the preparation process of force snesor.According to provided in this embodiment brilliant using the insulator with cavity
Preparation process differs only in second step shown in the preparation process and Fig. 3 a- Fig. 3 e of circle preparation differential pressure pressure sensor.
Second step in the present embodiment is included in the orthographic projection range of annular housing 406 according to step S103 refering to Fig. 3 c
It is interior, it performs etching to device layer 402 is exposed, is formed in the surface etch groove of device layer 402 convex from the surface of protective layer 405
Island, varistor are located on convex island, as shown in Figure 4.
Specifically, referring initially to Fig. 3 c, annular housing 406 is being etched away just using photoetching or plasma etch process
Protective layer 405 in drop shadow spread is to exposing substrate layer 404;Make mask with remaining protective layer 405, is carved using deep reactive ion
Erosion or plasma etch process, etch away sections substrate layer 404 to exposing annular housing 406;Using BOE wet corrosion techniques
406 islands Nei Tu of annular housing, oxide layer 403 are eroded to device layer 402 is exposed, obtains structure shown in Fig. 4 a.
Then Fig. 4 b are combined, using photoetching or plasma etch process, in the front insulation composite of device layer 402
Region etch groove 601 to 402 inside of device layer that varistor is avoided on 503 forms convex island 602, and varistor is made to be located at
On convex island 602.
Groove 601 in the present embodiment includes four sub- grooves, to form the convex island of cross 602.In other embodiment
In, convex island 602 can also be the convex island of the other shapes such as rectangle or circle, and in this case, groove 601 should be according to be formed
Convex island shape Rational choice.
So far, differential pressure pressure sensor 60 as shown in Figure 4 b is obtained, the upper surface of pressure-sensitive film 603 is fixedly connected with convex island
602, preferably 5~10 microns of the thickness on the convex island 602, with the heavy burden ability of the ironed film of satisfaction.
In one embodiment, the surface area of groove 601 is more than the surface area on convex island 602.It can drop as much as possible in this way
The heavy burden of low pressure-sensitive film 603.
According to the preparation method of differential pressure pressure sensor 60 provided by the invention, since the top of pressure-sensitive film includes convex island
602, increase thickness of the pressure-sensitive film at 602 position of convex island, to improve differential pressure pressure sensor the linearity and can
By property.In addition, being located at pressure-sensitive film according to the convex island that the preparation method of differential pressure pressure sensor provided in this embodiment is formed
Top is compared with preparation method shown in Fig. 3 a~Fig. 3 e, can reduce the thickness of pressure-sensitive film, is suitable for preparing more small-range
Differential pressure pressure sensor.
It should be appreciated that determiner " first ", " second ", " third " and " the 4th " used in description of the embodiment of the present invention
Etc. being only used for more clearly illustrating technical solution, can not be used to limit the scope of the invention.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention
Within god and principle, made by any modification, equivalent replacement etc., should all be included in the protection scope of the present invention.