CN101604069B - Manufacturing process of three-layer continuous surface type MEMS deformable mirror based on bonding process - Google Patents
Manufacturing process of three-layer continuous surface type MEMS deformable mirror based on bonding process Download PDFInfo
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- CN101604069B CN101604069B CN2009100892559A CN200910089255A CN101604069B CN 101604069 B CN101604069 B CN 101604069B CN 2009100892559 A CN2009100892559 A CN 2009100892559A CN 200910089255 A CN200910089255 A CN 200910089255A CN 101604069 B CN101604069 B CN 101604069B
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- 238000000034 method Methods 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 52
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 52
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 40
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 35
- 239000010703 silicon Substances 0.000 claims abstract description 35
- 238000001312 dry etching Methods 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000001039 wet etching Methods 0.000 claims abstract description 25
- 239000011521 glass Substances 0.000 claims abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 74
- 239000000377 silicon dioxide Substances 0.000 claims description 37
- 235000012239 silicon dioxide Nutrition 0.000 claims description 35
- 238000005530 etching Methods 0.000 claims description 26
- 238000001259 photo etching Methods 0.000 claims description 20
- 238000005516 engineering process Methods 0.000 claims description 10
- 230000003068 static effect Effects 0.000 claims description 9
- 230000000694 effects Effects 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- 229920005591 polysilicon Polymers 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 230000004927 fusion Effects 0.000 claims description 2
- 230000003044 adaptive effect Effects 0.000 abstract description 5
- 238000000151 deposition Methods 0.000 abstract description 3
- 238000006073 displacement reaction Methods 0.000 abstract description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 2
- 239000002184 metal Substances 0.000 abstract description 2
- 238000005459 micromachining Methods 0.000 abstract 3
- 238000004891 communication Methods 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 238000003754 machining Methods 0.000 abstract 1
- 230000003287 optical effect Effects 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 15
- 241000219739 Lens Species 0.000 description 14
- 210000000695 crystalline len Anatomy 0.000 description 14
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 10
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 7
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
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Abstract
A process for preparing three-layer continuous surface type MEMS deformable mirror based on bonding technique includes such steps as dry etching to form release hole on the upper surface of SOI wafer, partially releasing the oxide layer in the middle of SOI wafer, wet etching the lower surface of SOI wafer, depositing metal on another substrate (silicon wafer or glass) as electrode structure, and bonding the substrate with SOI wafer. The method is characterized in that a bulk silicon micromachining process and a surface micromachining process are combined, and an upper two-layer structure obtained by machining the bulk silicon process and a lower electrode structure layer obtained by adopting the surface micromachining process are bonded to obtain a three-layer micromechanical structure. The invention relates to a three-layer continuous surface type MEMS deformable mirror based on a bonding process, which has relatively easy manufacturing process, solves the problem that the traditional continuous surface micro mechanical deformable mirror has large difficulty in micro processing of three layers of surfaces, can obtain large out-of-plane displacement, eliminates the defect of short circuit caused by electrostatic pull-in by adding a silicon nitride insulating layer, and can be widely applied to the fields of optical communication and adaptive optics.
Description
Technical field
The present invention relates to the Micro-Opto-Electro-Mechanical Systems technical field, particularly a kind of manufacture craft that is applicable to ADAPTIVE OPTICS SYSTEMS based on the three-layer continuous surface type MEMS deformable mirror of bonding technology.
Background technology
In the adaptive optics field, the MEMS distorting lens of static driven has that volume is little, low in energy consumption, and response speed is fast, can produce in batches, with the compatible advantage such as good of integrated circuit, thereby enjoys favor in ADAPTIVE OPTICS SYSTEMS.Existing electrostatic drive MEMS distorting lens generally all is to adopt surperficial micro-processing technology to process, and difficulty of processing is bigger; And obtain big stroke, for example greater than 4 microns stroke, because static is drawn in the influence of effect, the stroke of driver can not surpass 1/3rd of initial polar plate spacing, and the thickness that just needs sacrifice layer is greater than 10 microns, and difficulty of processing is bigger.By adopting manufacture craft based on the three-layer continuous surface type MEMS deformable mirror of bonding technology, the difficulty of the distorting lens of feasible processing continuous surface type reduces, process the distorting lens of big stroke easily, and this technology has added one deck silicon nitride film between last bottom crown, avoided static to draw in infringement to the device short circuit, and owing to be continuous type, fill factor, curve factor is near 100%.
Summary of the invention
The technical problem to be solved in the present invention is: at the deficiencies in the prior art, designed a kind of manufacture craft of the three-layer continuous surface type MEMS deformable mirror based on bonding technology, process is simple relatively, also is easy to process big stroke continuous surface type distorting lens, and fill factor, curve factor can reach near 100%.
The technical solution adopted for the present invention to solve the technical problems is: a kind of manufacture craft of the three-layer continuous surface type MEMS deformable mirror based on bonding technology, body silicon process technology and surperficial micro fabrication are combined, be about to bulk silicon technological upper two layers that processes and the lower electrode arrangement layer that processes with surface treatment bonding mutually, thereby obtain three layers of micro mechanical structure.
Specifically constitute by following technological process:
(1) gets glass or silicon chip as substrate;
(2) photoetching and etching form 0.3～2.0 micron dark groove in substrate;
(3) polysilicon or the amorphous silicon or the metallic film of deposition 0.3～2.0 micron thickness, photoetching and etching then, etching depth equals the thickness of this layer film, forms the bottom electrode and the lead-in wire of distorting lens;
(4) deposit thickness is 0.1～1.0 micron a silicon nitride film, photoetching and etching then, and etching depth equals the thickness of this layer film, makes silicon nitride or silicon dioxide layer that bottom electrode is covered, thereby avoids static to draw in effect causes short circuit to device infringement;
(5) get a SOI wafer, the silicon structure layer thickness of wafer is 0.3～20.0 micron, oxidated layer thickness is 0.3～10 micron, substrate thickness is 300～1000 microns, perhaps in the oxide layer of 0.3～10 micron of upper surface thermal oxide one bed thickness of thick 300～1000 microns common silicon chip, be thinned to 0.3～20 micron thickness at silicon chip of oxide layer upper surface bonding and with this piece silicon chip with machinery or chemical method then and it is polished;
(6) the wafer upper and lower surface that step (5) is obtained all deposits two-layer silicon dioxide and two-layer silicon nitride, and order is silicon dioxide → silicon nitride → silicon dioxide → silicon nitride, for follow-up wet etching or dry etching are prepared;
(7) the structure lower surface that step (6) is obtained carries out Twi-lithography and etching, forms step-like structure, for follow-up wet etching is prepared;
(8) step-like silicon nitride and the silicon dioxide that obtains with step (7) is that mask carries out wet method or dry etching silicon base, and 12～52 microns places of upper surface that are etched to apart from substrate stop;
(9) wet method or dry etching fall one deck silicon nitride and silicon dioxide then, carry out wet method or dry etching silicon base with residual silicon nitride and silicon dioxide as mask, and the degree of depth is 10～50 microns;
(10) upper and lower surface remaining silica and silicon nitride are removed with wet method or dry etching;
(11) lower surface with the structure that obtains in the upper surface of the structure that obtains in the step (3) and the step (10) carries out fusion bonding or anode linkage or low-temperature bonding;
(12) upper surface to the structure that obtains in the step (10) carries out photoetching and etching, forms release aperture, then the oxide layer below the release aperture is discharged, and only keeps the connector that ground floor is connected with the second layer.
The present invention's advantage compared with prior art is: the present invention mainly carries out dry etching in the SOI upper wafer surface and goes out release aperture, the partial oxidation layer is discharged, the lower surface wet etching also processes electrode structure and two wafer is carried out bonding on another piece wafer, the processing of body silicon and surperficial little processing are combined, with body silicon processing upper two layers then the little bottom electrode that processes of bonding lower surface obtain three layers of physical construction, solved traditional continuous surface micromechanics distorting lens by the big shortcoming of the little processing difficulty of processing of three laminar surfaces, and polar plate spacing can be accomplished above 20 microns about the distorting lens that processes, can obtain big acoplanarity displacement, also eliminate the influence that static is drawn in, can be widely used in the adaptive optics field by adding silicon nitride dielectric layer.
Description of drawings
Fig. 1 is the realization flow figure of the inventive method;
Fig. 2 is glass or silicon base stereographic map among the present invention;
Fig. 3 is the stereographic map after substrate etching groove among the present invention;
Fig. 4 is the structural drawing after plated metal or polysilicon or amorphous silicon and the etching in the above among the present invention;
Fig. 5 is the structural drawing after deposited silicon nitride and the etching in the above among the present invention;
Fig. 6 polishes with mechanical or chemical method attenuate and with it at silicon chip of oxide layer upper surface bonding and with this piece silicon chip then for another piece SOI wafer among the present invention or with common silicon chip upper surface thermal oxide layer of oxide layer;
Fig. 7 deposits the upward view of 2 layers of silicon dioxide and two-layer silicon nitride for the wafer upper and lower surface that Fig. 6 is obtained;
Fig. 8 is the structural representation of looking up of the mask of processing wet method or dry etching among the present invention;
Fig. 9 is for carrying out wet method or dry etching among the present invention, and 12～52 microns places of upper surface that etch into apart from substrate stop face upwarding assumption diagram;
Figure 10 falls one deck silicon nitride and silicon dioxide among the present invention with wet method or dry etching, carries out a wet method or a dry etching again and etches away residual silicon nitride and the silicon dioxide face upwarding assumption diagram;
Figure 11 a is the preceding top double-layer structure stereographic map of bonding among the present invention;
Figure 11 b is the stereographic map of the preceding following one deck structure of bonding among the present invention;
Figure 11 c for bonding among the present invention after AA
1Cut-open view.
Among the figure: 1 is first substrate, and 2 is contact conductor, and 3 is bottom electrode, 4 for covering the silicon nitride of bottom electrode, and 5 are the structural sheet as minute surface, and 6 is oxide layer, 7 is second substrate, and 8 is silicon nitride, and 9 is silicon dioxide, 10 for etching the silicon nitride of figure as wet method or dry etching mask, 11 top electrodes that go out for wet etching, 12 connectors when being bonding, 13 release aperture, 14 is the slab beam structure, and 15 for connecting the connector of minute surface and driving beam.
Specific embodiment
Introduce the present invention in detail below in conjunction with the drawings and the specific embodiments.But following embodiment only limits to explain the present invention, and protection scope of the present invention should comprise the full content of claim, and promptly can realize the full content of claim of the present invention by following examples those skilled in the art.
Manufacturing process with 3 * 3 unit three-layer continuous surface shape micromechanics distorting lenss is example, in conjunction with the accompanying drawings the present invention is described specifically, and concrete steps as shown in Figure 1.
1. 5 inches Pyrex7740 glass getting one 500 micron thickness are as first substrate 1, as shown in Figure 2.
2. also go out 0.5 micron dark groove with first mask photoetching, for the deposition bottom electrode is prepared, as shown in Figure 3 with the buffered hydrofluoric acid wet etching.
3. at the gold of substrate of glass upper surface evaporation 0.5 micron thickness, photoetching and dry etching then, etching depth is 0.5 micron, forms the bottom electrode 3 and the lead-in wire 2 of distorting lens, as shown in Figure 4.
4. with the PECVD deposit thickness 0.5 micron silicon nitride film 4, photoetching and dry etching then, etching depth equals the thickness of this layer film, makes silicon nitride that bottom electrode is covered, thereby avoid static to draw in effect device is caused the infringement of short circuit, as shown in Figure 5.
5. in the oxide layer 6 of (100) 3 grades of twin polishing Mike Si silicon chips of 4 inches thick 400 microns N types as 3 microns of upper surface thermal oxide one bed thickness of second substrate 7, be thinned to 3 micron thickness at same silicon chip of oxide layer upper surface bonding and with this piece silicon chip with machinery or chemical method then and with it with CMP polishing structural sheet, as shown in Figure 6 as minute surface.
6. the wafer upper and lower surface that previous step is obtained all deposits silicon dioxide 9 and the two-layer silicon nitride 8 that 2 layer thicknesses all are 300nm with PECVD, order is silicon dioxide → silicon nitride → silicon dioxide → silicon nitride, for follow-up wet etching or substrate are prepared, as shown in Figure 7.
7. the structure lower surface that previous step is obtained carries out Twi-lithography and twice dry etching, forms step-like structure 10, for follow-up wet etching substrate is prepared, as shown in Figure 8.
8. step-like silicon nitride that obtains with previous step and silicon dioxide are mask with 50% potassium hydroxide solution wet etching silicon base, and the 20 microns places of upper surface that are etched to apart from substrate stop, and form top electrode 11, as shown in Figure 9
9. dry etching falls one deck silicon nitride and silicon dioxide then, make mask with 50% potassium hydroxide solution wet etching silicon base with residual silicon nitride and silicon dioxide, etching depth is 10 microns, connector 12 and driver film 14 when forming bonding, as shown in figure 10
10. the lower surface that obtains structure in the upper surface of the structure that obtains in the step 3 and the step 9 is carried out anode linkage, condition is 500V voltage, standard atmospheric pressure and 300 degrees centigrade, then in the upper surface photoetching and use SF
6Dry etching release aperture 13 discharges the oxide layer below the release aperture with the buffered hydrofluoric acid wet etching again, only keeps the connector 15 that ground floor is connected with the second layer, and the structure that obtains as shown in figure 11.
Manufacturing process with 7 * 7 unit three-layer continuous surface shape micromechanics distorting lenss is example, in conjunction with the accompanying drawings the present invention is described specifically, and concrete steps as shown in Figure 1.
1. 5 inches healthy and free from worry 7070 glass getting one 1000 micron thickness are as first substrate 1, as shown in Figure 2.
2. also go out 2 microns dark grooves with first mask photoetching, prepare for laying bottom electrode, as shown in Figure 3 with the buffered hydrofluoric acid wet etching.
3. at the gold of upper surface of substrate evaporation 2.0 micron thickness, photoetching and dry etching then, etching depth is 2 microns, forms the bottom electrode 3 and the lead-in wire 2 of distorting lens, as shown in Figure 4.
4. with the LPCVD deposit thickness 1 micron silicon nitride film 4, photoetching and dry etching then, etching depth equals the thickness of this layer film, makes silicon nitride that bottom electrode is covered, thereby avoid static to draw in effect device is caused the infringement of short circuit, as shown in Figure 5.
5. get 4 inches SOI wafers, silicon structure layer 5 thickness of wafer are 20 microns, and oxide layer 6 thickness are 10 microns, and second substrate, 7 thickness are 1000 microns, as shown in Figure 6.
6. the wafer upper and lower surface that previous step is obtained all deposits 2 layer thicknesses all deposit 600nm with LPCVD silicon dioxide 9 and two-layer silicon nitride 8, order is silicon dioxide → silicon nitride → silicon dioxide → silicon nitride, for follow-up wet etching substrate is prepared, as shown in Figure 7.
7. the structure lower surface that previous step is obtained carries out Twi-lithography and twice dry etching, forms step-like structure 10, for follow-up wet etching substrate is prepared, as shown in Figure 8.
8. step-like silicon nitride that obtains with previous step and silicon dioxide are mask with 50% potassium hydroxide solution wet etching silicon base, and the 52 microns places of upper surface that are etched to apart from substrate stop, and form top electrode 11, as shown in Figure 9
9. dry etching falls one deck silicon nitride and silicon dioxide then, makes mask with 50% potassium hydroxide solution wet etching silicon base with residual silicon nitride and silicon dioxide, and the degree of depth is 50 microns, connector 12 and driver film 14 when forming bonding, as shown in figure 10
10. the lower surface that obtains structure in the upper surface of the structure that obtains in the step 3 and the step 9 is carried out anode linkage, condition is an air pressure under 1000V, 500 degrees centigrade and the standard, then photoetching and use SF
6Dry etching release aperture 13 discharges the oxide layer below the release aperture with the buffered hydrofluoric acid wet etching again, only keeps the connector 15 that ground floor is connected with the second layer, and the structure that obtains as shown in figure 11.
Manufacturing process with 10 * 10 unit three-layer continuous surface shape micromechanics distorting lenss is example, in conjunction with the accompanying drawings the present invention is described specifically, and concrete steps as shown in Figure 1.
1. 4 inches N types (100) twin polishing Mike Si silicon chip of getting one 300 micron thickness is as first substrate 1, and resistivity is 10
5～2 * 10
5Ω cm, as shown in Figure 2.
2. also go out 0.1 micron dark groove with first mask photoetching, prepare for laying bottom electrode, as shown in Figure 3 with 50% potassium hydroxide solution wet etching.
3. deposit the polysilicon of 0.1 micron thickness with LPCVD, photoetching and dry etching then, etching depth is 0.1 micron, forms the bottom electrode 3 and the lead-in wire 2 of distorting lens, as shown in Figure 4.
4. with the LPCVD deposit thickness 0.1 micron silicon nitride film 4, photoetching and etching then, etching depth equals the thickness of this layer film, makes silicon nitride that bottom electrode is covered, thereby avoid static to draw in effect device is caused the infringement of short circuit, as shown in Figure 5.
5. get 4 inches SOI wafers, silicon structure layer 5 thickness of wafer are 0.3 micron, and oxide layer 6 thickness are 0.3 micron, and second substrate, 7 thickness are 300 microns, as shown in Figure 6.
6. the wafer upper and lower surface that previous step is obtained all deposits silicon dioxide 9 and the two-layer silicon nitride 8 that 2 layer thicknesses all are 800nm with PECVD, order is silicon dioxide → silicon nitride → silicon dioxide → silicon nitride, for follow-up wet etching or dry etching are prepared, as shown in Figure 7.
7. the structure lower surface that previous step is obtained carries out Twi-lithography and twice dry etching, forms step-like structure 10, for follow-up wet etching substrate is prepared, as shown in Figure 8.
8. step-like silicon nitride that obtains with previous step and silicon dioxide are mask with 50% potassium hydroxide solution wet etching silicon base, and the 32 microns places of upper surface that are etched to apart from substrate stop, and form top electrode 11, as shown in Figure 9
9. dry etching falls one deck silicon nitride and silicon dioxide then, makes mask with 50% potassium hydroxide solution wet etching silicon base with residual silicon nitride and silicon dioxide, and the degree of depth is 12 microns, connector 12 and driver film 14 when forming bonding, as shown in figure 10
10. the lower surface that obtains structure in the upper surface of the structure that obtains in the step 3 and the step 9 is carried out anode linkage, condition is an air pressure under 600V, 1000 degrees centigrade and the standard, then photoetching and use SF
6The dry etching release aperture discharges the oxide layer below the release aperture with the buffered hydrofluoric acid wet etching again, only keeps the connector that ground floor is connected with the second layer, and the structure that obtains as shown in figure 11.
Claims (1)
1. manufacture craft based on the three-layer continuous surface type MEMS deformable mirror of bonding technology is characterized in that step is as follows:
(1) gets glass or silicon chip as substrate;
(2) photoetching and etching form 0.3～2.0 micron dark groove in substrate;
(3) polysilicon or the amorphous silicon or the metallic film of deposition 0.3～2.0 micron thickness, photoetching and etching then, etching depth equals the thickness of this layer film, forms the bottom electrode and the lead-in wire of distorting lens;
(4) deposit thickness is 0.1～1.0 micron a silicon nitride film, photoetching and etching then, and etching depth equals the thickness of this layer film, makes silicon nitride film that bottom electrode is covered, thereby avoids static to draw in effect causes short circuit to device infringement;
(5) get a SOI wafer, the silicon structure layer thickness of wafer is 0.3～20.0 micron, oxidated layer thickness is 0.3～10 micron, silicon base thickness is 300～1000 microns, perhaps in the oxide layer of 0.3～10 micron of upper surface thermal oxide one bed thickness of the common silicon chip silicon base of thick 300-1000 micron, be thinned to 0.3～20 micron thickness at silicon chip of oxide layer upper surface bonding and with this piece silicon chip with machinery or chemical method then and it is polished;
(6) the wafer upper and lower surface that step (5) is obtained all deposits two-layer silicon dioxide and two-layer silicon nitride, and order is silicon dioxide → silicon nitride → silicon dioxide → silicon nitride, for follow-up wet etching or dry etching are prepared;
(7) the structure lower surface that step (6) is obtained carries out Twi-lithography and etching, forms step-like structure, for follow-up wet etching is prepared;
(8) step-like silicon nitride and the silicon dioxide that obtains with step (7) is that mask carries out wet method or dry etching silicon base, and 12～52 microns places of upper surface that are etched to apart from silicon base stop;
(9) then the structure wet method or the dry etching of step (8) gained fallen one deck silicon nitride and silicon dioxide, carry out wet method or dry etching silicon base with residual silicon nitride and silicon dioxide as mask, the degree of depth is 10～50 microns;
(10) resulting structure upper and lower surface remaining silica and silicon nitride in the step (9) are removed with wet method or dry etching;
(11) lower surface with the structure that obtains in the upper surface of the structure that obtains in the step (3) and the step (10) carries out fusion bonding or anode linkage or low-temperature bonding;
(12) upper surface to the structure that obtains in the step (10) carries out photoetching and etching, forms release aperture, then the oxide layer below the release aperture is discharged, and only keeps and sees the connector that ground floor is connected with the second layer from the top down.
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| CN106249402A (en) * | 2016-08-31 | 2016-12-21 | 常州创微电子机械科技有限公司 | A kind of one-dimensional micro mirror of Electromagnetic Drive |
| CN106969759B (en) * | 2017-05-04 | 2020-05-05 | 成都振芯科技股份有限公司 | Cross structure processing technology for simultaneously coupling gyroscope driving mass and gyroscope detection mass |
| CN108594428B (en) * | 2018-04-16 | 2020-06-05 | 西安知微传感技术有限公司 | MEMS micro-vibrating mirror and manufacturing method for prefabricating MEMS micro-vibrating mirror based on SOI top layer silicon |
| CN113883041A (en) * | 2021-11-02 | 2022-01-04 | 北京航空航天大学 | High-precision MEMS micropump based on piezoelectric diaphragm |
| CN116387084B (en) * | 2023-06-01 | 2023-08-01 | 中国工程物理研究院电子工程研究所 | Quartz micro switch |
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