CN208500348U - MEMS SOI wafer and MEMS sensor - Google Patents
MEMS SOI wafer and MEMS sensor Download PDFInfo
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- CN208500348U CN208500348U CN201820879783.9U CN201820879783U CN208500348U CN 208500348 U CN208500348 U CN 208500348U CN 201820879783 U CN201820879783 U CN 201820879783U CN 208500348 U CN208500348 U CN 208500348U
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Abstract
The utility model discloses a kind of MEMS SOI wafer and MEMS sensors, the crystal circle structure includes substrate, dielectric layer, device layer and cavity: the cavity is located in substrate, support construction is formed in cavity, and the depth of support construction is identical as the depth of cavity, the dielectric layer is between substrate and device layer.Preparation method includes: the preparation of substrate；The production of substrate upper groove；The preparation of device layer wafer；The production of dielectric layer on device layer wafer；The bonding of device layer wafer and substrate；The formation of MEMS SOI wafer.The MEMS sensor prepared with this wafer it is with uniformity it is high, have excellent performance, stability is good and the advantage that resists external environmental disturbances strong.
Description
Technical field
The utility model relates to a kind of MEMS SOI wafer and preparation method and apply the MEMS SOI wafer and preparation
MEMS sensor of method and preparation method thereof belongs to MEMS sensor technical field.
Background technique
MEMS membrane structure is for MEMS sensor, especially MEMS pressure sensor, has very important status.
The MEMS membrane structure of early stage generallys use the traditional anisotropic wet corrosion of semiconductor technology, that is, utilizes semiconductor material, such as
There is the different crystal orientations of monocrystalline silicon different corrosion rates to be formed in aqueous slkali.The shortcomings that technique is low efficiency, consistent
Property is poor, crystal round utilization ratio is low etc..With the progress of semiconductor microactuator processing technology, silicon (Cavity- in the insulating substrate of pre-buried cavity
SOI, abbreviation C-SOI) wafer, it is increasingly being used for MEMS sensor production, and gradually replace anisotropic wet corrosion
Technology makes MEMS membrane structure.
Existing C-SOI wafer and its structure are as shown in Figure 1 comprising substrate (1), the pre-buried cavity in substrate
(4), the dielectric layer (2) between device layer (3) and substrate (1) and device layer (3)；Fig. 2 is a chip on the C-SOI wafer
The enlarged drawing and its sectional view of unit, cavity (4) are embedded in advance under device layer (3) and dielectric layer (2), the device on cavity (4)
Layer (3) is MEMS membrane structure, and thickness is determined by device layer thickness, realizes different films by adjusting the thickness of device layer
Thickness.
C-SOI wafer uses traditional IC SOI wafer manufacture craft, process are as follows: first produces and is used on substrate (1)
The groove of pre-buried cavity (4)；Then with have dielectric layer (2) device layer wafer bonding；Last device layer wafer is thinned, polishes
Form C-SOI wafer.C-SOI technique overcomes the shortcomings that conventional wet etching process, the MEMS membrane structure consistency of production is good,
Crystal round utilization ratio is high, it is compatible with traditional IC SOI technology, high-efficient, being capable of large-scale batch production.For thicker MEMS
For membrane structure, its performance of C-SOI technique is very excellent；But for relatively thin MEMS membrane structure (such as less than 10um),
Really it proves definitely inferior, main cause is: first, it is being thinned, in polishing process, with the reduction of C-SOI thickness, MEMS film knot
Structure is under atmospheric pressure, it may occur that bending deformation not only results in the deviation of film thickness, there is also local stress and gathers
It is serious to directly result in membrane structure rupture even fragment in MEMS membrane structure；Second, in subsequent manufacturing processes, due to film
The problem of thick relatively thin and local stress, MEMS membrane structure is when undergoing the standard cleaning and drying in technical process, high pressure water flow
Easily lead to the rupture of MEMS the membrane structure even fragment of MEMS C-SOI wafer with air-flow；Third, the problem of due to local stress,
The MEMS device long-time stability that relatively thin MEMS membrane structure is produced are poor, are easily affected by the external environment, to it is subsequent encapsulation,
Test and use bring foot mostly inconvenient；4th, for ultra-thin membrane structure (5um or less), need brilliant using SOI costly
Round and ordinary silicon wafer bonding, at high cost, complex process realize that difficulty is big；5th, in the preparation of C-SOI wafer, dielectric layer is raw
It grows in substrate or is grown in substrate and device layer simultaneously, the four of the membrane structure surrounding of C-SOI wafer and support construction
Weekly assembly protrusion, influences the roughness of SOI wafer, will cause wafer when serious and be not available.
Utility model content
The purpose of the utility model is to provide the MEMS of a kind of MEMS SOI wafer and application the MEMS SOI wafer
Sensor, the MEMS sensor prepared with this wafer it is with uniformity it is high, have excellent performance, stability is good and resists external environment
The strong advantage of interference.
To achieve the above object, the technical solution adopted in the utility model is, a kind of MEMS SOI wafer, the wafer knot
Structure includes substrate, dielectric layer, device layer and cavity: the cavity is located in substrate, support construction is formed in cavity, and prop up
The depth of support structure and the depth of cavity are identical, and the dielectric layer is between substrate and device layer.
Preferably, the dielectric layer is grown on the wafer of device layer.
Preferably, the support construction is as supporting device or as the mass block for improving device performance.
A kind of preparation method of MEMS SOI wafer the following steps are included:
(a) preparation of substrate: spare after common semiconductor crystal wafer is cleaned with standard semi-conductor processes；
(b) production of substrate upper groove: the method in substrate through dry etching or wet etching formed groove and
Support construction；
(c) preparation of device layer wafer: conventional semiconductor wafer is selected, such as N-type (100) Silicon Wafer；
(d) on device layer wafer dielectric layer production: the side that device layer wafer passes through thermal oxide or chemical vapor deposition
Formula grows one layer of dielectric layer, forms the two-sided device layer wafer with dielectric layer；
(e) bonding of device layer wafer and substrate: the device layer wafer with dielectric layer passes through wafer bond techniques and base
Bottom bonds together, and forms the cavity and support construction being embedded under device layer wafer in advance；
(f) formation of MEMS SOI wafer: device layer wafer is being thinned, by way of chemical mechanical grinding polishing (CMP)
Device layer is formed, the MEMS SOI wafer for being embedded with cavity and support construction is ultimately formed.
Preferably, the thinned mode of device layer wafer has mechanical reduction and/or wet chemical etching technique in step (f)
And/or dry etching.
Preferably, one of production method is specifically wrapped in step (b) there are three types of the production methods of substrate upper groove
It includes:
One layer photoresist of rotary coating in (4a) substrate, baking-curing, the mask layer as dry etching substrate；
(4b) photoetching, the dry etching substrate out of developing opening；
(4c) forms groove and support construction from opening dry etching substrate；
(4d) removes photoresist, is formed with fluted and support construction substrate.
Preferably, second of production method of substrate upper groove specifically includes in step (b):
The thermal oxide of (5a) substrate or chemical vapour deposition technique grow mask layer of the one layer of dielectric layer as dry etching substrate；
(5b) has one layer photoresist of substrate rotary coating of dielectric layer, baking-curing；
(5c) photoetching, develop dry etching out or wet etching dielectric layer opening；
(5d) wet etching or dry etching fall the dielectric layer of opening, form the second opening of dry etching substrate；
(5e) removes photoresist；
(5f) forms groove and support construction from the second opening dry etching substrate；
(5g) wet etching falls the dielectric layer in substrate, is formed with fluted and support construction substrate.
Preferably, it is characterized in that, the third production method of substrate upper groove specifically includes in step (b):
The thermal oxide of (6a) substrate or chemical vapour deposition technique grow mask layer of the one layer of dielectric layer as dry etching substrate；
(6b) has one layer photoresist of substrate rotary coating of dielectric layer, baking-curing；
(6c) photoetching, develop dry etching out or wet etching dielectric layer opening；
(6d) wet etching or dry etching fall the dielectric layer of opening, form the second opening of wet etching substrate；
(6e) removes photoresist；
(6f) forms inverted trapezoidal groove and support construction from the second opening anisotropic wet etching substrate；
(6g) wet etching falls the dielectric layer in substrate, forms the substrate for having inverted trapezoidal groove and support construction.
Preferably, the support construction is located at the center of cavity or is uniformly distributed in the cavities.
The invention also discloses a kind of MEMS sensors, using MEMS SOI wafer described in this patent and preparation side
Method.
A kind of production method of MEMS sensor of the utility model, step include:
It from the back-etching of MEMS SOI wafer to cavity, stops on dielectric layer, back chamber is formed, around the part of back chamber
Form fixed support structure；
Meanwhile the support construction of MEMS SOI is released into mass block, forms the island of island membrane structure, is used for limiting sensor
The deformation at center improves non-linear and symmetry；
Device layer forms membrane structure；
The pressure drag of inducedstress variation is formed in the immediate vicinity on four side of island film by way of ion implanting or diffusion, uses
Electrical signal is converted into pressure signal.
The utility model has the beneficial effects that MEMS SOI wafer described in the utility model, is located at MEMS film using several
The deformation of support construction limitation membrane structure under structure, film thickness offset issue caused by effectively overcoming because of deformation, simultaneously
Also acting improves the phenomenon that local stress is gathered, so as to avoid the film rupture and fragment encountered in wafer manufacture and flow
Problem.
The manufacturing process of MEMS SOI wafer described in the utility model has continued thick film due to the presence of support construction
The manufacturing process of C-SOI is avoided and is bonded using SOI costly, achieved the effect that simplified technique, reduces cost.
Detailed description of the invention
It, below will be to institute in embodiment or description of the prior art in order to illustrate more clearly of the technical solution of the utility model
Attached drawing to be used is needed to be briefly described.
Fig. 1 is the structural schematic diagram of existing MEMS C-SOI wafer；
Fig. 2 is the enlarged drawing of a chip unit A in Fig. 1；
Fig. 3 is the MEMS C-SOI wafer that the utility model has support construction；
Fig. 4 is the enlarged drawing of a chip unit B in Fig. 3；
Fig. 5 is the preparation flow figure of the utility model MEMS SOI wafer.
Fig. 6 is the preparation flow figure of the utility model embodiment one；
Fig. 7 is the preparation flow figure of the utility model embodiment two；
Fig. 8 is the preparation flow figure of the utility model embodiment three；
Fig. 9 is the structural schematic diagram of the MEMS sensor prepared using the utility model；
Specific embodiment
In order to make those skilled in the art better understand the technical solutions in the application, below in conjunction with embodiment pair
Technical solution in the application is clearly and completely described.
As shown in Figure 3-4 the utility model discloses a kind of MEMS SOI wafer, which includes substrate 1, medium
Layer 2, device layer 3 and cavity 4: the cavity 4 is located in substrate 1, and support construction 5, and support construction 5 are formed in cavity 4
Depth it is identical as the depth of cavity 4, the dielectric layer 2 is between substrate 1 and device layer 3.
The dielectric layer 2 is only grown on the wafer of device layer 3, for improving the roughness and flatness of wafer.
The support construction 5 can also be used as the mass block for improving device performance as supporting device.
As shown in figure 5, the utility model discloses a kind of preparation methods of MEMS SOI wafer, comprising the following steps:
(a) preparation of substrate 1: spare after common semiconductor crystal wafer is cleaned with standard semi-conductor processes；
(b) production of substrate upper groove: on the base 1 by the method for dry etching or wet etching formed groove and
Support construction 5, the groove are cavity 4；
(c) preparation of device layer wafer 6: conventional semiconductor wafer is selected, such as N-type (100) Silicon Wafer；
(d) on device layer wafer 6 dielectric layer 2 production: device layer wafer 6 passes through thermal oxide or chemical vapor deposition
Mode grows one layer of dielectric layer 2, forms the two-sided device layer wafer 6 with dielectric layer 2；
(e) bonding of device layer wafer 6 and substrate 1: the device layer wafer 6 with dielectric layer 2 passes through wafer bond techniques
It bonds together with substrate 1, forms the cavity 4 and support construction 5 being embedded under device layer wafer 6 in advance；
(f) formation of MEMS SOI wafer: device layer wafer 6 is being thinned, by way of chemical mechanical grinding polishing (CMP)
Device layer 3 is formed, the MEMS SOI wafer for being embedded with cavity 4 and support construction 5 is ultimately formed.
The thinned mode of device layer wafer 6 has mechanical reduction and/or wet chemical etching technique and/or dry method in step (f)
The modes such as etching carry out device layer wafer and are thinned.
Embodiment one
In step (b) there are three types of the production methods of substrate upper groove, one of production method is as shown in fig. 6, specific
Include:
One layer photoresist 8 of rotary coating in (4a) substrate 1, baking-curing, the mask layer as dry etching substrate 1；
(4b) photoetching, the dry etching substrate out of developing opening 9；
(4c) forms groove and support construction from dry etching substrate from opening 9；
(4d) removes photoresist, forms the substrate 1 with fluted (i.e. cavity 4) and support construction 5.
Embodiment two
Second of production method of substrate upper groove is as shown in fig. 7, specifically include in step (b):
1 thermal oxide of (5a) substrate or chemical vapour deposition technique grow exposure mask of the one layer of dielectric layer 2 as dry etching substrate
Layer；
(5b) has 1 rotary coating of substrate, one layer photoresist 8 of dielectric layer 2, baking-curing；
(5c) photoetching, develop dry etching out or wet etching dielectric layer 2 opening 9；
(5d) wet etching or dry etching fall the dielectric layer 2 at opening 9, form the second opening of dry etching substrate 1
10；
(5e) removes photoresist 8；
(5f) forms groove (i.e. cavity 4) and support construction 5 from the second opening dry etching substrate 1；
(5g) wet etching falls the dielectric layer 2 in substrate 1, forms the substrate with fluted (i.e. cavity 4) and support construction 5
1。
Embodiment three
The third production method of substrate upper groove is as shown in figure 8, specifically include in step (b):
1 thermal oxide of (6a) substrate or chemical vapour deposition technique grow exposure mask of the one layer of dielectric layer 2 as dry etching substrate
Layer；
(6b) has 1 rotary coating of substrate, one layer photoresist 8 of dielectric layer 2, baking-curing；
(6c) photoetching, develop dry etching out or wet etching dielectric layer opening 9；
(6d) wet etching or dry etching fall the dielectric layer of opening, form the second opening 10 of wet etching substrate；
(6e) removes photoresist 8；
(6f) forms groove (i.e. cavity 4) and support construction 5 from the second opening anisotropic wet etching substrate 1；
(6g) wet etching falls the dielectric layer 2 in substrate 1, is formed with fluted and support construction substrate, the groove
For inverted trapezoidal slot.
The support construction 5 is located at the center of cavity 4 or is evenly distributed in cavity 4.
Example IV
If Fig. 9 is the invention also discloses a kind of MEMS sensor, using the utility model MEMS SOI wafer and
Preparation method is made.
Wherein, a kind of production method of MEMS sensor of the utility model, step include:
It from the back-etching of MEMS SOI wafer to cavity 4, stops on dielectric layer 2, forms back chamber 11, around back chamber 11
Part formed fixed support structure 12；
Meanwhile the support construction 5 of MEMS SOI is released into mass block 13, forms the island of island membrane structure, for limiting biography
The deformation at sensor center improves non-linear and symmetry；
Device layer forms membrane structure；
The pressure drag 14 of inducedstress variation is formed in the immediate vicinity on four side of island film by way of ion implanting or diffusion,
Electrical signal is converted into for pressure signal.Above-mentioned MEMS differential pressure pressure sensor have it is non-linear it is small, symmetry is high, consistent
The advantages that property is good, performance is stable, resists external environmental disturbances strong.
When MEMS SOI wafer described in the utility model makes, dielectric layer is only grown on device layer wafer, effectively
The problem for avoiding membrane structure surrounding and support construction surrounding protrusion improves the roughness and flatness of wafer, improves wafer matter
Amount；Stop-layer as back side back chamber etching simultaneously, protects device layer not to be damaged.
MEMS SOI wafer described in the utility model is suitable for preparation MEMS differential pressure pressure sensor, MEMS differential pressure pressure
When the MEMS sensors such as force snesor, MEMS acceleration transducer, support construction can be used as the mass block of these sensors, pass through
The back chamber at the back side releases, and plays the effects of improving sensor nonlinear or improving sensitivity.
MEMS SOI wafer described in the utility model limits film using several support constructions under MEMS membrane structure
The deformation of structure, film thickness offset issue caused by effectively overcoming because of deformation, while also acting as improvement local stress and gathering
The phenomenon that, so as to avoid the film rupture and fragment problems encountered in wafer manufacture and flow.
The manufacturing process of MEMS SOI wafer described in the utility model has continued thick film due to the presence of support construction
The manufacturing process of C-SOI is avoided being bonded using SOI costly, achievees the effect that simplified technique, reduces cost.
Described embodiment is the utility model a part of the embodiment, instead of all the embodiments.Based on this reality
It is obtained by those of ordinary skill in the art without making creative efforts every other with the embodiment in novel
Embodiment is fallen within the protection scope of the utility model.
Claims (5)
1. a kind of MEMS SOI wafer, which is characterized in that the crystal circle structure (7) includes substrate (1), dielectric layer (2), device layer
(3) and cavity (4): the cavity (4) is located in substrate (1), is formed in cavity (4) support construction (5), and support construction
(5) depth is identical as the depth of cavity (4), and the dielectric layer (2) is located between substrate (1) and device layer (3).
2. MEMS SOI wafer according to claim 1, which is characterized in that the dielectric layer (2) is grown on device layer (3)
Wafer on.
3. MEMS SOI wafer according to claim 1 or 2, which is characterized in that the support construction (5) is used as eyelid retractor
Part or as improve device performance mass block.
4. MEMS SOI wafer according to claim 1, which is characterized in that the support construction (5) is located at cavity (4)
Center is uniformly distributed in the cavities.
5. a kind of MEMS sensor, which is characterized in that be made of the described in any item MEMS SOI wafers of claim 1-4.
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| CN201820879783.9U CN208500348U (en) | 2018-06-07 | 2018-06-07 | MEMS SOI wafer and MEMS sensor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108793053A (en) * | 2018-06-07 | 2018-11-13 | 苏州纳芯微电子股份有限公司 | MEMS SOI wafers and preparation method and MEMS sensor and preparation method |
| CN111664972A (en) * | 2020-06-05 | 2020-09-15 | 苏州纳芯微电子股份有限公司 | MEMS pressure sensor and preparation method thereof |
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2018
- 2018-06-07 CN CN201820879783.9U patent/CN208500348U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108793053A (en) * | 2018-06-07 | 2018-11-13 | 苏州纳芯微电子股份有限公司 | MEMS SOI wafers and preparation method and MEMS sensor and preparation method |
| CN111664972A (en) * | 2020-06-05 | 2020-09-15 | 苏州纳芯微电子股份有限公司 | MEMS pressure sensor and preparation method thereof |
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