CN108598011A - A kind of manufacturing method and reverse blocking IGBT of reverse blocking IGBT - Google Patents
A kind of manufacturing method and reverse blocking IGBT of reverse blocking IGBT Download PDFInfo
- Publication number
- CN108598011A CN108598011A CN201810444236.2A CN201810444236A CN108598011A CN 108598011 A CN108598011 A CN 108598011A CN 201810444236 A CN201810444236 A CN 201810444236A CN 108598011 A CN108598011 A CN 108598011A
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- Prior art keywords
- reverse blocking
- igbt
- blocking igbt
- manufacturing
- chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/82005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/822—Applying energy for connecting
- H01L2224/82201—Compression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/828—Bonding techniques
- H01L2224/82895—Direct bonding, i.e. joining surfaces by means of intermolecular attracting interactions at their interfaces, e.g. covalent bonds, van der Waals forces
Abstract
The present invention provides a kind of manufacturing method and reverse blocking IGBT of reverse blocking IGBT, and in the manufacturing method of reverse blocking IGBT, after carrying out back side bonding to support disk, side wall isolation processing is carried out to RB igbt chip side walls.It is isolated by side wall and processes the reversed pressure resistance, it can be achieved that high voltage RB igbt chips, and then the manufacture of high voltage reverse blocking IGBT may be implemented.Meanwhile positive bonding and back side bonding are carried out to the former piece of support twice.Pass through bonding operation twice, direct sidewall diffusion may be implemented, the required time is spread to greatly shorten in diffusion isolation step, and then big thickness can be completed within a short period of time, the dispersion operation of high voltage chip, high pressure (＞ 1700V) reverse blocking IGBT chip can be achieved, widened the voltage range of the prior art.
Description
Technical field
The present invention relates to reverse blocking IGBT technical fields, and in particular to a kind of reverse blocking IGBT manufacturing method and inverse-impedance type
IGBT。
Background technology
IGBT (Insulated Gate Bipolar Transistor) is also referred to as insulated gate bipolar transistor, is mesh
Preceding most representative power electronic devices.It is high that IGBT is integrated with the voltage cut-out of power MOS (Metal Oxide Semiconductor) device, working frequency simultaneously
The simple advantage and the advantages of bipolar transistor bipolar conduction with drive control circuit.Since IGBT technologies are born, by 30
Development for many years, IGBT technologies experienced the change of four generations, be followed successively by first generation planar gate punch, the non-break-through of second generation planar gate
Type, third generation trench gate field cut-off type and forth generation carrier storage channel grid bipolar transistor, be widely used in household appliances,
The fields such as illumination, consumer electronics, Industry Control, network communication, high-speed railway, new-energy automobile and power electronics.
The device for having two-way blocking-up ability is needed for the application in terms of some power electronics, such as matrix converter,
Traditional mode is that conventional IGBT and one can be in series with high voltage bearing diode, and still, concatenated diode causes to lead to
The increase of state pressure drop increases loss.
Reverse blocking IGBT (RB-IGBT) is that a kind of novel IGBT device is compared with traditional IGBT, and RB-IGBT has
Reverse blocking capability is applied in matrix converter, and on-state voltage drop and loss are not only reduced, and also reduces the quantity of device,
Make circuit size and cost smaller.Relative to traditional device, RB-IGBT has in cost and performance and has great advantage, quilt
It is widely used in matrix converter, neutral point clamp topology and T-type converter.
Reverse blocking IGBT (RB-IGBT) manufacture difficult point be realize reverse blocking capability, existing common technology be diffusion every
From can be effectively isolated chip sidewall damage or defect etc., reverse blocking capability be realized, to realize two-way blocking-up ability.Need spy
Not, it is noted that realize that two-way blocking-up ability, inverse-impedance type can not use buffer layer structure, it is only capable of using non-punch-through.It is inverse
Resistance type igbt chip thickness is sharply increased with voltage, about 200 μm of 1200V chip thickness, about 250 μm of 1700V chip thickness,
About 380 μm of 2500V chip thickness, about 500 μm of 3300V chip thickness, about 650 μm of 4500V chip thickness, 4500V chip thickness
About 800 μm.
In the prior art, the depth for diffusion isolation frequently with boron is spread, and diffusion is diffused into always scheduled depth from front
It spends (being typically opening through entire chip thickness), the depth that most important disadvantage is diffusion and the square root of time is isolated in just in diffusion
Than when making low voltage chip, integral thickness is smaller, and manufacture craft is fairly simple at this time, still, for the chip of high voltage
For, prodigious heat budget (200 μ m thicks need to spread about 1 week time) is needed, such a long time is for high tension apparatus
It is unpractical, and since horizontal proliferation increases the size of chip, causes the waste of chip area.
Invention content
Therefore, the technical problem to be solved in the present invention is to overcome high pressure reverse blocking IGBT manufacture in the prior art difficult
Defect.
For this purpose, the present invention provides a kind of manufacturing method of reverse blocking IGBT, include the following steps：S1. by RB-IGBT chips
It is connected on support disk；S2. back side bonding is carried out to support disk；S3. side wall isolation is carried out to RB-IGBT chip side walls to add
Work.
After the step S3, further include：S4. positive processing is carried out to RB-IGBT chips；
After the step S4, further include：S5. positive bonding is carried out to the former piece of support and the back side detaches.
After the step S5, further include：S6. back side processing is carried out to RB-IGBT chips, front is carried out to support disk
Separation.
In the step S3, side wall isolation processing is using one kind or more in diffusion isolation, groove Gree and V-type isolation
Kind.
Present invention simultaneously provides a kind of reverse blocking IGBTs, using the manufacturing method making of reverse blocking IGBT provided above
At.
Technical solution of the present invention has the following advantages that：
1. in the manufacturing method of reverse blocking IGBT provided by the invention, after carrying out back side bonding to support disk, to RB-
Igbt chip side wall carries out side wall isolation processing.By side wall be isolated processing, it can be achieved that high voltage RB-IGBT chips it is reversed resistance to
Pressure, and then the manufacture of high voltage reverse blocking IGBT may be implemented.
2. the manufacturing method of reverse blocking IGBT provided by the invention, including twice to the former piece of support carry out positive bonding and
The back side is bonded.By bonding operation twice, direct sidewall diffusion may be implemented, expand to greatly shorten in diffusion isolation step
The required time is dissipated, and then big thickness, the dispersion operation of high voltage chip can be completed within a short period of time.
3. the manufacturing method of reverse blocking IGBT provided by the invention, by supporting wafer bonding approach, it can be achieved that high pressure (＞
1700V) reverse blocking IGBT chip has widened the voltage range of the prior art.
Description of the drawings
It, below will be to specific in order to illustrate more clearly of the specific embodiment of the invention or technical solution in the prior art
Embodiment or attached drawing needed to be used in the description of the prior art are briefly described, it should be apparent that, in being described below
Attached drawing is some embodiments of the present invention, for those of ordinary skill in the art, before not making the creative labor
It puts, other drawings may also be obtained based on these drawings.
Fig. 1 is the flow chart of the manufacturing method of the reverse blocking IGBT provided by the invention.
Specific implementation mode
Technical scheme of the present invention is clearly and completely described below in conjunction with attached drawing, it is clear that described implementation
Example is a part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, ordinary skill
The every other embodiment that personnel are obtained without making creative work, shall fall within the protection scope of the present invention.
Embodiment 1
The present embodiment provides a kind of manufacturing methods of reverse blocking IGBT, as shown in Figure 1, including the following steps：
S1. RB-IGBT chips are connected on support disk；
S2. back side bonding is carried out to support disk；
S3. to RB-IGBT chip side walls carry out side wall isolation processing, specifically, side wall isolation processing using diffusion isolation,
It is one or more in groove Gree and V-type isolation.
In the present embodiment, support disk includes but not limited to silicon chip, sheet glass and sheet metal etc..
Further include following step in the present embodiment：
S4. positive processing is carried out to RB-IGBT chips；
S5. positive bonding is carried out to the former piece of support and the back side detaches.
S6. back side processing is carried out to RB-IGBT chips, positive separation is carried out to support disk.
In Fig. 1, the content for giving step S2 to step S6, does not draw step S1.
It should be noted that in the present embodiment：" bonding " supports together with disk and RB-IGBT disks/chip adhesive；
" separation " supports disk and RB-IGBT disks/chip separation.
In the present embodiment, RB-IGBT chips are fixed first, chip is prevented to be scattered or move the hidden danger such as position, it is convenient to reverse blocking
Type igbt chip side wall is processed, it is preferred that can be detached chip by modes such as grinding/corrosion, be re-formed side wall p-type
Doping forms reverse blocking capability；Injection element includes but not limited to boron, indium, gallium etc., p-type doping include but not limited to injection,
The modes such as diffusion, corrosion+injection.
In step S4 and S6, just/back side IGBT processing, wherein front and back technique and tradition IGBT manufacturing process indifferences
Different, what need to be considered is influence of the subsequent technique to chip side wall；The processing of reverse blocking IGBT chip side wall can refer to existing inverse-impedance type
IGBT processing technologies (diffusion isolation, trench isolations, V-type groove isolation and mixing isolation etc.), what need to be considered is subsequent technique pair
The influence of chip side wall.
Optionally, the processing of reverse blocking IGBT chip side wall, chip front side processing and chip back procedure of processing are front and back secondly
Adjustable or interspersed progress, but need to consider influence of the subsequent process to previous process.
Embodiment 2
The present embodiment provides a kind of reverse blocking IGBTs, using manufacturer's legal system of the reverse blocking IGBT provided in embodiment 1
It forms.Suitable for IGBT, DMOS, FRD constant power semiconductor devices, it is suitable for the different materials such as SiC, GaN.
Comparative example
The test voltage of the reverse blocking IGBT manufactured in the prior art is given in this comparative example, details are shown in Table the number in 1
According to.
The ceiling voltage of the invention with reverse blocking IGBT obtained in the prior art of table 1 compares
| The present embodiment (V) | The prior art (V) | |
| Ceiling voltage | 1800-6500 | 1700 |
It is by the data in table 1 it is known that inverse made from the reverse blocking IGBT manufacturing method provided through this embodiment
Resistance type IGBT can greatly provide its voltage range that can bear.
Thus, it can be known that by using wafer bonding technique, the voltage range of reverse blocking IGBT can be greatly improved.
Obviously, the above embodiments are merely examples for clarifying the description, and does not limit the embodiments.It is right
For those of ordinary skill in the art, can also make on the basis of the above description it is other it is various forms of variation or
It changes.There is no necessity and possibility to exhaust all the enbodiments.And it is extended from this it is obvious variation or
It changes still within the protection scope of the invention.
Claims (6)
1. a kind of manufacturing method of reverse blocking IGBT, which is characterized in that include the following steps：
S1. RB-IGBT chips are connected on support disk；
S2. back side bonding is carried out to support disk；
S3. side wall isolation processing is carried out to RB-IGBT chip side walls.
2. the manufacturing method of reverse blocking IGBT according to claim 1, which is characterized in that after the step S3, also wrap
It includes：
S4. positive processing is carried out to RB-IGBT chips.
3. the manufacturing method of reverse blocking IGBT according to claim 2, which is characterized in that after the step S4, also wrap
It includes：
S5. positive bonding is carried out to the former piece of support and the back side detaches.
4. the manufacturing method of reverse blocking IGBT according to claim 3, which is characterized in that after the step S5, also wrap
It includes：
S6. back side processing is carried out to RB-IGBT chips, positive separation is carried out to support disk.
5. the manufacturing method of reverse blocking IGBT according to claim 4, which is characterized in that in the step S3, side wall
Isolation processing is using one or more in diffusion isolation, groove Gree and V-type isolation.
6. a kind of reverse blocking IGBT, which is characterized in that using the manufacturer of any reverse blocking IGBT in claim 1-5
Method is made.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810444236.2A CN108598011A (en) | 2018-05-10 | 2018-05-10 | A kind of manufacturing method and reverse blocking IGBT of reverse blocking IGBT |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810444236.2A CN108598011A (en) | 2018-05-10 | 2018-05-10 | A kind of manufacturing method and reverse blocking IGBT of reverse blocking IGBT |
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| Publication Number | Publication Date |
|---|---|
| CN108598011A true CN108598011A (en) | 2018-09-28 |
Family
ID=63636444
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|---|---|---|---|
| CN201810444236.2A Pending CN108598011A (en) | 2018-05-10 | 2018-05-10 | A kind of manufacturing method and reverse blocking IGBT of reverse blocking IGBT |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060249797A1 (en) * | 2004-08-19 | 2006-11-09 | Fuji Electric Holding Co., Ltd. | Semiconductor device and manufacturing method thereof |
| CN102037563A (en) * | 2008-05-13 | 2011-04-27 | 富士电机系统株式会社 | Semiconductor device and manufacturing method thereof |
| CN102856194A (en) * | 2011-06-30 | 2013-01-02 | 富士电机株式会社 | Method of manufacturing a reverse blocking insulated gate bipolar transistor |
| CN103296076A (en) * | 2013-05-30 | 2013-09-11 | 江苏捷捷微电子股份有限公司 | Planar thyristor and chip and method for manufacturing planar thyristor |
| CN104658907A (en) * | 2013-11-20 | 2015-05-27 | 江苏物联网研究发展中心 | Manufacturing method of reverse-blocking insulated gate bipolar transistor |
| CN106252401A (en) * | 2016-09-28 | 2016-12-21 | 中国科学院微电子研究所 | A kind of inverse-impedance type igbt terminal structure |
| CN106449505A (en) * | 2016-08-22 | 2017-02-22 | 中国电子科技集团公司第五十五研究所 | Back technique for semiconductor ultrathin device |
-
2018
- 2018-05-10 CN CN201810444236.2A patent/CN108598011A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060249797A1 (en) * | 2004-08-19 | 2006-11-09 | Fuji Electric Holding Co., Ltd. | Semiconductor device and manufacturing method thereof |
| CN102037563A (en) * | 2008-05-13 | 2011-04-27 | 富士电机系统株式会社 | Semiconductor device and manufacturing method thereof |
| CN102856194A (en) * | 2011-06-30 | 2013-01-02 | 富士电机株式会社 | Method of manufacturing a reverse blocking insulated gate bipolar transistor |
| CN103296076A (en) * | 2013-05-30 | 2013-09-11 | 江苏捷捷微电子股份有限公司 | Planar thyristor and chip and method for manufacturing planar thyristor |
| CN104658907A (en) * | 2013-11-20 | 2015-05-27 | 江苏物联网研究发展中心 | Manufacturing method of reverse-blocking insulated gate bipolar transistor |
| CN106449505A (en) * | 2016-08-22 | 2017-02-22 | 中国电子科技集团公司第五十五研究所 | Back technique for semiconductor ultrathin device |
| CN106252401A (en) * | 2016-09-28 | 2016-12-21 | 中国科学院微电子研究所 | A kind of inverse-impedance type igbt terminal structure |
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Address after: 102209 18 Riverside Avenue, Changping District science and Technology City, Beijing Applicant after: Global energy Internet Institute, Inc. Applicant after: State Grid Corporation of China Applicant after: State Grid Hebei Electric Power Company Address before: 102209 18 Riverside Avenue, Changping District science and Technology City, Beijing Applicant before: Global energy Internet Institute, Inc. Applicant before: State Grid Corporation of China Applicant before: State Grid Hebei Electric Power Company |
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Application publication date: 20180928 |