CN108538835A - Array of capacitors structure and preparation method thereof - Google Patents
Array of capacitors structure and preparation method thereof Download PDFInfo
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- CN108538835A CN108538835A CN201810466991.0A CN201810466991A CN108538835A CN 108538835 A CN108538835 A CN 108538835A CN 201810466991 A CN201810466991 A CN 201810466991A CN 108538835 A CN108538835 A CN 108538835A
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- 239000003990 capacitor Substances 0.000 title claims abstract description 142
- 238000002360 preparation method Methods 0.000 title claims abstract description 44
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 65
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 58
- 239000000758 substrate Substances 0.000 claims abstract description 41
- 238000000034 method Methods 0.000 claims abstract description 40
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 238000010276 construction Methods 0.000 claims abstract description 25
- 238000009792 diffusion process Methods 0.000 claims abstract description 25
- 230000000873 masking effect Effects 0.000 claims abstract description 24
- -1 Nitrogen ion Chemical class 0.000 claims description 72
- 239000000463 material Substances 0.000 claims description 47
- 230000004888 barrier function Effects 0.000 claims description 33
- 239000012535 impurity Substances 0.000 claims description 33
- 241000370738 Chlorion Species 0.000 claims description 31
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 20
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 239000007789 gas Substances 0.000 claims description 14
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 14
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 13
- 229920005591 polysilicon Polymers 0.000 claims description 13
- 238000001039 wet etching Methods 0.000 claims description 13
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 12
- 238000005516 engineering process Methods 0.000 claims description 12
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 12
- MTPVUVINMAGMJL-UHFFFAOYSA-N trimethyl(1,1,2,2,2-pentafluoroethyl)silane Chemical compound C[Si](C)(C)C(F)(F)C(F)(F)F MTPVUVINMAGMJL-UHFFFAOYSA-N 0.000 claims description 12
- 229910052721 tungsten Inorganic materials 0.000 claims description 11
- 239000010937 tungsten Substances 0.000 claims description 11
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 10
- 238000005229 chemical vapour deposition Methods 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052796 boron Inorganic materials 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 7
- 229910001925 ruthenium oxide Inorganic materials 0.000 claims description 7
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- 229910021529 ammonia Inorganic materials 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 6
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 6
- ZARVOZCHNMQIBL-UHFFFAOYSA-N oxygen(2-) titanium(4+) zirconium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4] ZARVOZCHNMQIBL-UHFFFAOYSA-N 0.000 claims description 6
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 6
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 6
- 230000009471 action Effects 0.000 claims description 5
- 229910000410 antimony oxide Inorganic materials 0.000 claims description 5
- 230000008859 change Effects 0.000 claims description 5
- VTRUBDSFZJNXHI-UHFFFAOYSA-N oxoantimony Chemical compound [Sb]=O VTRUBDSFZJNXHI-UHFFFAOYSA-N 0.000 claims description 5
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 4
- 238000002513 implantation Methods 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 229910021332 silicide Inorganic materials 0.000 claims description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 claims description 3
- 238000005137 deposition process Methods 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 229910001510 metal chloride Inorganic materials 0.000 claims description 3
- 229910000069 nitrogen hydride Inorganic materials 0.000 claims description 3
- 241001465754 Metazoa Species 0.000 claims description 2
- 239000002253 acid Substances 0.000 claims description 2
- 239000001257 hydrogen Substances 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 claims description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims 1
- 229910052731 fluorine Inorganic materials 0.000 claims 1
- 239000011737 fluorine Substances 0.000 claims 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- 229910052726 zirconium Inorganic materials 0.000 claims 1
- 238000003860 storage Methods 0.000 abstract description 10
- 238000010586 diagram Methods 0.000 description 13
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 8
- 230000007797 corrosion Effects 0.000 description 7
- 238000005260 corrosion Methods 0.000 description 7
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 6
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 230000003667 anti-reflective effect Effects 0.000 description 4
- 239000006227 byproduct Substances 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000000717 retained effect Effects 0.000 description 3
- XJDNKRIXUMDJCW-UHFFFAOYSA-J titanium tetrachloride Chemical compound Cl[Ti](Cl)(Cl)Cl XJDNKRIXUMDJCW-UHFFFAOYSA-J 0.000 description 3
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 2
- 241000446313 Lamella Species 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910018316 SbOx Inorganic materials 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 238000005660 chlorination reaction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- DOTMOQHOJINYBL-UHFFFAOYSA-N molecular nitrogen;molecular oxygen Chemical compound N#N.O=O DOTMOQHOJINYBL-UHFFFAOYSA-N 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 description 1
- 229940085991 phosphate ion Drugs 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0805—Capacitors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
A kind of array of capacitors structure of present invention offer and preparation method thereof, this method includes：1）Semi-conductive substrate is provided, in forming laminated construction in semiconductor substrate；2）In forming Patterned masking layer on laminated construction, multiple capacitance holes are etched in laminated construction based on Patterned masking layer；3）Lower electrode layer is formed in the bottom in capacitance hole and side wall, supporting layer connects lower electrode layer；4）Remove sacrificial layer；5）Nitrogen ion plasma diffusion technique is carried out to lower electrode layer, Nitrogen ion diffuses into inner surface and the outer surface of lower electrode layer；6）Capacitor dielectric layer is formed in the inner surface of lower electrode layer and outer surface, upper electrode layer is formed in the outer surface of capacitor dielectric layer.By carrying out Nitrogen ion plasma diffusion process to lower electrode layer, the electrical connection stability and charge storage of capacitor are effectively increased, while reducing the leakage rate of capacitor.
Description
Technical field
The invention belongs to field of manufacturing semiconductor devices, more particularly to a kind of array of capacitors preparation method.
Background technology
Dynamic RAM (Dynamic Random Access Memory, referred to as：DRAM) commonly used in computer
Semiconductor storage unit, be made of the storage unit of many repetitions.Each storage unit generally includes capacitor and transistor；
The grid of transistor is connected with wordline, drain be connected with bit line, source electrode is connected with capacitor；Voltage signal in wordline can be controlled
Transistor processed opens or closes, and then reads the data information of storage in the capacitor by bit line, or will by bit line
Data information is written in capacitor and is stored.With the lasting evolution of DRAM making technologies, integrated level is continuously improved, element
Size constantly micro, in current 20nm or less DRAM processing procedures, DRAM is all made of the capacitor structure of stacking-type, capacitor
(Capacitor) be the cylindrical shape of vertical high-aspect-ratio to increase surface area, include the lower electrode layer being connect with substrate,
The capacitor dielectric layer being deposited on lower electrode layer and the upper electrode layer being deposited on capacitor dielectric layer.
However, in the preparation process of existing DRAM capacitor structure, when deposition forms capacitor lower electrode layer, meeting simultaneously
Generate by-product chlorion.For example, most currently used lower electrode layer deposition method, as shown in Figure 1, leading in reaction chamber
Enter titanium chloride and ammonia gas, titanium chloride gas is first adsorbed on substrate surface, and then ammonia and titanium chloride gas reaction are in substrate
Upper formation titanium nitride lower electrode layer, while also will produce by-product chlorion.And impurity chlorion can mix capacitor lower electrode
In layer, on the one hand it is easy that lower electrode layer is made to peel off from substrate, reduces the electrical connection stability of capacitor；Another aspect chlorion
Combined generation strong acid that can corrode lower electrode layer with hydrogen ion, to make the leakage rate of capacitor improve；Finally can seriously it reduce down
The purity of electrode material makes the resistance of lower electrode increase, and in deposited capacitances dielectric layer, the oxygen element in capacitor dielectric layer is easy
Lower electrode layer is immersed, so that K (dielectric constant) value of capacitor dielectric layer is reduced, the ability of capacitive charge storage is caused to decline.
Therefore, a kind of preparation method of array of capacitors how is provided, to solve in the prior art in the case where forming capacitor
When electrode layer, by-product chlorion mixes lower electrode layer, causes the electrical connection stability of capacitor to reduce, the leakage rate of capacitor
The problem of ability of raising and capacitor storage charge declines is necessary.
Invention content
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of array of capacitors structure and its
Preparation method, for solving in the prior art when forming capacitor lower electrode layer, the lower electricity of by-product chlorion incorporation of formation
Pole layer causes the electrical connection stability of capacitor to reduce, the leakage rate of capacitor improves and the ability of capacitor storage charge
The problem of decline.
In order to achieve the above objects and other related objects, the present invention provides a kind of preparation method of array of capacitors structure,
Include the following steps：
1) semi-conductive substrate is provided, in forming laminated construction in the semiconductor substrate, the laminated construction includes handing over
For the supporting layer and sacrificial layer of stacking；
2) in forming Patterned masking layer on the laminated construction, based on the Patterned masking layer in the laminated construction
In etch multiple capacitance holes；
3) lower electrode layer is formed in the bottom in the capacitance hole and side wall, the supporting layer connects the lower electrode layer；
4) sacrificial layer is removed, wherein the supporting layer retains on the semiconductor substrate；
5) Nitrogen ion plasma diffusion technique is carried out to the lower electrode layer, the Nitrogen ion diffuses into the lower electricity
The inner surface of pole layer and outer surface；
6) capacitor dielectric layer is formed in the inner surface of the lower electrode layer and outer surface, wherein the capacitor dielectric layer covers
The lower electrode layer is covered, upper electrode layer is formed in the outer surface of the capacitor dielectric layer, wherein described in upper electrode layer covering
Capacitor dielectric layer.
Preferably, impurity chlorion is contained in the lower electrode layer that step 3) is formed, Nitrogen ion described in step 5) expands
Dissipate enter the lower electrode layer inner surface and outer surface, and by the impurity chlorion squeeze out, with remove the impurity chlorine from
Son.
Preferably, the lower electrode layer is formed in the bottom in the capacitance hole and side wall using chemical vapour deposition technique,
In, the predecessor of the chemical vapour deposition technique includes metal chloride.
Further, the material of the lower electrode layer includes the group being made of titanium nitride, titanium oxide, titanium carbide and tungsten
At least one of.
Further, the lower electrode layer includes titanium nitride layer, using chemical vapour deposition technique in the bottom in the capacitance hole
Portion and side wall form the titanium nitride layer, and the chemical vapour deposition technique includes reaction：TICl4+NH3→TIN+HCl+N2,
In, the predecessor TICl4The lower electrode layer is set to contain the impurity chlorion.
Preferably, the laminated construction includes the base layer support layer stacked gradually, the first sacrificial layer, middle support layer,
Two sacrificial layers and top support layer.
Further, the material of first sacrificial layer includes the silica (BPSG) of boron phosphorus doping, and described second sacrifices
The material of layer includes oxide, wherein and first sacrificial layer includes the first sacrificial layer of the first sacrificial layer of upper layer and lower layer, and under
The phosphonium ion doping concentration of the first sacrificial layer of layer is more than the phosphonium ion doping concentration of the first sacrificial layer of upper layer.
Further, the weight percent of the phosphonium ion content of the first sacrificial layer of the lower layer is between 3%~5%,
The weight percent of boron ion content is between 2%~7%, the weight hundred of the phosphonium ion content of the first sacrificial layer of the upper layer
Divide ratio between 3%~5%, the weight percent of boron ion content is between 5%~10%.
Preferably, step 2) includes the following steps：
2-1) in sequentially forming barrier in the structure that step 1) obtains；
2-2) in step 2-1) obtained structure upper edge first direction forms the first etched features using pitch multiplication process；
2-3) in step 2-2) use pitch multiplication process to form the second etched features in a second direction in obtained structure,
To obtain the double-deck etched features, wherein the first direction has angle with second direction；
The region other than the double-deck etched features overlapping region 2-4) is etched, the Patterned masking layer is formed.
Further, the barrier includes polysilicon barrier layer, barrier oxide layers and carbide blocking successively
Layer；And step 2-4) include the following steps：
The region other than the overlapping region of the double-deck etched features region 2-4-1) is etched, the capacitor is formed
Multiple openings of array structure；
It 2-4-2) is sequentially etched the polysilicon barrier layer, barrier oxide layers and silicide barrier layer along the opening,
To form the Patterned masking layer.
Further, the barrier oxide layers include silica barrier layer.
Preferably, step 4) includes the following steps：
4-1) in forming the first opening in the top support layer, with exposure second sacrificial layer；
It 4-2) is based on described first to be open, second sacrificial layer is removed using wet-etching technology；
4-3) in forming the second opening in the middle support layer, with exposure first sacrificial layer；
It 4-4) is based on described second to be open, first sacrificial layer is removed using wet-etching technology.
Further, step 4-2) in wet etching solution include 30%~60% hydrofluoric acid, step 4-4) in
Wet etching solution includes 30%~60% hydrofluoric acid.
Further, rapid 4-1) in, first opening is only overlapped with a capacitance hole or described in one
First opening is overlapping with multiple capacitance holes simultaneously；Step 4-3) in, one it is described second opening only with a capacitance
Hole is overlapping or second opening is overlapping with multiple capacitance holes simultaneously.
Further, first opening is overlapping with three capacitance holes simultaneously, and second opening is same
The Shi Yusan capacitance holes are overlapping.
Preferably, the material of the supporting layer includes at least one of the group being made of silicon nitride, silicon oxynitride, institute
The material for stating upper electrode layer includes at least one in the group being made of polysilicon, titanium nitride, titanium oxide, titanium carbide and tungsten
Kind, the material of the capacitor dielectric layer includes by zirconium oxide, hafnium oxide, titanium Zirconium oxide, ruthenium-oxide, antimony oxide, aluminium oxide group
At at least one of group.
Further, step 5) includes the following steps：
5-1) structure that step 4) obtains is placed in Nitrogen ion generation device；
It 5-2) is passed through Nitrogen ion gas source into the Nitrogen ion generation device, Nitrogen ion, institute are generated by microwave action
It states Nitrogen ion and the lower electrode layer is entered by diffusion way.
Further, between 1.5KW~2.5KW, diffusion time is situated between the operating power of the Nitrogen ion generation device
Between 50s~60s, diffusion pressure is between 0.1TORR~0.5TORR, and heating temperature is between 350 DEG C~500 DEG C.
Preferably, the Nitrogen ion gas source being passed through includes at least one of the group being made of nitrogen and ammonia.
The present invention also provides a kind of array of capacitors structures, including：
Semiconductor substrate；
Lower electrode layer is formed in the semiconductor substrate, and the cross sectional shape of the lower electrode layer includes U-shaped, and described
The inner surface of lower electrode layer and outer surface diffusion implantation Nitrogen ion；
Capacitor dielectric layer is covered in inner surface and the outer surface of the lower electrode layer；
Upper electrode layer is covered in the outer surface of the capacitor dielectric layer.
Preferably, the material of the lower electrode layer includes titanium nitride.
Preferably, the material of the lower electrode layer includes one kind in the group being made of titanium oxide, titanium carbide and tungsten.
Preferably, the array of capacitors structure further includes top support layer, middle support layer and base layer support layer, equal shape
In semiconductor substrate described in Cheng Yu and connect the lower electrode layer, wherein the top support layer connects the lower electrode layer
Mouth periphery, the middle support layer connect the middle part of the lower electrode layer, and the base layer support layer is formed in the semiconductor
The bottom periphery of substrate surface and the connection lower electrode layer.
Further, the material of the top support layer, middle support layer and base layer support layer includes by silicon nitride, nitrogen oxygen
One kind in the group of SiClx composition.
Preferably, the array of capacitors structure further includes top electrode filled layer, covers the outer surface of the upper electrode layer,
And fill up the gap between the upper electrode layer.
Preferably, the material of the upper electrode layer includes and is made of polysilicon, titanium nitride, titanium oxide, titanium carbide and tungsten
Group in one kind, the material of the capacitor dielectric layer includes by zirconium oxide, hafnium oxide, titanium Zirconium oxide, ruthenium-oxide, oxidation
One kind in the group that antimony, aluminium oxide form.
As described above, the array of capacitors structure and preparation method thereof of the present invention, has the advantages that：The present invention adopts
Lower electrode layer is handled with Nitrogen ion plasma diffusion technique, Nitrogen ion, which enters in lower electrode layer, squeezes impurity therein
Go out, especially impurity chlorion squeezes out, and impurity chlorion is combined with hydrogen ion generates hydrogen chloride gas discharge, to reduce lower electricity
The content of impurity chlorion, makes the stable connection of lower electrode layer and substrate, improves the electrical connection stability of capacitor in the layer of pole；Separately
Outer chlorion and hydrogen ion, which combine, generates hydrogen chloride gas discharge, can effectively reduce the corrosion of impurity chlorine ion pair lower electrode layer,
Reduce the leakage rate of capacitor；Finally, when forming capacitor dielectric layer, the oxygen element in capacitor dielectric layer is not easy to immerse lower electrode
Layer, to which the charge storage of capacitor be effectively ensured.
Description of the drawings
Fig. 1 is shown as the lower electrode layer preparation process schematic diagram of array of capacitors structure in the prior art.
Fig. 2 is shown as the preparation technology flow chart of the array of capacitors structure of the present invention.
Fig. 3 is shown as forming showing for the supporting layer and sacrificial layer being alternately superimposed in the array of capacitors structure preparation of the present invention
It is intended to.
Fig. 4 is shown as forming Patterned masking layer photoetching direction schematic diagram in the array of capacitors structure preparation of the present invention.
Fig. 5 a~5h are the structural schematic diagram that Patterned masking layer is formed in prepared by the array of capacitors structure of the present invention.
Fig. 6 is shown as forming the structural schematic diagram in capacitance hole in the array of capacitors structure preparation of the present invention.
Fig. 7 is shown as forming the structural schematic diagram of lower electrode layer in the array of capacitors structure preparation of the present invention.
Fig. 8 is shown as forming the vertical view of the first opening in the array of capacitors structure preparation of the present invention, wherein AA ˊ generations
Table is longitudinal sectional along 1 directions θ.
Fig. 9 a~9d are shown as in Fig. 8 the structural schematic diagram that the section along 1 directions θ forms the first opening.
Figure 10 is shown as removing the structural schematic diagram after the second sacrificial layer in Fig. 8 along the section in 1 directions θ.
Figure 11 is shown as in Fig. 8 the section along 1 directions θ and forms the structural schematic diagram after the second opening.
Figure 12 is shown as removing the structural schematic diagram after the first sacrificial layer in Fig. 8 along the section in 1 directions θ.
Figure 13 is shown as carrying out high-temperature plasma diffusion to lower electrode layer in the array of capacitors structure preparation of the present invention
The structural schematic diagram of technique.
Figure 14 is shown as forming the structure of capacitor dielectric layer and upper electrode layer in the array of capacitors structure preparation of the present invention
Schematic diagram.
Component label instructions
1 semiconductor substrate
11 capacitor array areas
2 supporting layers
21 base layer support layers
22 middle support layers
221 second openings
23 top support layers
231 first openings
3 sacrificial layers
31 first sacrificial layers
311 the first sacrificial layers of lower layer
312 the first sacrificial layers of upper layer
32 second sacrificial layers
33 Non-overlapping Domains
4 Patterned masking layers
41 windows
42 barriers
421 polysilicon barrier layers
422 barrier oxide layers
423 carbide barrier layers
43 multi-layer mask layers
431 first dielectric anti-reflective layers
432 carbide lamellas
433 second dielectric anti-reflective layers
The 44 double-deck etched features
441 first etched features
442 second etched features
45 openings
5 capacitance holes
6 lower electrode layers
61 nitride mask layers
62 oxide mask layers
63 carbide mask layers
64 anti-reflecting layers
65 photoresist layers
7 capacitor dielectric layers
8 upper electrode layers
9 top electrode filled layers
1 first directions of θ
2 second directions of θ
Angle
S1~S6 steps 1)~step 6)
Specific implementation mode
Illustrate that embodiments of the present invention, those skilled in the art can be by this specification below by way of specific specific example
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
It please refers to Fig.1 to Figure 14.It should be noted that the diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, package count when only display is with related component in the present invention rather than according to actual implementation in schema then
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can be a kind of random change, and its
Assembly layout kenel may also be increasingly complex.
Embodiment one
Referring to Fig. 2, the present embodiment provides a kind of preparation method of array of capacitors structure, the array of capacitors structure
Preparation method include the following steps：
1) semi-conductive substrate is provided, in forming laminated construction in the semiconductor substrate, the laminated construction includes handing over
For the supporting layer and sacrificial layer of stacking；
2) in forming Patterned masking layer on the laminated construction, based on the Patterned masking layer in the laminated construction
In etch multiple capacitance holes；
3) lower electrode layer is formed in the bottom in the capacitance hole and side wall, the supporting layer connects the lower electrode layer；
4) sacrificial layer is removed, wherein the supporting layer retains on the semiconductor substrate；
5) Nitrogen ion plasma diffusion technique is carried out to the lower electrode layer, the Nitrogen ion diffuses into the lower electricity
The inner surface of pole layer and outer surface；
6) capacitor dielectric layer is formed in the inner surface of the lower electrode layer and outer surface, wherein the capacitor dielectric layer covers
The lower electrode layer is covered, upper electrode layer is formed in the outer surface of the capacitor dielectric layer, wherein described in upper electrode layer covering
Capacitor dielectric layer.
Below in conjunction with the preparation method of the attached drawing array of capacitors structure that the present invention will be described in detail.
First, as shown in the S1 and Fig. 3 in Fig. 2, step 1) is carried out, semi-conductive substrate 1 is provided, served as a contrast in the semiconductor
Laminated construction is formed on bottom 1, the laminated construction includes alternately stacked supporting layer 2 and sacrificial layer 3.
As an example, the capacitance contact node (figure that the semiconductor substrate 1, which includes several, to be located in memory array structure
Do not show).
Specifically, in a concrete structure, the semiconductor substrate 1 further includes semiconductor base (not shown), semiconductor
Active area and wordline are set in substrate, bit line and the capacitance contact node, the capacitance contact section are set on semiconductor base
Point is electrically connected the transistor source etc. in the memory array structure.
As an example, in step 1), the quantity of the supporting layer 2 of formation is more than the quantity of the sacrificial layer 3 formed,
And underlying material layers in the laminated construction that constitutes of the sacrificial layer 3 and the supporting layer 2 and quilting material layer are the branch
Support layer 2.
In a preferable example, as shown in figure 3, the quantity of the supporting layer 2 is three layers, including top support layer 23,
Middle support layer 22 and base layer support layer 21, the quantity of the sacrificial layer 3 are two layers, including be located at the base layer support layer 21 with
The first sacrificial layer 31 between the middle support layer 22 and positioned at the top support layer 23 and the middle support layer 22
Between the second sacrificial layer 32.
Specifically, atom layer deposition process (Atomic Layer Deposition) may be used or plasma vapor is heavy
Product technique (Plasma Enhenced Chemical Vapor Deposition) forms each supporting layer 2 and each sacrificial layer 3,
Such as the base layer support layer 21, first sacrificial layer 31, the middle support layer 22, second sacrificial layer 32 and described
Top support layer 23.
As an example, the material of the supporting layer 2 includes at least one in the group being made of silicon nitride, silicon oxynitride
Kind, it is preferable that the material of the supporting layer 2 includes silicon nitride.The material of the sacrificial layer 3 includes oxide, it is preferable that described
Oxide can be silica or silicon oxynitride.It should be noted that the material of the material of the sacrificial layer 3 and the supporting layer 2
Material is different, and the corrosion rate both in same etching process (such as same corrosive liquid) is different, is embodied at same a moment
In erosion process (such as same corrosive liquid), etching (as corroded) rate of the sacrificial layer 3 is far longer than the etching of the supporting layer 2
Rate so that when the sacrificial layer 3 is completely removed, the supporting layer 2 is almost fully retained.
In a preferable example, as shown in figure 3, second sacrificial layer 32 is different from the material of the first sacrificial layer 31,
The material of second sacrificial layer 32 includes silica or silicon oxynitride.The material of first sacrificial layer 31 includes boron phosphorus doping
Silica (BPSG, boron-phosphorosilicate glass), and phosphonium ion doping concentration is different at the different-thickness of first sacrificial layer 31, table
It includes the first sacrificial layer of lower layer 311 and the first sacrificial layer of upper layer 312 to be now, and the phosphonium ion of wherein the first sacrificial layer of lower layer 311 is mixed
Miscellaneous concentration is more than the phosphonium ion doping concentration of the first sacrificial layer of upper layer 312.Due to BPSG corrosion rate by boron ion and phosphorus from
The influence of sub- concentration increases the content of boron ion, and corrosion rate can decline, and increases the content of phosphonium ion, and corrosion rate can be notable
It increases, and the first sacrificial layer 31 is need to be completed in same etching process, so the lower layer first for improving the first sacrificial layer 31 is sacrificial
The phosphate ion concentration of domestic animal layer 311, can effectively ensure that the complete etching of the first sacrificial layer 31, and etching deficiency is avoided to lead to capacitor
The reduction of energy.In the present embodiment, the weight percent of the phosphonium ion content of the first sacrificial layer of the lower layer 311 is between 3%~5%
Between, the weight percent of boron ion content is between 2%~7%, the phosphonium ion content of the first sacrificial layer of the upper layer 312
Weight percent between 3%~5%, the weight percent of boron ion content is between 5%~10%.
In addition, the sacrificial layer 3 can be removed during subsequent technique, the effect of the supporting layer 2 is described
The mechanical strength of structure when sacrificial layer 3 subsequently makes capacitor as braced frame after being removed to improve, so removing above-mentioned row
Except in the case of the three layers of supporting layer and two layers of sacrificial layer lifted, the quantity of the sacrificial layer and supporting layer can be according to subsequent capacitance device
Required height is set, and the quantity of stacking can be for 1~10 time or more, wherein are advisable with 2~5 times.
Then, as in Fig. 2 S2 and Fig. 4, Fig. 5 a to Fig. 5 h and Fig. 6 shown in, carry out step 2), on the laminated construction
Patterned masking layer 4 is formed, etches multiple capacitance holes 5 in the laminated construction based on the Patterned masking layer 4.
As preferable example, the step of forming the Patterned masking layer 4, includes：
As shown in Figure 5 a, step 2-1), in sequentially forming barrier 42 in the structure that step 1) obtains, as showing
Example, the barrier 42 are three layers, include polysilicon barrier layer 421, barrier oxide layers 422 and carbide blocking successively
Layer 423.
As shown in Fig. 4 and Fig. 5 b~5c, step 2-2), in step 2-1) between obtained 1 uses of structure upper edge first direction θ
The first etched features 441 are formed away from multiplication process.
Fig. 4 is shown as forming the photoetching direction schematic diagram of the Patterned masking layer 4 in prepared by array of capacitors structure, is
Increase the making density of capacitor, it can be by the way that there is angle along two in capacitor array area 11First direction θ 1 and
Second direction θ 2 is performed etching, and forms the Non-overlapping Domain 33 of array distribution, etches the Non-overlapping Domain 33 to form capacitance
Hole 5, as shown in fig. 6, the capacitor with array distribution can be formed based on the capacitance hole 5.
Specifically, as shown in Figure 5 b, in sequentially forming multi-layer mask layer 43 and photoresist on the carbide barrier layer 423
Layer 434, as an example, the multi-layer mask layer 43 is three layers, include the first dielectric anti-reflective layer 431, carbide lamella successively
432, the second dielectric anti-reflective layer 433.As shown in Figure 5 c, it is based on the photoresist layer 434, is used along the first direction θ 1
Pitch multiplication process forms first etched features 441.
As shown in Fig. 4 and Fig. 5 d, step 2-3), in step 2-2) θ 2 uses spacing times in a second direction in obtained structure
Increase technique and form the second etched features 442, to obtain the double-deck etched features 44.As an example, forming the second etching figure
The method of shape 442 is identical as the method for forming first etched features 441, so this will not be repeated here.
As shown in Fig. 5 e~5h, step 2-4), the region other than 44 overlapping region of the double-deck etched features is etched, is formed
The Patterned masking layer 4 of window 41 with array arrangement.
Specifically, as depicted in fig. 5e, the area other than the overlapping region of 44 region of the double-deck etched features is first etched
Domain forms multiple openings 45 of the array of capacitors structure；As shown in Fig. 5 f~5h, then it is sequentially etched along the opening 45
The carbide barrier layer 423 (as shown in figure 5f), barrier oxide layers 422 (as shown in fig. 5g) and polysilicon barrier layer 421
(as shown in figure 5h), to form the Patterned masking layer 4 of the window 41 with array arrangement.As an example, the oxidation
Object barrier layer 422 includes silica barrier layer.
As shown in fig. 6, etch the supporting layer 2 and the sacrificial layer 3 based on the Patterned masking layer 4, with formed with
41 corresponding capacitance hole 5 of the window.
As an example, the specific method for forming the capacitance hole is：Dry etching is used according to the Patterned masking layer 4
Technique, wet-etching technology or dry etch process etch the supporting layer 2 and institute with the technique that wet-etching technology is combined
Sacrificial layer 3 is stated, to form the capacitance hole 5 up and down in the supporting layer 2 and the sacrificial layer 3.
Continue, as shown in the S3 and Fig. 7 in Fig. 2, carries out step 3), formed down in the bottom in the capacitance hole 5 and side wall
Electrode layer 6, the supporting layer 2 connect the lower electrode layer 6.
Preferably, using chemical vapour deposition technique in the side wall in the capacitance hole 5 and bottom and the top support layer
23 upper surface deposits lower electrode material layer, the material of the lower electrode layer 6 include by titanium nitride, titanium oxide, titanium carbide and
At least one of the group of tungsten composition, then, then using etching technics removal positioned at 23 upper surface of the top support layer
The lower electrode material layer retains under the side wall in the capacitance hole 5 and the lower electrode material layer of bottom are described
Electrode layer 6, wherein the predecessor of the chemical vapour deposition technique includes metal chloride.Since predecessor includes metal chlorination
Object has a chlorion generation so when deposition generates the lower electrode layer 6, and chlorion mixes under the lower electrode layer 6 causes
Contain impurity chlorion in electrode layer 6.The material of the lower electrode layer 6 of the present embodiment includes titanium nitride, using chemical gaseous phase
The chemical reaction that sedimentation includes is：TICl4+NH3→TIN+HCl+N2, so in deposition process, pre-reaction material TICl4
To introducing impurity chlorion in the lower electrode layer 6.
Continue, as in Fig. 2 S4 and Fig. 8 to Figure 12 shown in, carry out step 4), remove the sacrificial layer 3, wherein described
Supporting layer 2 is retained in the semiconductor substrate 1.
As an example, step 4) includes the following steps：
Step 4-1), in forming the first opening 231 in the top support layer 23, to expose the institute for being located at its lower surface
State the second sacrificial layer 32.Specifically, as illustrated in fig. 9, first in sequentially forming nitride mask layer on the top support layer 23
61, oxide mask layer 62, carbide mask layer 63, anti-reflecting layer 64 and photoresist layer 65；Then, as shown in figure 9b, base
The anti-reflecting layer 64, carbide mask layer 63, oxide mask layer 62 and nitride are etched in the exposure of the photoresist layer 65
Mask layer 61 forms the first opening 231；Finally, as shown in Fig. 9 c~9d, the oxide mask layer 62 is sequentially etched (as schemed
Shown in 9c) and nitride mask layer 61 (as shown in figure 9d).
Step 4-2), based on first opening 231, second sacrificial layer 32 is removed using wet-etching technology,
In, it is preferable that wet etching solution includes 30%~60% hydrofluoric acid, as shown in Figure 10.
Step 4-3), in forming the second opening 221 in the middle support layer 22, to expose the institute for being located at its lower surface
The first sacrificial layer 31 is stated, as shown in figure 11.
Step 4-4), based on second opening 221, first sacrificial layer 31 is removed using wet-etching technology,
In, it is preferable that wet etching solution includes 30%~60% hydrofluoric acid, as shown in figure 12.
As an example, step 4-2) and step 4-3) between further include in the top support layer 23 upper surface deposit branch
The step of supportting layer material, the top support layer 23 is thickened.This is because in step 4-2) during, the top layer branch
Support layer 23 can be removed a part, and the top support layer 23 is cut through during subsequent corrosion in order to prevent, and ensures institute
State at the support of upper layer have enough support strengths, need in step 4-2) with step 4-3) between add in the upper layer support
The step of upper surface depositing support layer material at place 23.
As an example, step 4-1) in, first opening 231 is only overlapping with a capacitance hole 5, Huo Zheyi
A first opening 231 is overlapping with multiple capacitance holes 5 simultaneously (as shown in figure 8, Fig. 8 is with first opening 231
It is overlapping as example with three capacitance holes 5)；Step 4-2) in, one it is described second opening 221 only with a capacitance
Hole 5 is overlapping or second opening 221 is overlapping with multiple capacitance holes 5 simultaneously.In the present embodiment, described in one
First opening 231 is overlapping with three capacitance holes 5 simultaneously, second opening 221 simultaneously with three capacitance holes 5
It is overlapping.
Continue, as shown in the S5 and Figure 13 in Fig. 2, carry out step 5), Nitrogen ion plasma is carried out to the lower electrode layer 6
Body diffusion technique, the Nitrogen ion diffuse into inner surface and the outer surface of the lower electrode layer 6.
As an example, step 5) includes the following steps：
Step 5-1), the structure that step 4) obtains is placed in Nitrogen ion generation device.
Step 5-2), be passed through Nitrogen ion gas source into the Nitrogen ion generation device, by microwave action generate nitrogen from
Son, the Nitrogen ion enter the lower electrode layer 6 by diffusion way.
Specifically, the operating power of the Nitrogen ion generation device is between 1.5KW~2.5KW, diffusion time between
Between 50s~60s, diffusion pressure between 0.1TORR~0.5TORR, between 350 DEG C~500 DEG C lead to by heating temperature
The Nitrogen ion gas source entered includes at least one of the group being made of nitrogen and ammonia.Gas source enters Nitrogen ion and generates dress
Set it is interior after, generate Nitrogen ion under microwave action, Nitrogen ion diffuse into the lower electrode layer 6 inner surface and outer surface in simultaneously
Impurity in the lower electrode layer 6 is squeezed out, especially impurity chlorion squeezes out, and impurity chlorion is combined with hydrogen ion generates chlorine
Change hydrogen discharge, to realize the removal of the impurity chlorion in the lower electrode layer 6.Using microwave mode generate nitrogen from
Son can also effectively reduce damage of the Nitrogen ion to lower electrode layer 6., it is preferable to use ammonia is as Nitrogen ion gas in the present embodiment
Source, ammonia produces Nitrogen ion under microwave action and hydrogen ion, Nitrogen ion can be by the impurity chlorions in the lower electrode layer 6
Removal, while hydrogen ion can also be combined with the minority impurity oxonium ion on 6 surface of the lower electrode layer and generate aqueous vapor discharge, with reality
The removal of 6 surface impurity oxonium ion of the existing lower electrode layer.
Finally, as shown in the S6 and Figure 14 in Fig. 2, step 6), the inner surface in the lower electrode layer 6 and outer surface are carried out
Form capacitor dielectric layer 7, wherein the capacitor dielectric layer 7 covers the lower electrode layer 6, in the appearance of the capacitor dielectric layer 7
Face forms upper electrode layer 8, wherein the upper electrode layer 8 covers the capacitor dielectric layer 7.
As an example, the material of the capacitor dielectric layer 7 can be selected as high K dielectric material, to improve unit area electricity
The capacitance of container, it includes by zirconium oxide (ZrOx), hafnium oxide (HfOx), titanium Zirconium oxide (ZrTiOx), ruthenium-oxide
(RuOx), at least one of the group that antimony oxide (SbOx), aluminium oxide (AlOx) form is formed by lamination.The top electrode
The material of layer 8 includes that at least one of the group being made of polysilicon, titanium nitride, titanium oxide, titanium carbide and tungsten is formed
Lamination.
Preferably, top electrode filled layer 9 is formed in the outer surface of the upper electrode layer 8, wherein the top electrode filled layer
The 9 coverings upper electrode layer 8 simultaneously fills up the gap between the upper electrode layer 8.
The present invention passes through experiment using the chloride ion impurities in Nitrogen ion plasma diffusion technique removal lower electrode layer 6
Show effectively to reduce the resistivity of lower electrode layer 6.When using titanium nitride as lower electrode layer 6, resistivity can be from 160 μ
The μ Ω of Ω .cm~180 .cm are reduced to the 40 μ Ω μ Ω of .cm~160 .cm；When tungsten, titanium, titanium silicide and cobalt silicide conduct is respectively adopted
When lower electrode layer 6, resistivity is down to the 8 μ Ω μ of .cm~15 Ω .cm, the 40 μ Ω μ of .cm~70 Ω .cm, 13 .cm~16 μ Ω respectively
μ Ω .cm, the 15 μ Ω μ Ω of .cm~20 .cm.
Embodiment two
Incorporated by reference to embodiment one with continued reference to Figure 14, the present invention also provides a kind of array of capacitors structures, wherein the electricity
Prepared by vessel array structure preparation method preferably using the present invention, certainly, it is not limited to this, the array of capacitors structure
Including：
Semiconductor substrate 1；
Lower electrode layer 6 is formed in the semiconductor substrate 1, and the cross sectional shape of the lower electrode layer 6 includes U-shaped, and institute
State the inner surface and outer surface diffusion implantation Nitrogen ion of lower electrode layer 6；
Capacitor dielectric layer 7 is covered in inner surface and the outer surface of the lower electrode layer 6；
Upper electrode layer 8 is covered in the outer surface of the capacitor dielectric layer 7.
Wherein, the inner surface of the lower electrode layer 6 and the Nitrogen ion of outer surface diffusion implantation can be by the lower electrode layers
In foreign ion squeeze out, the impurity chlorion in the especially described lower electrode layer squeezes out, to reduce in the lower electrode layer
The content of impurity, the especially content of impurity chlorion.
As an example, the capacitance contact node (figure that the semiconductor substrate 1, which includes several, to be located in memory array structure
Do not show).
Specifically, in a concrete structure, the semiconductor substrate 1 further includes semiconductor base (not shown), semiconductor
Active area and wordline are set in substrate, bit line and capacitance contact node, the capacitance contact node electricity are set on semiconductor base
Property connects the transistor source etc. in the memory array structure.
As an example, the material of the lower electrode layer 7 includes the group being made of titanium nitride, titanium oxide, titanium carbide and tungsten
One kind in group.Preferably, the material of the lower electrode layer 7 includes titanium nitride.
As an example, the array of capacitors structure further includes top support layer 23, middle support layer 22 and base layer support
Layer 21, is both formed in the semiconductor substrate 1 and connects the lower electrode layer 6, wherein the top support layer 23 connects institute
The mouth periphery of lower electrode layer 6 is stated, the middle support layer 22 connects the middle part of the lower electrode layer 6, the base layer support layer
21 are formed in 1 surface of the semiconductor substrate and connect the bottom periphery of the lower electrode layer 6.
The effect of the top support layer 23, middle support layer 22, base layer support layer 21 is to improve the capacitor
The mechanical strength of array.
The material of the preferably described top support layer 23, middle support layer 22 and base layer support layer 21 include by silicon nitride,
One kind in the group of silicon oxynitride composition.
As an example, the array of capacitors structure further includes top electrode filled layer 9, the outer of the upper electrode layer 8 is covered
Surface, and fill up the gap between the upper electrode layer 8.
As an example, the material of the upper electrode layer 8 includes by polysilicon, titanium nitride, titanium oxide, titanium carbide and tungsten group
At group in one kind, the material of the capacitor dielectric layer 7 include by zirconium oxide, hafnium oxide, titanium Zirconium oxide, ruthenium-oxide,
One kind in the group that antimony oxide, aluminium oxide form.
Array of capacitors structure proposed by the present invention, by being planted in the inner surface of the lower electrode layer 6 and outer surface diffusion
Enter Nitrogen ion, is shown experimentally that the resistivity that can effectively reduce lower electrode layer 6.When using titanium nitride as lower electrode layer 6,
Its resistivity can be reduced to the 40 μ Ω μ Ω of .cm~160 .cm from the 160 μ Ω μ Ω of .cm~180 .cm；When tungsten, titanium, silicon is respectively adopted
When changing titanium and cobalt silicide as lower electrode layer 6, resistivity is down to the 8 μ Ω μ of .cm~15 Ω .cm, 40 μ Ω .cm~70 μ respectively
Ω .cm, the 13 μ Ω μ of .cm~16 Ω .cm, the 15 μ Ω μ Ω of .cm~20 .cm.
In conclusion the array of capacitors structure and preparation method thereof of the present invention, the preparation method of the array of capacitors
Include the following steps：1) semi-conductive substrate is provided, in forming laminated construction, the lamination packs in the semiconductor substrate
Include alternately stacked supporting layer and sacrificial layer；2) in forming Patterned masking layer on the laminated construction, based on described graphical
Mask layer etches multiple capacitance holes in the laminated construction；3) lower electrode is formed in the bottom in the capacitance hole and side wall
Layer, the supporting layer connect the lower electrode layer；4) sacrificial layer is removed, wherein the supporting layer, which is retained in, described partly leads
In body substrate；5) to the lower electrode layer carry out Nitrogen ion plasma diffusion technique, the Nitrogen ion diffuse into it is described under
The inner surface of electrode layer and outer surface；6) capacitor dielectric layer is formed in the inner surface of the lower electrode layer and outer surface, wherein institute
It states capacitor dielectric layer and covers the lower electrode layer, upper electrode layer is formed in the outer surface of the capacitor dielectric layer, wherein on described
Electrode layer covers the capacitor dielectric layer.The present invention is handled lower electrode layer using Nitrogen ion plasma diffusion technique,
Nitrogen ion, which enters in lower electrode layer, squeezes out impurity therein, and especially impurity chlorion squeezes out, impurity chlorion and hydrogen ion
In conjunction with hydrogen chloride gas discharge is generated, to reduce the content of impurity chlorion in lower electrode layer, make lower electrode layer and substrate
Stable connection improves the electrical connection stability of capacitor；In addition chlorion and hydrogen ion, which combine, generates hydrogen chloride gas discharge, can
The corrosion for effectively reducing impurity chlorine ion pair lower electrode layer, reduces the leakage rate of capacitor；Finally, capacitor dielectric layer is being formed
When, the oxygen element in capacitor dielectric layer is not easy to immerse lower electrode layer, to which the charge storage of capacitor be effectively ensured.Institute
With the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology can all carry out modifications and changes to above-described embodiment without violating the spirit and scope of the present invention.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should by the present invention claim be covered.
Claims (26)
1. a kind of preparation method of array of capacitors structure, which is characterized in that the preparation method packet of the array of capacitors structure
Include following steps：
1) semi-conductive substrate is provided, in forming laminated construction in the semiconductor substrate, the laminated construction includes alternating layer
Folded supporting layer and sacrificial layer；
2) it in forming Patterned masking layer on the laminated construction, is carved in the laminated construction based on the Patterned masking layer
Lose multiple capacitance holes；
3) lower electrode layer is formed in the bottom in the capacitance hole and side wall, the supporting layer connects the lower electrode layer；
4) sacrificial layer is removed, wherein the supporting layer retains on the semiconductor substrate；
5) Nitrogen ion plasma diffusion technique is carried out to the lower electrode layer, the Nitrogen ion diffuses into the lower electrode layer
Inner surface and outer surface；
6) capacitor dielectric layer is formed in the inner surface of the lower electrode layer and outer surface, wherein the capacitor dielectric layer covers institute
Lower electrode layer is stated, upper electrode layer is formed in the outer surface of the capacitor dielectric layer, wherein the upper electrode layer covers the capacitance
Dielectric layer.
2. the preparation method of array of capacitors structure according to claim 1, it is characterised in that：Step 3) is formed described
Contain impurity chlorion in lower electrode layer, Nitrogen ion described in step 5) diffuses into the inner surface and appearance of the lower electrode layer
Face, and the impurity chlorion is squeezed out, to remove the impurity chlorion.
3. the preparation method of array of capacitors structure according to claim 1, it is characterised in that：Using chemical vapor deposition
Method forms the lower electrode layer in the bottom in the capacitance hole and side wall, wherein the predecessor packet of the chemical vapour deposition technique
Containing metal chloride.
4. the preparation method of array of capacitors structure according to claim 3, it is characterised in that：The material of the lower electrode layer
Material includes at least one of the group being made of titanium nitride, titanium oxide, titanium carbide and tungsten.
5. the preparation method of array of capacitors structure according to claim 3, it is characterised in that：The lower electrode layer includes
Titanium nitride layer forms the titanium nitride layer, the chemistry using chemical vapour deposition technique in the bottom in the capacitance hole and side wall
Vapour deposition process includes reaction：TICl4+NH3→TIN+HCl+N2, wherein the predecessor TICl4The lower electrode layer is set to contain
There is the impurity chlorine ion.
6. the preparation method of array of capacitors structure according to claim 1, it is characterised in that：The laminated construction includes
Base layer support layer, the first sacrificial layer, middle support layer, the second sacrificial layer and the top support layer stacked gradually.
7. the preparation method of array of capacitors structure according to claim 6, it is characterised in that：First sacrificial layer
Material includes the silica (BPSG) of boron phosphorus doping, and the material of second sacrificial layer includes oxide, wherein described first is sacrificial
Domestic animal layer includes the first sacrificial layer of the first sacrificial layer of upper layer and lower layer, and the phosphonium ion doping concentration of the first sacrificial layer of lower layer is more than upper
The phosphonium ion doping concentration of the first sacrificial layer of layer.
8. the preparation method of array of capacitors structure according to claim 7, it is characterised in that：The lower layer first sacrifices
The weight percent of the phosphonium ion content of layer is between 3%~5%, and the weight percent of boron ion content is between 2%~7%
Between, the weight percent of the phosphonium ion content of the first sacrificial layer of the upper layer between 3%~5%, boron ion content
Weight percent is between 5%~10%.
9. the preparation method of array of capacitors structure according to claim 1, it is characterised in that：Step 2) includes following step
Suddenly：
2-1) in sequentially forming barrier in the structure that step 1) obtains；
2-2) in step 2-1) obtained structure upper edge first direction forms the first etched features using pitch multiplication process；
2-3) in step 2-2) use pitch multiplication process to form the second etched features in a second direction in obtained structure, to
Obtain the double-deck etched features, wherein the first direction has angle with second direction；
The region other than the double-deck etched features overlapping region 2-4) is etched, the Patterned masking layer is formed.
10. the preparation method of array of capacitors structure according to claim 9, it is characterised in that：The barrier
Include polysilicon barrier layer, barrier oxide layers and carbide barrier layer successively；And step 2-4) include the following steps：
The region other than the overlapping region of the double-deck etched features region 2-4-1) is etched, the array of capacitors is formed
Multiple openings of structure；
It 2-4-2) is sequentially etched the polysilicon barrier layer, barrier oxide layers and silicide barrier layer along the opening, with shape
At the Patterned masking layer.
11. the preparation method of array of capacitors structure according to claim 10, it is characterised in that：The oxide barrier
Layer includes silica barrier layer.
12. the preparation method of array of capacitors structure according to claim 6, it is characterised in that：Step 4) includes as follows
Step：
4-1) in forming the first opening in the top support layer, with exposure second sacrificial layer；
It 4-2) is based on described first to be open, second sacrificial layer is removed using wet-etching technology；
4-3) in forming the second opening in the middle support layer, with exposure first sacrificial layer；
It 4-4) is based on described second to be open, first sacrificial layer is removed using wet-etching technology.
13. the preparation method of array of capacitors structure according to claim 12, it is characterised in that：Step 4-2) in it is wet
Method etching solution includes 30%~60% hydrofluoric acid, step 4-4) in wet etching solution include 30%~60% hydrogen fluorine
Acid.
14. the preparation method of array of capacitors structure according to claim 12, it is characterised in that：Rapid 4-1) in, one
First opening is only overlapped with a capacitance hole or first opening is handed over multiple capacitance holes simultaneously
It is folded；Step 4-3) in, second opening is only overlapped with a capacitance hole or one described second is open simultaneously
It is overlapping with multiple capacitance holes.
15. the preparation method of array of capacitors structure according to claim 14, it is characterised in that：One described first is opened
Mouth is overlapping with three capacitance holes simultaneously, and second opening is overlapped with three capacitance holes simultaneously.
16. the preparation method of array of capacitors structure according to claim 1, it is characterised in that：The material of the supporting layer
Material includes at least one of the group that is made of silicon nitride, silicon oxynitride, the material of the upper electrode layer include by polysilicon,
The material of at least one of the group of titanium nitride, titanium oxide, titanium carbide and tungsten composition, the capacitor dielectric layer includes by oxygen
Change at least one of the group of zirconium, hafnium oxide, titanium Zirconium oxide, ruthenium-oxide, antimony oxide, aluminium oxide composition.
17. according to the preparation method of claim 1-16 any one of them array of capacitors structures, it is characterised in that：Step 5)
Include the following steps：
5-1) structure that step 4) obtains is placed in Nitrogen ion generation device；
It 5-2) is passed through Nitrogen ion gas source into the Nitrogen ion generation device, Nitrogen ion, the nitrogen are generated by microwave action
Ion enters the lower electrode layer by diffusion way, to remove the impurity chlorion in the lower electrode layer.
18. the preparation method of array of capacitors structure according to claim 17, it is characterised in that：The Nitrogen ion generates
The operating power of device between 1.5KW~2.5KW, diffusion time between 50s~60s, diffusion pressure between
Between 0.1TORR~0.5TORR, heating temperature is between 350 DEG C~500 DEG C.
19. the preparation method of array of capacitors structure according to claim 17, it is characterised in that：The Nitrogen ion gas being passed through
Body source includes at least one of the group being made of nitrogen and ammonia.
20. a kind of array of capacitors structure, which is characterized in that including：
Semiconductor substrate；
Lower electrode layer is formed in the semiconductor substrate, and the cross sectional shape of the lower electrode layer includes U-shaped, and the lower electricity
The inner surface and outer surface diffusion implantation Nitrogen ion of pole layer；
Capacitor dielectric layer is covered in inner surface and the outer surface of the lower electrode layer；
Upper electrode layer is covered in the outer surface of the capacitor dielectric layer.
21. array of capacitors structure according to claim 20, it is characterised in that：The material of the lower electrode layer includes nitrogen
Change titanium.
22. array of capacitors structure according to claim 20, it is characterised in that：The material of the lower electrode layer include by
One kind in the group of titanium oxide, titanium carbide and tungsten composition.
23. array of capacitors structure according to claim 20, it is characterised in that：The array of capacitors structure further includes
Top support layer, middle support layer and base layer support layer are both formed in the semiconductor substrate and connect the lower electrode layer,
Wherein, the top support layer connects the mouth periphery of the lower electrode layer, and the middle support layer connects the lower electrode layer
Middle part, the base layer support layer is formed in the bottom periphery of the semiconductor substrate surface and the connection lower electrode layer.
24. array of capacitors structure according to claim 23, it is characterised in that：The top support layer, intermediate supports
The material of layer and base layer support layer includes one kind in the group being made of silicon nitride, silicon oxynitride.
25. array of capacitors structure according to claim 20, it is characterised in that：The array of capacitors structure further includes
Top electrode filled layer, covers the outer surface of the upper electrode layer, and fills up the gap between the upper electrode layer.
26. array of capacitors structure according to claim 20, it is characterised in that：The material of the upper electrode layer include by
One kind in the group that polysilicon, titanium nitride, titanium oxide, titanium carbide and tungsten form, the material of the capacitor dielectric layer include
One kind in the group be made of zirconium oxide, hafnium oxide, titanium Zirconium oxide, ruthenium-oxide, antimony oxide, aluminium oxide.
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