CN108538811A - With the low stopping area differential transfer structure and its interlayer interconnection structure of silicon hole - Google Patents
With the low stopping area differential transfer structure and its interlayer interconnection structure of silicon hole Download PDFInfo
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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Abstract
The present invention discloses a kind of low stopping area differential transfer structure and its interlayer interconnection structure with silicon hole.The present invention significantly improves the thermodynamic behaviour of difference silicon hole transmission structure while taking into account shielding difference silicon hole superior electrical transmission performance.It is embodied in the reduction for preventing layout area caused by being mismatched due to thermal stress in the differential transfer structure preparation process using silicon hole, is conducive to the raising of the transistor integrated level in large scale array.In the practical application of three dimensional integrated circuits, the differential signal transmission between multilayered structure is often related to.To improve efficiency of transmission, the present invention discloses a kind of cross-connect method of interlayer structure.
Description
Technical field
The invention belongs to three dimensional integrated circuits fields, and in particular to a kind of high-performance differential transfer with annular silicon hole
Structure and its interlayer interconnection structure.
Background technology
One of key technology as three dimensional integrated circuits, silicon hole technology have obtained extensive research.Utilize silicon hole
Technology, three dimensional integrated circuits can obtain higher integrated level, shorter interconnection length, better noise inhibiting ability and more
Low capacity loss.But with the raising of signal frequency, the problems of Signal Integrity that silicon hole technology is brought also increasingly significant,
The crosstalk being mainly reflected between silicon hole and the current leakage between substrate.On the other hand, during actual processing, by
The coefficient of thermal expansion of multiple material has differences in silicon hole, and thermal stress causes silicon hole surrounding substrate carrier mobility
It changes.In order to keep the performance of device in integrated circuit, the layout that limit transistor is carried out in block area is introduced.
In the way of differential signal transmission, the transmission quality of signal can effectively improve.In this regard, it has been proposed that ground-signal-
The difference silicon hole transmission structure of signal-ground structure ensures the transmission quality of high speed signal, but this structure can not avoid difference
Crosstalk between.Later again it has been proposed that shielding difference through-silicon via structure (105810663 A of CN), this structure can be effective
The crosstalk between differential pair is shielded, and then more improves signal transmission quality, but due to its larger diameter shielding construction and processing
The presence of thermal stress, block area also significantly increase in the process, are unfavorable for the close arrangement of three dimensional integrated circuits transistor.
Invention content
There are problems for above-mentioned by the present invention, it is proposed that a kind of high-performance differential transfer structure with annular silicon hole.
The present invention significantly improves difference silicon hole transmission structure while taking into account shielding difference silicon hole superior electrical transmission performance
Thermodynamic behaviour.It is embodied in the differential transfer structure preparation process using silicon hole since thermal stress mismatch causes
Block area reduction.
The present invention is located at the differential transfer structure of annular silicon hole in silicon substrate, includes external screen successively from outside to inside
Cover silicon hole, internal silicon substrate and internal difference silicon hole.Exterior shield silicon hole is both that the electric current of difference transmission lines returns to road
Diameter is the shielding shell of difference transmission lines again (for completely cutting off external interference).Silicon hole is shielded by first medium layer, outer annular
Silicon hole inner core and second dielectric layer composition.The first medium layer act as straight between isolation shielding silicon hole and silicon substrate
Leakage is flowed, is made of insulating materials such as silica or silicon nitrides.The outer annular silicon hole inner core is by copper, carbon nanotube
Or the filling of other metallic conductors, it acts as serve as current return path and completely cut off external disturbance.The second dielectric layer is made
With the direct current leakage between isolation shielding silicon hole and internal silicon substrate, by the insulating materials group such as silica or silicon nitride
At.
Within shielding silicon hole, outer surface contacts internal silicon substrate with second dielectric layer.The internal silicon substrate
Column empty slot is carved with for being embedded in difference silicon hole pair in inside.Internal silicon substrate is upper identical as external silicon substrate in material composition,
It is silicon materials.
Difference silicon hole respectively includes third medium from outside to inside to being made of the identical annular silicon hole of two structures
Layer, annular difference silicon hole inner core and internal filling.The third dielectric layer act as isolation difference silicon hole and is served as a contrast with internal silicon
Direct current leakage between bottom is made of insulating materials such as silica or silicon nitrides.It is described annular difference silicon hole inner core by
Copper, carbon nanotube or the filling of other metallic conductors, it acts as differential signal transmissions.There are three types of standby for internal filling of the present invention
Select scheme.Described internal the first alternative of filling is that core inner filling is filled by silicon materials in annular difference silicon hole, this
When the 4th dielectric layer need to be added between annular difference silicon hole inner core and internal filling.Second of alternative side of the internal filling
Case is that core inner filling is filled by earth silicon material in annular difference silicon hole, since earth silicon material is insulator material
Material is then not necessarily to that the 4th dielectric layer is added.Described internal the third alternative of filling is that core inner is filled out in annular difference silicon hole
It fills and is filled by organic polymer, since organic polymer is insulating material, then be not necessarily to that the 4th dielectric layer is added.
It can be related to the interconnection of multilayer silicon hole transmission structure in three dimensional integrated circuits, the present invention discloses a kind of logical using silicon
Differential signal transmission interconnection structure between the high-performance layer in hole, this structure is by multilayer differential transfer structure composition setting up and down.On
Layer differential transfer structure includes upper layer the first difference silicon hole and upper layer the second difference silicon hole, and lower layer's difference adjacent thereto passes
Defeated structure includes lower layer's the first difference silicon hole and lower layer's the second difference silicon hole.Its first difference silicon hole and lower layer at the middle and upper levels
First difference silicon hole center on vertical structure is aligned, and upper layer the second difference silicon hole and lower layer's the second difference silicon hole are being hung down
Center alignment in straight structure.The pedestal is located at upper layer difference silicon hole to end and lower layer's difference silicon hole to top,
For the connection between difference silicon hole pair and on piece interconnection line.The on piece interconnection line is used for the interconnection of interlayer silicon hole.Institute
On piece via is stated for the interconnection between upper layer interconnection line and lower interconnection line.The upper layer the first difference silicon hole and the first welding
Salient point is connected.First pedestal is connected with the first interconnection line of upper layer.The first interconnection line of the upper layer and the first on piece mistake
Hole is connected.The first on piece via is connected with the second pedestal.Second pedestal is logical with lower layer's the second difference silicon
Hole is connected.The upper layer the second difference silicon hole is connected with third pedestal.The third pedestal is mutual with upper layer second
Line is connected.The second interconnection line of the upper layer is connected with the second on piece via.The second on piece via and the 4th pedestal
It is connected.4th pedestal is connected with lower layer the first difference silicon hole.Therefore, upper layer the first difference silicon hole and lower layer the
Two difference silicon holes, which are intersected, to be connected, and upper layer the second difference silicon hole intersects with lower layer the first difference silicon hole and is connected, and the method can
Reduce the transmission loss and external disturbance of differential signal.The beneficial effects of the invention are as follows：
The present invention constitutes a kind of high performance differential transfer structure with annular silicon hole, is keeping and tradition shielding difference
While silicon hole identical superior electrical characteristics, the width of block area caused by being mismatched due to coefficient of thermal expansion is significantly reduced
Degree, it is specific as follows：
1, have benefited from exterior shield silicon hole, this structure is used to effectively completely cut off external disturbance when signal transmission, ensure that
The high-property transmission of internal differential signal.
2, have benefited from internal differential transfer silicon hole, this structure can be used for the high efficiency of transmission of integrated circuit high speed signal.
3, the loop configuration for having benefited from internal differential transfer silicon hole, can effectively reduce transmission structure in process
Prevention be laid out layer, be conducive to transistor in large scale array silicon hole layout circuit integrated level improve.
The present invention discloses the interlayer cross-bar interconnection structure of differential transfer structure, can be used for Multi-layer silicon in three dimensional integrated circuits
Between differential signal transmission.The method can effectively reduce the transmission loss of differential signal and inhibit external disturbance.
Description of the drawings
Fig. 1 is a kind of three dimensional sectional view of the differential transfer structure 100 with annular silicon hole；
Fig. 2 is a kind of top view of the differential transfer structure 100 with annular silicon hole；
Fig. 3 is a kind of heartcut side view of the differential transfer structure 100 with annular silicon hole；
Fig. 4 is 200 structure chart of exterior shield silicon hole；
Fig. 5 is 300 structure chart of internal silicon substrate；
Fig. 6 is annular 400 structure chart of difference silicon hole differential pair；
Fig. 7 is 500 structure chart of interlayer difference interconnecting silicon through holes；
Fig. 8 is 600 structural schematic diagram of interconnection for connecting interlayer silicon hole；
Fig. 9 is 700 schematic diagram of interconnection structure and on piece via for connecting lower layer's silicon hole；
Figure 10 is 800 schematic diagram of interconnection structure for connecting upper layer silicon hole；
Figure 11~17 are a kind of differential transfer structural manufacturing process flow diagram with annular silicon hole；
Figure 18 is the electricity transmission characteristic comparison diagram of differential transfer structure of the present invention and tradition shielding difference silicon hole；
Figure 19 is the block area width versus figure caused by differential transfer structure of the present invention and tradition shielding difference silicon hole.
Specific implementation mode
Below in conjunction with attached drawing, the invention will be further described.
As shown in Figure 1, 2, 3, be located in silicon substrate with the differential transfer structure 100 of annular silicon hole, from outside to inside according to
Secondary includes exterior shield silicon hole 200, internal silicon substrate 300 and internal difference silicon hole 400.
As shown in figure 4, exterior shield silicon hole 200 is both the current return path and differential transfer of difference transmission lines
The shielding shell of line (for completely cutting off external interference).Silicon hole 200 is shielded by first medium layer 201, outer annular silicon hole
Core 202 and second dielectric layer 203 form.The first medium layer 201 is act as between isolation shielding silicon hole and silicon substrate
Direct current leakage is made of insulating materials such as silica or silicon nitrides.The outer annular silicon hole inner core 202 is by copper, carbon
Nanotube or the filling of other metallic conductors, it acts as serve as current return path and completely cut off external disturbance.Described second is situated between
Matter layer 203 act as the direct current leakage between isolation shielding silicon hole 200 and internal silicon substrate 300, by silica or nitrogen
The insulating materials such as SiClx form.
As shown in figure 5, internal silicon substrate 300 is within shielding silicon hole 200, and by the identical difference silicon of two structures
Through-hole 400 is embedded into its inner cylindrical empty slot 301.300 material of internal silicon substrate is identical as external silicon substrate material, is silicon
Material.
As shown in fig. 6, difference silicon hole 400 includes third dielectric layer 401, annular difference silicon hole inner core from outside to inside
402 fill 403 with internal.The third dielectric layer 401 is act as between isolation difference silicon hole 400 and internal silicon substrate 300
Direct current leakage, be made of insulating materials such as silica or silicon nitrides.The annular difference silicon hole inner core 402 by copper,
Carbon nanotube or the filling of other metallic conductors, it acts as differential signal transmissions.There are three types of standby for internal filling 403 of the present invention
Select scheme.403 the first alternative of the internal filling are to be filled by silicon materials inside annular difference silicon hole inner core 402,
The 4th dielectric layer 404 need to be added between annular difference silicon hole inner core 402 and internal filling 403 at this time.4th medium
Layer 404 is made of insulating materials such as silica or silicon nitrides.403 second of alternative of the internal filling is annular difference
It is filled by earth silicon material inside silicon hole inner core 402, since earth silicon material is insulating material, then is not necessarily to be added the
Four dielectric layers.403 the third alternative of the internal filling are inside annular difference silicon hole inner core 402 by organic polymer
Filling since organic polymer is insulating material is then not necessarily to that the 4th dielectric layer is added.
It can be related to the interconnection of multilayer silicon hole transmission structure in three dimensional integrated circuits, the present invention discloses a kind of high-performance layer
Between differential signal transmission interconnection structure, this structure is composed of multiple units.As shown in Fig. 7,8,9,10, the unit includes upper layer
First difference silicon hole 801, upper layer the second difference silicon hole 802, lower layer's the first difference silicon hole 803, lower layer's the second difference silicon
Through-hole 804, pedestal, chip-level interconnection line and on piece via.The upper layer the first difference silicon hole 801 and the upper layer
Second difference silicon hole 802 constitutes upper layer difference silicon hole pair.The lower layer the first difference silicon hole 803 and the lower layer second
Difference silicon hole 804 constitutes lower layer's difference silicon hole pair.The upper layer the first difference silicon hole 801 and lower layer's the first difference silicon are logical
The center on vertical structure of hole 803 is aligned.The upper layer the second difference silicon hole 802 and lower layer's the second difference silicon hole 804 exist
Center is aligned on vertical structure.The pedestal is located at upper layer difference silicon hole to end and lower layer's difference silicon hole to top
End, for the connection between difference silicon hole pair and on piece interconnection line.The on piece interconnection line is used for the interconnection of interlayer silicon hole.
The on piece via is for the interconnection between upper layer interconnection line and lower interconnection line.The upper layer the first difference silicon hole 801 and
One pedestal 603 is connected.First pedestal 603 is connected with the first interconnection line of upper layer 601.The upper layer first interconnects
Line 601 is connected with the first on piece via 504.The first on piece via 504 is connected with lower layer the first interconnection line 502.Under described
The first interconnection line of layer is connected with the second pedestal 506.Second pedestal 506 and lower layer's the second difference silicon hole 804
It is connected.The upper layer the second difference silicon hole 802 is connected with third pedestal 604.The upper layer the second difference silicon hole 802
It is connected with third pedestal 604.The third pedestal 604 is connected with the second interconnection line of upper layer 602.The upper layer second
Interconnection line 602 is connected with the second on piece via 503.The second on piece via 503 is connected with lower layer the second interconnection line 501.Institute
The second interconnection line of lower layer 501 is stated with the 4th pedestal 505 to be connected.4th pedestal 505 and lower layer's the first difference silicon
Through-hole 803 is connected.Therefore, the first difference of upper layer silicon hole 801 intersects with lower layer the second difference silicon hole 804 and is connected, upper layer
Two difference silicon holes 802 hand over 803 to intersect to be connected with lower layer the first difference silicon hole, and the transmission that the method can reduce differential signal is damaged
Consumption and external disturbance.
Figure 10 is that the interlayer of two layers of differential transfer structure interconnects schematic diagram (exterior shield silicon hole is not drawn), in conjunction with this
The course of work for scheming this structure is as follows：Differential signal is flowed by the input port 805 and 806 of upper layer differential transfer structure respectively,
Difference silicon hole 801 and 802 is flowed through, on piece interlayer interconnection structure 601 is then flowed by upper layer pedestal 603 and 604 respectively
With 604, then flow separately through upper layer interconnection line and on piece via 504 and 503 flows into lower interconnection line 502 and 501, it is convex via welding
Point 506 and 505 separately flows into lower layer's difference silicon hole 804 and 803.Multilayer transmission structure then repeats the above process, and realizes difference
The downward transmission of signal (transmission is then on the contrary upwards).It is thus achieved that differential signal by upper layer the first difference silicon hole 801 under
The second difference silicon hole 804 of layer is intersected, by upper layer the second difference silicon hole 802 to the friendship of lower layer's the first difference silicon hole friendship 803
Fork transmission.
With the differential transfer structure preparation method of the first alternative, include the following steps：
1, annular groove is etched on a silicon substrate using deep reaction ion etching method, at this time internal silicon substrate 300 and outside
Substrate only bottom is connected, as shown in Figure 11 a and Figure 11 b.
2, first medium layer 201 is formed in annular rooved face and second dielectric layer 203 is gone forward side by side using chemical vapour deposition technique
Row chemical polishing, as shown in figure 12.
3, it prepares shielding silicon hole 202 using chemical vapour deposition technique and carries out chemical polishing, as shown in figure 13.
4, two annular grooves are etched on internal silicon substrate 300 using deep reaction ion etching method, as shown in figure 14.
5, third dielectric layer 401 is formed in annular rooved face and the 4th dielectric layer 404 is gone forward side by side using chemical vapour deposition technique
Row chemical polishing, as shown in figure 15.
6, it prepares annular difference silicon hole 402 using chemical vapour deposition technique and carries out chemical polishing, such as Figure 16 a, 16b institute
Show.
7, by rough lapping and fine lapping two procedures, substrate bottom is ground to exposing shielding silicon hole 300 and difference
Silicon hole 400, as shown in figure 17.
So far, it is prepared and is completed using the difference silicon hole transmission structure of the first alternative, second standby
Select the preparation method of scheme and the third alternative similar with the first alternative preparation method.
Figure 18 is the electricity transmission characteristic comparison diagram of differential transfer structure of the present invention and tradition shielding difference silicon hole.
Figure 19 is the block area width versus figure caused by differential transfer structure of the present invention and tradition shielding difference silicon hole.
Claims (3)
1. with the low stopping area differential transfer structure of silicon hole, it is located in silicon substrate, it is characterised in that wrap successively from outside to inside
Include exterior shield silicon hole, internal silicon substrate and internal difference silicon hole pair；
The exterior shield silicon hole includes first medium layer, outer annular silicon hole inner core and second dielectric layer；Wherein
One dielectric layer is used to completely cut off the direct current leakage between exterior shield silicon hole and silicon substrate, and material is insulating materials；Outer annular
Silicon hole inner core is filled by copper, carbon nanotube or other metallic conductors, for serving as current return path and completely cutting off external dry
It disturbs；Second dielectric layer is used to completely cut off the direct current leakage between exterior shield silicon hole and internal silicon substrate, and material is insulating materials；
Within exterior shield silicon hole, outer surface contacts the inside silicon substrate with second dielectric layer, is inside carved with column
Shape empty slot is for being embedded in difference silicon hole pair；
The difference silicon hole respectively includes third medium from outside to inside to being made of the identical annular silicon hole of two structures
Layer, annular difference silicon hole inner core and internal filling；Wherein third dielectric layer is for completely cutting off difference silicon hole and internal silicon substrate
Between direct current leakage, material is insulating materials；Annular difference silicon hole inner core is filled out by copper, carbon nanotube or other metallic conductors
It fills, is used for transmission differential signal；Inside filling material is earth silicon material or organic polymer.
2. with the low stopping area differential transfer structure of silicon hole, it is located in silicon substrate, it is characterised in that wrap successively from outside to inside
Include exterior shield silicon hole, internal silicon substrate and internal difference silicon hole pair；
The exterior shield silicon hole includes first medium layer, outer annular silicon hole inner core and second dielectric layer；Wherein
One dielectric layer is used to completely cut off the direct current leakage between exterior shield silicon hole and silicon substrate, and material is insulating materials；Outer annular
Silicon hole inner core is filled by copper, carbon nanotube or other metallic conductors, for serving as current return path and completely cutting off external dry
It disturbs；Second dielectric layer is used to completely cut off the direct current leakage between exterior shield silicon hole and internal silicon substrate, and material is insulating materials；
Within exterior shield silicon hole, outer surface contacts the inside silicon substrate with second dielectric layer, is inside carved with column
Shape empty slot is for being embedded in difference silicon hole pair；
The difference silicon hole respectively includes third medium from outside to inside to being made of the identical annular silicon hole of two structures
Layer, annular difference silicon hole inner core, the 4th dielectric layer and internal filling；Wherein third dielectric layer for completely cut off difference silicon hole with
Direct current leakage between internal silicon substrate, material are insulating materials；Annular difference silicon hole inner core by copper, carbon nanotube or other
Metallic conductor is filled, and differential signal is used for transmission；Between the annular difference silicon hole inner core of 4th dielectric layer setting and internal filling,
Material is insulating materials；Inside filling material is silicon materials.
3. with the low stopping area differential transfer interlayer interconnection structure of silicon hole, it is characterised in that setting up and down such as power by multilayer
Profit requires the differential transfer structure composition described in 1 or 2；
Upper layer differential transfer structure includes upper layer the first difference silicon hole and upper layer the second difference silicon hole, lower layer adjacent thereto
Differential transfer structure includes lower layer's the first difference silicon hole and lower layer's the second difference silicon hole；Its first difference silicon hole at the middle and upper levels
It is aligned with lower layer's the first difference silicon hole center on vertical structure, upper layer the second difference silicon hole and lower layer's the second difference silicon are logical
Hole center on vertical structure is aligned；
Differential signal is flowed by the input port of upper layer differential transfer structure respectively, flows through upper layer the first difference silicon hole and upper layer
Then second difference silicon hole flows into lower layer's the second difference silicon hole and lower layer's the first difference silicon hole again respectively；Multilayer transmission
Structure then repeats the above process, and realizes the downward transmission of differential signal, and transmission is then on the contrary upwards；It is thus achieved that differential signal by
Upper layer the first difference silicon hole is to lower layer's the second difference silicon hole Cross transfer, by upper layer the second difference silicon hole to lower layer first
The Cross transfer that difference silicon hole is handed over.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109411433A (en) * | 2018-09-28 | 2019-03-01 | 杭州电子科技大学 | A kind of more bit through-silicon via structures of shielding difference and preparation method thereof |
| CN109449138A (en) * | 2018-09-28 | 2019-03-08 | 杭州电子科技大学 | A kind of more bit through-silicon via structures of difference and preparation method thereof |
| CN109546278A (en) * | 2018-10-25 | 2019-03-29 | 西安电子科技大学 | A kind of three-dimensional coupler and preparation method thereof based on through silicon via |
| WO2020085719A1 (en) * | 2018-10-26 | 2020-04-30 | 삼성전자 주식회사 | Substrate connection member comprising substrate having opening part, which encompasses region in which through wire is formed, and conductive member formed on side surface of opening part, and electronic device comprising same |
| CN111244066A (en) * | 2019-08-09 | 2020-06-05 | 杭州电子科技大学 | Differential silicon through hole structure convenient for process production and capable of saving chip area and process thereof |
| CN113192928A (en) * | 2021-04-25 | 2021-07-30 | 复旦大学 | Through silicon via array |
| WO2022233220A1 (en) * | 2021-05-07 | 2022-11-10 | 中兴通讯股份有限公司 | Shielding differential vias, fabrication methods therefor, and differential signal high-speed channel |
| WO2024021693A1 (en) * | 2022-07-28 | 2024-02-01 | 长鑫存储技术有限公司 | Semiconductor structure and manufacturing method therefor |
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| CN109411433A (en) * | 2018-09-28 | 2019-03-01 | 杭州电子科技大学 | A kind of more bit through-silicon via structures of shielding difference and preparation method thereof |
| CN109449138A (en) * | 2018-09-28 | 2019-03-08 | 杭州电子科技大学 | A kind of more bit through-silicon via structures of difference and preparation method thereof |
| CN109411433B (en) * | 2018-09-28 | 2022-09-13 | 杭州电子科技大学 | Shielding differential multi-bit silicon through hole structure and preparation method thereof |
| CN109449138B (en) * | 2018-09-28 | 2022-09-02 | 杭州电子科技大学 | Differential multi-bit silicon through hole structure and preparation method thereof |
| CN109546278B (en) * | 2018-10-25 | 2021-05-28 | 西安电子科技大学 | Three-dimensional coupler based on through silicon via and preparation method thereof |
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| WO2020085719A1 (en) * | 2018-10-26 | 2020-04-30 | 삼성전자 주식회사 | Substrate connection member comprising substrate having opening part, which encompasses region in which through wire is formed, and conductive member formed on side surface of opening part, and electronic device comprising same |
| US11690179B2 (en) | 2018-10-26 | 2023-06-27 | Samsung Electronics Co., Ltd. | Substrate connection member comprising substrate having opening part, which encompasses region in which through wire is formed, and conductive member formed on side surface of opening part, and electronic device comprising same |
| KR102611780B1 (en) * | 2018-10-26 | 2023-12-11 | 삼성전자 주식회사 | Electronic device and substrate connecting member comprising opening surrounding region where through wiring is formed and substrate having conductive member formed on the side of the opening |
| CN111244066A (en) * | 2019-08-09 | 2020-06-05 | 杭州电子科技大学 | Differential silicon through hole structure convenient for process production and capable of saving chip area and process thereof |
| CN111244066B (en) * | 2019-08-09 | 2021-12-07 | 杭州电子科技大学 | Differential silicon through hole structure convenient for process production and capable of saving chip area and process thereof |
| CN113192928A (en) * | 2021-04-25 | 2021-07-30 | 复旦大学 | Through silicon via array |
| WO2022233220A1 (en) * | 2021-05-07 | 2022-11-10 | 中兴通讯股份有限公司 | Shielding differential vias, fabrication methods therefor, and differential signal high-speed channel |
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