CN105280617A - Heavily doped silicon shielding silicon through hole structure and manufacturing method thereof - Google Patents
Heavily doped silicon shielding silicon through hole structure and manufacturing method thereof Download PDFInfo
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- CN105280617A CN105280617A CN201510671943.1A CN201510671943A CN105280617A CN 105280617 A CN105280617 A CN 105280617A CN 201510671943 A CN201510671943 A CN 201510671943A CN 105280617 A CN105280617 A CN 105280617A
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Abstract
The invention relates to a heavily doped silicon shielding silicon through hole structure and a manufacturing method thereof. The heavily doped silicon shielding silicon through hole structure sequentially comprises a semiconductor substrate, a heavily doped silicon shielding layer, a dielectric layer and a metal column layer from outside to inside, wherein the thickness of the heavily doped silicon shielding layer is 0.1-1 micron; the thickness of the dielectric layer is 0.1-1 micron; and the radius of the metal column layer is 2-5 microns. The manufacturing method of the heavily doped silicon shielding silicon through hole structure comprises the following steps: (1) etching a through hole in the semiconductor substrate in a reactive ion manner; (2) preparing the heavily doped silicon shielding layer on the inner surface of a through hole through high-temperature diffusion and ion implantation; (3) preparing the dielectric layer on the inner surface of the through hole through a chemical vapor deposition method; (4) preparing the metal column layer on the surface of the dielectric layer through a physical vapor deposition method until the dielectric layer is completely filled; and (5) carrying out chemico-mechanical polishing on the semiconductor substrate and the upper surface of the silicon through hole until the semiconductor substrate and the upper surface of the silicon through hole are smooth.
Description
Technical field
The invention belongs to the three dimensional integrated circuits field towards frequency applications, relate to through-silicon via structure and manufacture method thereof, be specifically related to a kind of heavily doped silicon shielding through-silicon via structure and manufacture method thereof.
Background technology
Along with the development of microelectric technique, feature sizes of semiconductor devices reduces gradually, the integrated level of integrated circuit also increases gradually, Moore's Law is subject to increasing challenge, mainly comprise: the characteristic size of (1), transistor reaches technological limits gradually, quantum effect and short-channel effect more and more serious; (2), along with operating frequency more and more higher, the sequence problem caused by ghost effects such as interconnection line dead resistance, electric capacity and inductance; (3), the power consumption that causes of wire capacitances, leakage current and short circuit; (4), due to the excessive initiation coupling of interconnection line density and crosstalk; (5) integrity problems such as the thermal strain that heat radiation difficulty, thermal cycle in technical process and annealing that, power density increase causes bring.
Three dimensional integrated circuits adopts special technology by traditional two-dimensional integrated circuit vertical stacking, interlayer perpendicular interconnection is realized by silicon through hole, thus substantially increase integrated level, reduce power consumption simultaneously, improve systematic function, therefore be known as one of the most effective approach of continuity Moore's Law by industry, become study hotspot in recent years.
Silicon through hole as key structure in three dimensional integrated circuits, the signal interconnection effect between the levels chip playing three dimensional integrated circuits.But along with improving constantly of three dimensional integrated circuits integrated level, silicon via densities increases considerably, the distance between silicon through hole and between silicon through hole and other devices of surrounding silicon substrate constantly reduces, and the coupling between signalling channel, crosstalk also increase thereupon.When circuit work frequency improves, be especially operated in millimeter wave even submillimeter region time, between silicon through hole signal coupling impact be enough to flood whole Signal transmissions, drastically influence the signal integrity of signalling channel.
Current existing through-silicon via structure can be divided into tapered silicon through hole, column type silicon through hole, ring-like silicon through hole and coaxial through-silicon via Four types, wherein tapered silicon through hole, column type silicon through hole and ring-like silicon through hole are due to structural restriction, do not possess the function of shielded signal noise, be only applicable to the situation of low frequency; And coaxial through-silicon via is due to the existence of outer ground becket, thus there is superior high-frequency electrical transmission characteristic, but the making of outer layer metal significantly adds complexity and the cost of technique, and introduce thermal stress in Semiconductor substrate around, bring the thermomechanical integrity problem of three dimensional integrated circuits.
Therefore, for the problems referred to above, be necessary to propose a kind of technique simple, with low cost and there is the through-silicon via structure of good high frequency signal integrity.
Summary of the invention
Goal of the invention: the present invention is directed to above-mentioned prior art Problems existing and make improvement, namely first object of the present invention is for providing a kind of heavily doped silicon shielding through-silicon via structure.Second object of the present invention is the manufacture method providing a kind of heavily doped silicon shielding silicon through hole.Heavily doped silicon shielding silicon through hole can shield silicon through hole closes on device coupled noise to surrounding silicon substrate and other, ensures the high frequency signal integrity of silicon through hole and three dimensional integrated circuits.
Technical scheme: a kind of heavily doped silicon shielding through-silicon via structure, is followed successively by Semiconductor substrate, heavily doped silicon screen, dielectric layer and metal column layer from outside to inside,
The thickness of described heavily doped silicon screen is 0.1 ~ 1 μm;
Described dielectric layer is the one in silicon dioxide layer, silicon nitride layer, silicon oxynitride layer, and the thickness of described dielectric layer is 0.1 ~ 1 μm;
The radius of described metal column layer is 2 ~ 5 μm.
A kind of preferred version as heavily doped silicon shielding through-silicon via structure a kind of in the present invention: described Semiconductor substrate is silicon substrate.
A kind of preferred version as heavily doped silicon shielding through-hole structure a kind of in the present invention: described heavily doped silicon screen is P type heavily doped silicon screen or N-type heavily doped silicon screen.
A kind of preferred version as heavily doped silicon shielding through-hole structure a kind of in the present invention: described heavily doped silicon shielding layer grounding.It act as shielding noise signal.
A kind of preferred version as heavily doped silicon shielding through-hole structure a kind of in the present invention: described metal column layer is copper post or aluminium post.Metal column layer is used for Signal transmissions.
A manufacture method for heavily doped silicon shielding silicon through hole, comprises the following steps:
(1) on a semiconductor substrate by the mode etching through hole of reactive ion, described through-hole aperture is 4.2 ~ 14 μm;
(2) heavily doped silicon screen is prepared in the inner surface of step (1) described through hole by High temperature diffusion and ion implantation;
(3) dielectric layer is prepared in the inner surface of step (2) described through hole by CVD (Chemical Vapor Deposition) method;
(4) metal column layer is prepared, in the surface of step (3) described dielectric layer till filling up completely by physical vapor deposition;
(5) chemico-mechanical polishing is carried out at the upper surface of described Semiconductor substrate and silicon through hole, until the upper surface of described Semiconductor substrate and silicon through hole is smooth rear.
A kind of preferred version as a kind of in the present invention manufacture method of heavily doped silicon shielding silicon through hole: heavily doped silicon screen described in step (2) is P type heavily doped silicon screen or N-type heavily doped silicon screen, and the thickness of described heavily doped silicon screen is 0.1 ~ 1 μm.
A kind of preferred version as the manufacture method of a kind of heavily doped silicon shielding silicon through hole in the present invention: described dielectric layer is silicon dioxide layer or silicon nitride layer or silicon oxynitride layer, and the thickness of described dielectric layer is 0.1 ~ 1 μm.
A kind of preferred version as a kind of in the present invention manufacture method of heavily doped silicon shielding silicon through hole: described metal column layer is copper post or aluminium post, and the radius of described metal column layer is 2 ~ 5 μm.
Beneficial effect: a kind of heavily doped silicon shielding silicon through hole disclosed by the invention has following beneficial effect compared with existing through-silicon via structure:
1, manufacturing process is simple, cost is low, and compatible with existing CMOS technology;
2, heavy doping shielding thickness is little, and within the block area being positioned at silicon through hole, can not consume additional chip area;
3, adopt heavy doping shielding layer grounding, effectively the coupled noise that silicon through hole produces can be shorted to ground, realize the effect of shielding noise signal, improve the high frequency signal integrity of other circuit of silicon bore periphery, thus improve chip performance.
Accompanying drawing explanation
Fig. 1 is the manufacturing flow chart of a kind of heavily doped silicon shielding silicon through hole disclosed by the invention;
Fig. 2 is the schematic diagram of a kind of heavily doped silicon shielding through-silicon via structure disclosed by the invention;
Fig. 3 ~ 7 are the profile in AA ' face in Fig. 2 in a kind of heavily doped silicon shielding through-silicon via structure manufacture process disclosed by the invention;
Wherein:
1-Semiconductor substrate 2-heavily doped silicon screen
3-dielectric layer 4-metal column layer
Embodiment:
Below the specific embodiment of the present invention is described in detail.
Specific embodiment 1
As shown in Figure 2, a kind of heavily doped silicon shielding through-silicon via structure, is followed successively by Semiconductor substrate 1, heavily doped silicon screen 2, dielectric layer 3 and metal column layer 4 from outside to inside,
The thickness of heavily doped silicon screen 2 is 0.1 μm;
Dielectric layer 3 is silicon dioxide layer, and the thickness of dielectric layer 3 is 0.1 μm;
The radius of metal column layer 4 is 2 μm.
Further, Semiconductor substrate 1 is silicon substrate.
Further, heavily doped silicon screen 2 is P type heavily doped silicon screen, and it act as shielding noise signal.
Further, metal column layer 4 is copper post, and metal column layer 4 is for Signal transmissions.
As shown in Fig. 1 and Fig. 3 ~ 7, a kind of manufacture method of heavily doped silicon shielding silicon through hole, comprises the following steps:
(1) on semiconductor substrate 1 by the mode etching through hole of reactive ion, through-hole aperture is 4.2 μm;
(2) heavily doped silicon screen 2 is prepared in the inner surface of step (1) through hole by High temperature diffusion and ion implantation;
(3) dielectric layer 3 is prepared in the inner surface of step (2) through hole by CVD (Chemical Vapor Deposition) method;
(4) metal column layer 4 is prepared, in the surface of step (3) dielectric layer 3 till filling up completely by physical vapor deposition;
(5) chemico-mechanical polishing is carried out at the upper surface of Semiconductor substrate 1 and silicon through hole, until the upper surface of Semiconductor substrate 1 and silicon through hole is smooth rear.
Further, in step (2), heavily doped silicon screen 2 is P type heavily doped silicon screen, and the thickness of heavily doped silicon screen 2 is 0.1 μm.
Further, dielectric layer 3 is silicon dioxide layer, and the thickness of dielectric layer 3 is 0.1 μm.
Further, metal column layer 4 is copper post, and the radius of metal column layer 4 is 2 μm.
Specific embodiment 2
As shown in Figure 2, a kind of heavily doped silicon shielding through-silicon via structure, is followed successively by Semiconductor substrate 1, heavily doped silicon screen 2, dielectric layer 3 and metal column layer 4 from outside to inside,
The thickness of heavily doped silicon screen 2 is 1 μm;
Dielectric layer 3 is silicon nitride layer, and the thickness of dielectric layer 3 is 1 μm;
The radius of metal column layer 4 is 5 μm.
Further, Semiconductor substrate 1 is silicon substrate.
Further, heavily doped silicon screen 2 is N-type heavily doped silicon screen, and it act as shielding noise signal.
Further, metal column layer 4 is aluminium post, and metal column layer 4 is for Signal transmissions.
As shown in Fig. 1 and Fig. 3 ~ 7, a kind of manufacture method of heavily doped silicon shielding silicon through hole, comprises the following steps:
(1) on semiconductor substrate 1 by the mode etching through hole of reactive ion, through-hole aperture is 14 μm;
(2) heavily doped silicon screen 2 is prepared in the inner surface of step (1) through hole by High temperature diffusion and ion implantation;
(3) dielectric layer 3 is prepared in the inner surface of step (2) through hole by CVD (Chemical Vapor Deposition) method;
(4) metal column layer 4 is prepared, in the surface of step (3) dielectric layer 3 till filling up completely by physical vapor deposition;
(5) chemico-mechanical polishing is carried out at the upper surface of Semiconductor substrate 1 and silicon through hole, until the upper surface of Semiconductor substrate 1 and silicon through hole is smooth rear.
Further, in step (2), heavily doped silicon screen 2 is N-type heavily doped silicon screen, and the thickness of heavily doped silicon screen 2 is 1 μm.
Further, dielectric layer 3 is silicon nitride layer, and the thickness of dielectric layer 3 is 1 μm.
Further, metal column layer 4 is aluminium post, and the radius of metal column layer 4 is 5 μm.
Specific embodiment 3
As shown in Figure 2, a kind of heavily doped silicon shielding through-silicon via structure, is followed successively by Semiconductor substrate 1, heavily doped silicon screen 2, dielectric layer 3 and metal column layer 4 from outside to inside,
The thickness of heavily doped silicon screen 2 is 0.5 μm;
Dielectric layer 3 is 5 silicon oxynitride layers 5, and the thickness of dielectric layer 3 is 0.5 μm;
The radius of metal column layer 4 is 4 μm.
Further, Semiconductor substrate 1 is silicon substrate.
Further, heavily doped silicon screen 2 is P type heavily doped silicon screen, and it act as shielding noise signal.
Further, metal column layer 4 is copper post, and metal column layer 4 is for Signal transmissions.
As shown in Fig. 1 and Fig. 3 ~ 7, a kind of manufacture method of heavily doped silicon shielding silicon through hole, comprises the following steps:
(1) on semiconductor substrate 1 by the mode etching through hole of reactive ion, through-hole aperture is 10 μm;
(2) heavily doped silicon screen 2 is prepared in the inner surface of step (1) through hole by High temperature diffusion and ion implantation;
(3) dielectric layer 3 is prepared in the inner surface of step (2) through hole by CVD (Chemical Vapor Deposition) method;
(4) metal column layer 4 is prepared, in the surface of step (3) dielectric layer 3 till filling up completely by physical vapor deposition;
(5) chemico-mechanical polishing is carried out at the upper surface of Semiconductor substrate 1 and silicon through hole, until the upper surface of Semiconductor substrate 1 and silicon through hole is smooth rear.
Further, in step (2), heavily doped silicon screen 2 is P type heavily doped silicon screen, and the thickness of heavily doped silicon screen 2 is 0.5 μm.
Further, dielectric layer 3 is silicon oxynitride layer, and the thickness of dielectric layer 3 is 0.5 μm.
Further, metal column layer 4 is copper post, and the radius of metal column layer 4 is 4 μm.
Above embodiments of the present invention are elaborated.But the present invention is not limited to above-mentioned execution mode, in the ken that art those of ordinary skill possesses, can also make a variety of changes under the prerequisite not departing from present inventive concept.
Claims (9)
1. a heavily doped silicon shielding through-silicon via structure, is characterized in that, be followed successively by Semiconductor substrate, heavily doped silicon screen, dielectric layer and metal column layer from outside to inside,
The thickness of described heavily doped silicon screen is 0.1 ~ 1 μm, and described dielectric layer is the one in silicon dioxide layer, silicon nitride layer, silicon oxynitride layer, and the thickness of described dielectric layer is 0.1 ~ 1 μm, and the radius of described metal column layer is 2 ~ 5 μm.
2. a kind of heavily doped silicon shielding through-silicon via structure according to claim 1, it is characterized in that, described Semiconductor substrate is silicon substrate.
3. a kind of heavily doped silicon shielding through-silicon via structure according to claim 1, it is characterized in that, described heavily doped silicon screen is P type heavily doped silicon screen or N-type heavily doped silicon screen.
4. a kind of heavily doped silicon shielding through-silicon via structure according to claim 1, is characterized in that, described heavily doped silicon shielding layer grounding.
5. a kind of heavily doped silicon shielding through-silicon via structure according to claim 1, it is characterized in that, described metal column layer is copper post or aluminium post.
6. a manufacture method for heavily doped silicon shielding silicon through hole, is characterized in that, comprise the following steps:
(1) on a semiconductor substrate by the mode etching through hole of reactive ion, described through-hole aperture is 4.2 ~ 14 μm;
(2) heavily doped silicon screen is prepared in the inner surface of step (1) described through hole by High temperature diffusion and ion implantation;
(3) dielectric layer is prepared in the inner surface of step (2) described through hole by CVD (Chemical Vapor Deposition) method;
(4) metal column layer is prepared, in the surface of step (3) described dielectric layer till filling up completely by physical vapor deposition;
(5) chemico-mechanical polishing is carried out at the upper surface of Semiconductor substrate and silicon through hole, until the upper surface of Semiconductor substrate and silicon through hole is smooth rear.
7. the manufacture method of a kind of heavily doped silicon shielding silicon through hole according to claim 6, it is characterized in that, heavily doped silicon screen described in step (2) is P type heavily doped silicon screen or N-type heavily doped silicon screen, and the thickness of described heavily doped silicon screen is 0.1 ~ 1 μm.
8. the manufacture method of a kind of heavily doped silicon shielding silicon through hole according to claim 6, is characterized in that, described dielectric layer is silicon dioxide layer or silicon nitride layer or silicon oxynitride layer, and the thickness of described dielectric layer is 0.1 ~ 1 μm.
9. the manufacture method of a kind of heavily doped silicon shielding silicon through hole according to claim 6, it is characterized in that, described metal column layer is copper post or aluminium post, and the radius of described metal column layer is 2 ~ 5 μm.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106099280A (en) * | 2016-08-22 | 2016-11-09 | 西安电子科技大学 | A kind of LC band filter based on the coupling electric capacity distribution of silicon through hole |
| CN106449574A (en) * | 2016-12-05 | 2017-02-22 | 中国科学院微电子研究所 | Coaxial differential pair silicon through hole structure |
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| US20110171827A1 (en) * | 2010-01-14 | 2011-07-14 | International Business Machines Corporation | Three Dimensional Integration and Methods of Through Silicon Via Creation |
| CN102208363A (en) * | 2011-05-13 | 2011-10-05 | 中国科学院微电子研究所 | Method for forming through silicon vias (TSV) |
| CN102412228A (en) * | 2011-10-31 | 2012-04-11 | 中国科学院微电子研究所 | Coaxial through-silicon via interconnected structure and fabrication method thereof |
| CN102598245A (en) * | 2009-10-28 | 2012-07-18 | 国际商业机器公司 | Coaxial through-silicon via |
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Patent Citations (4)
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| CN102598245A (en) * | 2009-10-28 | 2012-07-18 | 国际商业机器公司 | Coaxial through-silicon via |
| US20110171827A1 (en) * | 2010-01-14 | 2011-07-14 | International Business Machines Corporation | Three Dimensional Integration and Methods of Through Silicon Via Creation |
| CN102208363A (en) * | 2011-05-13 | 2011-10-05 | 中国科学院微电子研究所 | Method for forming through silicon vias (TSV) |
| CN102412228A (en) * | 2011-10-31 | 2012-04-11 | 中国科学院微电子研究所 | Coaxial through-silicon via interconnected structure and fabrication method thereof |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106099280A (en) * | 2016-08-22 | 2016-11-09 | 西安电子科技大学 | A kind of LC band filter based on the coupling electric capacity distribution of silicon through hole |
| CN106099280B (en) * | 2016-08-22 | 2019-10-11 | 西安电子科技大学 | A kind of LC bandpass filter based on the distribution of through silicon via coupled capacitor |
| CN106449574A (en) * | 2016-12-05 | 2017-02-22 | 中国科学院微电子研究所 | Coaxial differential pair silicon through hole structure |
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Application publication date: 20160127 |