CN108508951A - The LDO regulator circuit of capacitance outside a kind of no piece - Google Patents
The LDO regulator circuit of capacitance outside a kind of no piece Download PDFInfo
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- CN108508951A CN108508951A CN201810311486.9A CN201810311486A CN108508951A CN 108508951 A CN108508951 A CN 108508951A CN 201810311486 A CN201810311486 A CN 201810311486A CN 108508951 A CN108508951 A CN 108508951A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The invention discloses a kind of LDO regulator circuits of capacitance outside no piece, are applied to system on chip, and when punching on the output voltage of output module or undershoot, charge and discharge can be carried out to the grid of power adjustment pipe to enhance transient response by charging module and discharge module；And when output voltage undershoot, if the reference voltage that the non-undershoot of output voltage is exported to base modules, it can then enable switched-capacitor circuit in the conduction state to increase the grid capacitance of power adjustment pipe, playing reduces the saltus step speed of output voltage, reduce the effect of the further undershoot of output voltage, and after output voltage undershoot to reference voltage, it can then enable switching capacity open circuit shutdown to enhance the gate voltage Slew Rate of power adjustment pipe again, play the role of shortening the settling time after transient response, quickening system is restored to stable state.As it can be seen that using this LDO regulator circuit, the restricting relation between the settling time after inhibiting output voltage saltus step and shortening transient response can be eliminated.
Description
Technical field
The present invention relates to circuit field, more particularly to the LDO regulator circuit of capacitance outside a kind of no piece.
Background technology
Integrated is one of development trend of semicon industry, the circuit module of various functions will increasingly be miniaturized and
High frequency, and finally it is integrated into system on chip (SOC).Wherein, LDO voltage stabilizer (low-pressure linear voltage-stablizer) is used for as each of SOC
A circuit module provides high-accuracy voltage, and the quality of performance directly affects the performance of SOC.And due to capacitive outside no piece
LDO voltage stabilizer has the advantages that small and external interface is few and it is integrated to be convenient for, so, LDO voltage stabilizings are integrated on piece at present
The research of device, majority are based on LDO voltage stabilizer capacitive outside no piece.
In the prior art, in order to improve the frequency characteristic and transient response characteristic of LDO voltage stabilizer capacitive outside no piece,
Often increase buffer in error amplifier output or increases the gate leakage capacitance of power adjustment pipe to enhance power adjustment pipe
Gate voltage Slew Rate.But Instantaneous Situation response characteristic can be improved although increasing the scheme of buffer on trunk roads, not
Quiescent dissipation can only be increased, LDO voltage stabilizer efficiency is reduced, can also influence frequency response, when load sudden change, LDO voltage stabilizer
Output voltage saltus step is serious, and stability is poor；Although and the scheme for increasing the gate leakage capacitance of power adjustment pipe can promote frequency
Characteristic, but can not only extend after transient response settling time (be flushed to from output voltage highest or under be flushed to it is minimum play it is defeated
Go out the time that voltage is restored to steady-state value), Instantaneous Situation response performance is poor, also will increase chip area, increases and integrates difficulty.
As it can be seen that the technical solution of the existing Instantaneous Situation response characteristic for improving LDO voltage stabilizer, it is difficult to inhibit LDO voltage stabilizer output electricity
The saltus step of pressure, frequency characteristic are poor；The technical solution of the existing frequency characteristic for promoting LDO voltage stabilizer, after extending transient response
Settling time, Instantaneous Situation response characteristic is poor.That is, in existing technical solution, inhibit the output of LDO voltage stabilizer
Settling time after voltage jump and shortening transient response, there are restricting relations.
Therefore, how to eliminate inhibit LDO voltage stabilizer output voltage saltus step and shorten transient response after settling time it
Between restricting relation be a technical problem that technical personnel in the field need to solve at present.
Invention content
The object of the present invention is to provide a kind of LDO regulator circuits of capacitance outside no piece, can eliminate inhibition LDO voltage stabilizer
Output voltage saltus step and shorten transient response after settling time between restricting relation.
In order to solve the above technical problem, the present invention provides a kind of no piece outside capacitance LDO regulator circuit, be applied to
System on chip, including band gap reference and error amplifier, output module further include：
It is connected between the grid of power adjustment pipe and the voltage output end of the output module, for working as the output mould
When being rushed on the output voltage of block, the charging module that charges to the grid of the power adjustment pipe；
First input end is connect with the reference voltage output end of the band gap reference, and the second input terminal and the voltage are defeated
Outlet connects, and output end is connect with the grid of the power adjustment pipe, is used for when the output voltage undershoot of the output module,
Reduce the discharge module of the grid current of the power adjustment pipe；
It is connect with the grid of the voltage output end, the discharge module and the power adjustment pipe, when itself is connected
Grid capacitance for increasing the power adjustment pipe and the gate voltage when itself is turned off for enhancing the power adjustment pipe
The switched-capacitor circuit of Slew Rate.
Preferably, the charging module specifically includes：
Current source；
The differentiator being connect with the voltage output end and the current source；
The current amplifier being connect with the grid of the differentiator, supply voltage feeder ear and the power adjustment pipe.
Preferably, the differentiator specifically includes：
The capacitance that first end is connect with the voltage output end；
First end is connect with the second end of the capacitance and the current amplifier, second end and the current amplifier and
The resistance of the current source connection.
Preferably, the current amplifier includes specifically：
Grid is connect with the second end of the capacitance, source electrode is connect with the supply voltage feeder ear, is drained and the electricity
First PMOS field-effect tube of the second end connection of resistance；
Grid is connect with the second end of the resistance, source electrode is connect with the supply voltage feeder ear, drain electrode and the work(
Rate adjusts the 2nd PMOS field-effect tube of the grid connection of pipe.
Preferably, the discharge module specifically includes comparator and the first NMOS field-effect tube；
The noninverting input of the comparator is connect with the reference voltage output end, the reverse input end of the comparator
It is connect with the voltage output end, the output end of the comparator is connect with the grid of the first NMOS field-effect tube, described
The drain electrode of first NMOS field-effect tube is connect with the grid of the power adjustment pipe, and the source electrode of the first NMOS field-effect tube connects
Ground.
Preferably, the switched-capacitor circuit specifically includes：
The phase inverter that input terminal is connect with the output end of the comparator；
The 2nd NMOS field-effect tube that grid is connect with the output end of the phase inverter；
The 3rd PMOS field-effect tube that grid is connect with the input terminal of the comparator；
First end is connect with the 2nd NMOS field-effect tube and the 3rd PMOS field-effect tube, second end and the work(
Rate adjusts the switching capacity of the grid connection of pipe.
Preferably, the switching capacity is specially pF grades of capacitances.
Preferably, further include：
It is connect with the error amplifier and the output module, for eliminating the error amplifier and the power tune
The capacitive path of forward path between homogeneous tube.
Preferably, the capacitive path is specially：
One end is connect with the error amplifier, the compensating electric capacity that the other end is connect with the voltage output end.
Preferably, the compensating electric capacity is specially pF grades of capacitances.
The LDO regulator circuit of capacitance outside no piece provided by the invention is applied to system on chip, when the output of output module
Punching or when undershoot on voltage, charge and discharge can be carried out to enhance by charging module and discharge module to the grid of power adjustment pipe
Transient response；It, can be with if the reference voltage that the non-undershoot of output voltage is exported to base modules and when output voltage undershoot
It enables switched-capacitor circuit in the conduction state to increase the grid capacitance of power adjustment pipe, plays the saltus step speed for reducing output voltage
Degree, reduces the effect of the further undershoot of output voltage, and after output voltage undershoot to reference voltage, then it can enable open again
Powered-down appearance open circuit shutdown is played the settling time after shortening transient response, is accelerated to enhance the gate voltage Slew Rate of power adjustment pipe
System is restored to the effect of stable state.As it can be seen that using this LDO regulator circuit, by reasonably controlling leading for switched-capacitor circuit
Logical and shutdown can eliminate the restricting relation between the settling time after inhibiting output voltage saltus step and shortening transient response.
Description of the drawings
In order to illustrate the embodiments of the present invention more clearly, attached drawing needed in the embodiment will be done simply below
It introduces, it should be apparent that, drawings in the following description are only some embodiments of the invention, for ordinary skill people
For member, without creative efforts, other accompanying drawings are can also be obtained according to these attached drawings.
Fig. 1 is the structural schematic diagram of the LDO regulator circuit of capacitance outside a kind of no piece provided in an embodiment of the present invention；
Fig. 2 is the circuit diagram that a kind of transient state provided in an embodiment of the present invention enhances circuit；
Fig. 3 is a kind of small-signal equivalent circuit figure of LDO regulator circuit provided in an embodiment of the present invention；
Fig. 4 is a kind of internal circuit diagram of error amplifier provided in an embodiment of the present invention.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, rather than whole embodiments.Based on this
Embodiment in invention, those of ordinary skill in the art under the premise of not making the creative labor, obtained it is all its
His embodiment, belongs to the scope of the present invention.
The object of the present invention is to provide a kind of LDO regulator circuits of capacitance outside no piece, can eliminate inhibition LDO voltage stabilizer
Output voltage saltus step and shorten transient response after settling time between restricting relation.
In order to make those skilled in the art be better understood from technical solution of the present invention, below in conjunction with the accompanying drawings and it is embodied
The present invention is described in further detail for mode.
Fig. 1 is the structural schematic diagram of the LDO regulator circuit of capacitance outside a kind of no piece provided in an embodiment of the present invention.This reality
Apply example offer the LDO regulator circuit without capacitance outside piece be applied to system on chip, as shown in Figure 1, including band gap reference 10,
Error amplifier 11, output module 12 further include：
It is connected between the grid and the voltage output end of output module 12 of power adjustment pipe Mp, for working as output module 12
Output voltage Vout on when rushing, the charging module 13 that charges to the grid of power adjustment pipe Mp；
First input end is connect with the reference voltage output end of band gap reference 10, and the second input terminal connects with voltage output end
It connects, output end is connect with the grid of power adjustment pipe Mp, for when the output voltage Vout undershoots of output module 12, reducing work(
Rate adjusts the discharge module 14 of the grid current of pipe Mp；
It is connect with the grid of the voltage output end, the discharge module 14 and the power adjustment pipe Mp, when itself leads
It grid capacitance when logical for increasing the power adjustment pipe Mp and is used to enhance the power adjustment pipe Mp when itself turn off
Gate voltage Slew Rate switched-capacitor circuit 15.
It should be noted that LDO voltage stabilizer is suitable for step-down applications, using Linear transform, power adjustment pipe Mp is set
It is placed in output module 12, internal resistance is variable, under different loads, the internal resistance of power adjustment pipe Mp is also different, is ensured with this
The output voltage Vout (the output voltage Vout of LDO regulator circuit) of output module 12 stablizes.Existing LDO voltage stabilizer includes
Band gap reference 10, error amplifier 11, output module 12 and feedback circuit 16.In error amplifier 11, output module 12
Power adjustment pipe Mp and feedback circuit 16 constitute the core circuit of LDO regulator circuit, feedback loop are constituted, to stabilization
Output voltage values.
Transient response is one of the emphasis of capacitance LDO voltage stabilizer research outside no piece, it reflects system and becomes to load transient
The adaptibility to response of change.It, can be by the output current and LDO voltage stabilizer of power adjustment pipe Mp when saltus step occurs for supply voltage or load
Load current between difference amplification, formed overshoot voltage.During this, feedback resistance will export the Voltage Feedback of variation
To error amplifier 11, and error amplifier 11 needs a time course to the grid capacitance charge and discharge of power adjustment pipe Mp,
Power adjustment pipe Mp cannot be responded rapidly, and the output of LDO voltage stabilizer is caused to have prodigious upper punching or undershoot voltage.
Need the grid to power adjustment pipe Mp to discharge when output voltage Vout undershoots, on then need to power when rushing
The grid of adjustment pipe Mp is charged to realize transient response.Therefore, outside no piece provided in this embodiment capacitance LDO voltage stabilizer
Circuit further includes charging module 13 and discharge module 14, and charging module 13 is connect with the voltage output end of output module 12 to obtain
Output voltage Vout is connect with when being rushed on output voltage Vout with the grid of power adjustment pipe Mp, to power adjustment pipe Mp's
Grid charges；The first input end of discharge module 14 is connect with the reference voltage output end of band gap reference 10 to obtain base
Second input terminal of quasi- voltage, discharge module 14 is connect with voltage output end to obtain output voltage Vout, discharge module 14
Output end is connect with the grid of power adjustment pipe Mp when output voltage Vout undershoots, to reduce the grid electricity of power adjustment pipe Mp
Stream.I.e. charging module 13 is used to handle the upper punching of output voltage Vout, and discharge module 14 is for handling under output voltage Vout
Punching.
Switched-capacitor circuit 15 is connect with the grid of voltage output end, discharge module 14 and power adjustment pipe Mp, to pass through
The signal that the voltage signal and discharge module 14 of voltage output end output export determines output voltage Vout, and whether undershoot is to benchmark
Voltage makes itself be kept on to increase power adjustment pipe Mp before output voltage Vout undershoots to reference voltage
Grid capacitance strive for the sufficient response time for discharge module 14 to reduce the saltus step speed of output voltage Vout, reach
Reduce the purpose of the further undershoot of output voltage Vout；And after output voltage Vout undershoots to reference voltage V set, then
It enables and itself the grid of power adjustment pipe Mp being put conducive to discharge module 14 with reducing the AC signal of itself into off state
Electricity is equivalent to the gate voltage Slew Rate for enhancing power adjustment pipe Mp, so as to shorten the settling time after transient response, accelerates
System is restored to stable state.
It is illustrated by taking the detailed process of transient response when analyzing output voltage Vout undershoots as an example below, then exports electricity
The detailed process of transient response when Vout undershoots is pressed to be broadly divided into t1、t2Two sections of response processes.In t1In time, voltage undershoot
To minimum, Δ V is represented by:
Wherein, Δ ILFor load current changing value, CoutFor output end total capacitance, t1Value be about error amplifier 11 increasing
The inverse of beneficial bandwidth.In t2In time, output is restored to steady-state value by the minimum of undershoot, in t2LDO voltage stabilizer starts in time
Restore to stablize, the parasitic capacitance of power adjustment pipe Mp is in discharge condition, and power adjustment pipe Mp starts to load supplying until defeated
Go out voltage stabilization, so t2Value depend primarily on system phase nargin, i.e. pole location, when pole is close to high frequency, when
Between constant it is smaller, t2It is smaller, but phase margin can also reduce at this time, and the stability of circuit can decrease；Vice versa.
The LDO regulator circuit of capacitance outside no piece provided in this embodiment, in addition to including band gap reference 10, error amplification
Except device 11 and output module 12, goes back charging module 13, discharge module 14 and switched-capacitor circuit 15 and filled in load sudden change
Electric module 13 and discharge module 14 are rapidly to power adjustment pipe Mp grid charge and discharge, enhancing system transients response.Switching capacity electricity
Road 15 is in t1Stage is connected, and can inhibit output voltage Vout saltus steps, in t2Stage turns off, and can enhance power adjustment pipe Mp grid
Voltage Slew Rate, shortens the settling time of dynamic response, and quickening system is restored to stable state.
In conclusion outside no piece provided in an embodiment of the present invention capacitance LDO regulator circuit, be applied to system on chip,
It, can be to the grid of power adjustment pipe by charging module and discharge module when punching on the output voltage of output module or undershoot
Charge and discharge are carried out to enhance transient response；And when output voltage undershoot, if the non-undershoot of output voltage to base modules export
Reference voltage, then can enable switched-capacitor circuit in the conduction state to increase the grid capacitance of power adjustment pipe, play drop
The saltus step speed of low output voltage reduces the effect of the further undershoot of output voltage, and in output voltage undershoot to benchmark electricity
It after pressure, then can enable switching capacity open circuit shutdown to enhance the gate voltage Slew Rate of power adjustment pipe again, play and shorten transient state sound
Settling time after answering, quickening system are restored to the effect of stable state.As it can be seen that using this LDO regulator circuit, by reasonably controlling
The conducting and shutdown of switched-capacitor circuit processed can be eliminated and inhibit output voltage saltus step and shorten the settling time after transient response
Between restricting relation.
If regarding charging module 13, discharge module 14 and 15 entirety of switch capacitive circuit as a kind of transient state enhance circuit,
Fig. 2 is the circuit diagram that a kind of transient state provided in an embodiment of the present invention enhances circuit.As shown in Fig. 2, it is based on above-described embodiment, as
A kind of preferred embodiment, charging module 13 specifically include：
Current source；
The differentiator being connect with voltage output end and current source；
With differentiator, the grid M of supply voltage VDD feeder ears and power adjustment pipe MpP-GThe current amplifier of connection.
When being rushed on output voltage Vout, differentiator generates rapidly high current so that current amplifier is to power adjustment pipe
The grid M of MpP-GIt charges.
As shown in Fig. 2, above-described embodiment is based on, as a preferred embodiment, differentiator specifically includes：
The capacitance Cd that first end is connect with voltage output end；
First end is connect with the second end of capacitance Cd and current amplifier, and second end is connect with current amplifier and current source
Resistance Rd.
When being rushed on output voltage Vout, there is voltage difference in the both ends capacitance Cd, generate high current rapidly, by the of resistance Rd
Two terminal voltages drag down so that grid M of the current amplifier to power adjustment pipe MpP-GIt charges.
As shown in Fig. 2, above-described embodiment is based on, as a preferred embodiment, current amplifier includes specifically：
Grid connect with the second end of capacitance Cd, the connection of source electrode and supply voltage VDD feeder ears, drain electrode and resistance Rd the
First PMOS field-effect tube M1 of two ends connection；
Grid is connect with the second end of resistance Rd, source electrode and supply voltage VDD feeder ears connect, drain electrode and power adjustment pipe
The grid M of MpP-G2nd PMOS field-effect tube M2 of connection.
After the second terminal voltage of resistance Rd is pulled low, the electricity between the grid and source electrode of the 2nd PMOS field-effect tube M2
Buckling is big, and the 2nd PMOS field-effect tube M2 is switched on, so as to utilize the grid M that supply voltage is power adjustment pipe MpP-GIt fills
Electricity.And the first PMOS field-effect tube M1 plays a part of amplifying electric current, can reduce the value of capacitance Cd, is conducive to integrated.
As shown in Fig. 2, above-described embodiment is based on, as a preferred embodiment, discharge module 14 specifically includes ratio
Compared with device COM and the first NMOS field-effect tube M3；
The noninverting input of comparator COM is connect with reference voltage output end, the reverse input end and voltage of comparator COM
Output end connects, and the output end of comparator COM is connect with the grid of the first NMOS field-effect tube M3, the first NMOS field-effect tube M3
Drain electrode and power adjustment pipe Mp grid MP-GConnection, the source electrode ground connection of the first NMOS field-effect tube M3.
The noninverting input of comparator COM is the first input end of discharge module 14, is connected with reference voltage output end
It connects to obtain reference voltage V set, and the size of reference voltage V set then decides the threshold voltage that discharge module 14 starts.Than
Reverse input end compared with device COM is the second input terminal of discharge module 14, is connect with voltage output end to obtain output electricity
Press Vout.The output end of comparator COM is the output end of discharge module 14, is connected with the grid of the first NMOS field-effect tube M3
It connects so that when output voltage Vout undershoots, until when less than reference voltage V set, comparator COM is to the first NMOS field-effect tube M3's
Grid exports high level, makes the first NMOS field-effect tube M3 conductings, reduces the grid current of power adjustment pipe Mp；And when output electricity
Press Vout be higher than reference voltage V set when, then comparator COM to the grid of the first NMOS field-effect tube M3 export low level, first
NMOS field-effect tube M3 is in cut-off state.
In addition, it should be noted that if band gap reference 10 export reference voltage V set is too sensitive or the first NMOS
The electric current of field-effect tube M3 is excessive, it will and cause output voltage Vout to vibrate, usually, could be provided as 20mv or so, still,
In practical applications, the occurrence of reference voltage V set should require to be adjusted according to actual circuit, and the present invention does not limit this
It is fixed.
As shown in Fig. 2, above-described embodiment is based on, as a preferred embodiment, switched-capacitor circuit 15 specifically wraps
It includes：
The phase inverter INV that input terminal is connect with the output end of comparator COM；
The 2nd NMOS field-effect tube M4 that grid is connect with the output end of phase inverter INV；
The 3rd PMOS field-effect tube M5 that grid is connect with the input terminal of comparator COM；
First end is connect with the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5, second end and power adjustment pipe
The grid M of MpP-GThe switching capacity Cm of connection.
It should be noted that in the present embodiment, the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5 are in parallel,
The source electrode (or drain electrode) of 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5 is connect with switching capacity Cm first ends, the
The drain electrode (or source electrode) of two NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5 are connect with voltage output end.In other implementations
In example, as long as ensureing that two field-effect tube being connect with phase inverter INV are parallel relationships, connect with the output end of phase inverter INV
Under the premise of the field-effect tube connect is PMOS field-effect tube, the field-effect tube being connect with the input terminal of comparator COM can also be
NMOS field-effect tube.In addition, switching capacity Cm is preferably pF grades of capacitances.
Regard the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5 in parallel as switched-capacitor circuit 15
Full swing ' complementation ' switchs, and equivalent resistance is set as RK, then its value can be expressed as：
Wherein, μnAnd μpThe respectively electron mobility of the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5,WithThe respectively breadth length ratio of the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5, VDDFor power supply electricity
Pressure, Vout are the output voltage of LDO voltage stabilizer, Vth-nAnd Vth-pIt is the 2nd NMOS field-effect tube M4 and the 3rd PMOS effects respectively
Should pipe M5 threshold voltage.
As it can be seen that for single tube, the resistance value of ' complementation ' switch changes much smaller in turn-on and turn-off.
The core circuit of comparator COM is the high-gain amplifier with positive feedback, can reduce micro-current, saves power consumption.Instead
The signal of the input terminal of phase device INV and the signal of output end are complementary, and complementary signal is connected respectively to the 2nd NMOS field-effects
The grid of pipe M4 and the 3rd PMOS field-effect tube M5, to control the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5
Conducting and cut-off.When circuit works normally, the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5 are on
State can increase the grid capacitance of power adjustment pipe Mp, so, when output voltage Vout undershoots, it is defeated that reduction can be played
Go out the effect of the saltus step speed of voltage Vout so that discharge module 14 has the sufficient response time, reduces output voltage Vout's
Further undershoot.When output voltage Vout undershoots are less than reference voltage V set, the input end signal of phase inverter INV and output
End signal is overturn, and the 2nd NMOS field-effect tube M4 and the 3rd PMOS field-effect tube M5 are in cut-off state, switched-capacitor circuit 15
AC signal it is smaller, be conducive to grid Ms of the first NMOS field-effect tube M3 to power adjustment pipe MpP-GElectric discharge, is equivalent to increase
The gate voltage Slew Rate of power adjustment pipe Mp is conducive to shorten the settling time after transient response.
Furthermore, it should be noted that transient state provided herein enhances circuit by the smaller component of quiescent dissipation (such as
Field-effect tube) it forms, compared with the prior art for the larger buffer circuits of middle addition quiescent dissipation, provided using the application
Technical solution, quiescent dissipation can be further decreased.
Since the output of capacitance LDO voltage stabilizer outside no piece does not connect the capacitance of big capacitance, the present invention is in LDO voltage stabilizings
Frequency compensation has been carried out inside device, system is made to stablize.
In order to make those skilled in the art more fully understand technical solution provided by the invention, with reference to LDO voltage stabilizer
The circuits effect figure such as small signal of circuit to carried out inside LDO voltage stabilizer using switched-capacitor circuit 15 frequency compensated principle into
Row explanation.
Fig. 3 is a kind of small-signal equivalent circuit figure of LDO regulator circuit provided in an embodiment of the present invention.It needs to illustrate
It is that in figure 3, loop disconnects added signal and is not drawn into, Cm1Indicate compensating electric capacity, RKIndicate the equivalent electricity of ' complementation ' switch
Resistance.As shown in Figure 4, there are a dominant poles for the output end of error amplifier 11, and there are one poles for the output end of LDO voltage stabilizer
Point and a zero Z1, and zero Z1For：
Wherein, Cm1For the value of compensating electric capacity, gm2For the mutual conductance of power adjustment pipe Mp, RKFor the equivalent resistance of ' complementation ' switch
Value.
By zero Z1Calculation formula it is found that by RKThe ratio of designGreatly, the zero of right half plane can be shifted to left half
Plane improves the stability of LDO voltage stabilizer.
But when load mutates progress transient response, the frequency compensation effect of switched-capacitor circuit 15 can be opposite
Slacken, therefore, be based on above-described embodiment, as a preferred embodiment, outside no piece provided in this embodiment capacitance LDO
Voltage regulator circuit further includes：
It is connect with the error amplifier 11 and the output module 12, for eliminating the error amplifier 11 and described
The capacitive path of forward path between power adjustment pipe Mp.
In specific implementation, capacitive path connect with output module 12 can be capacitive path and LDO voltage stabilizer output
End connection, it can be that capacitive path is connect with the ends A in error amplifier 11 that capacitive path is connect with error amplifier 11, will be electric
Hold access to be set between the ends A of error amplifier 11 and the output end of LDO voltage stabilizer.
In order to illustrate the effect of capacitive path, capacitive path is set to the ends A and the LDO voltage stabilizer of error amplifier 11
Output end between for illustrate.
Which end the ends A firstly the need of specification error amplifier 11 are specially, below in conjunction with the accompanying drawings to error amplifier 11
The ends A be specially which end is described in detail.Fig. 4 is a kind of internal circuit of error amplifier provided in an embodiment of the present invention
Figure.As shown in figure 4, VDD indicates that supply voltage, GND indicate that ground terminal, V+ and V- indicate that the forward direction of error amplifier 11 is defeated respectively
Enter end and reverse input end, Vo indicates that the output end of error amplifier 11, A indicate the ends A of error amplifier 11.As it can be seen that accidentally
Capacitive path is introduced between the ends A and the output end of LDO voltage stabilizer of poor amplifier 11, is equivalent to and is adopted in LDO voltage stabilizer structure
Feedforward path is eliminated with compensating electric capacity, the forward path eliminated between error amplifier 11 and power adjustment pipe Mp can be played
Effect, the secondary pole of system is shifted at higher frequency, the frequency characteristic of LDO voltage stabilizer is promoted.That is, although loading
When the progress transient response that mutates, the frequency compensation effect of switched-capacitor circuit 15 also can be relatively weak, but capacitance is logical
The setting on road, it can be ensured that LDO regulator circuit it is sufficiently stable.
Based on above-described embodiment, as a preferred embodiment, capacitive path is specially：
One end is connect with error amplifier 11, the compensating electric capacity that the other end is connect with voltage output end.
It is further preferred that compensating electric capacity is specially pF grades of capacitances.
When the compensation electricity that capacitive path is specially that one end is connect with error amplifier 11, and the other end is connect with voltage output end
The secondary pole of error amplifier 11 can not only be shifted at higher frequency, but also can reduce compensating electric capacity itself by Rong Shi
Capacitance.
The LDO regulator circuit of capacitance outside a kind of no piece provided by the present invention is described in detail above.Explanation
Each embodiment is described by the way of progressive in book, each embodiment stress be it is different from other embodiments it
Locate, just to refer each other for identical similar portion between each embodiment.
It should be pointed out that for those skilled in the art, without departing from the principle of the present invention,
Can be with several improvements and modifications are made to the present invention, these improvement and modification also fall into the protection domain of the claims in the present invention
It is interior.
It should also be noted that, in the present specification, such as first and second etc relational terms are used merely to one
A entity is either operated either to operate with another entity and be distinguished without necessarily requiring or implying these entities or behaviour
There are any actual relationship or orders between work.Moreover, the terms "include", "comprise" or its any variant are intended to
Cover non-exclusive inclusion, so that the process, method, article or equipment including a series of element includes not only that
A little elements, but also include the other elements being not explicitly listed, further include either for this process, method, article or setting
Standby intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in the process, method, article or apparatus that includes the element.
Claims (10)
1. the LDO regulator circuit of capacitance outside a kind of no piece is applied to system on chip, including band gap reference, error amplifier
And output module, which is characterized in that further include：
It is connected between the grid of power adjustment pipe and the voltage output end of the output module, for when the output module
When being rushed on output voltage, the charging module that charges to the grid of the power adjustment pipe；
First input end is connect with the reference voltage output end of the band gap reference, the second input terminal and the voltage output end
Connection, output end are connect with the grid of the power adjustment pipe, for when the output voltage undershoot of the output module, reducing
The discharge module of the grid current of the power adjustment pipe；
It connect with the grid of the voltage output end, the discharge module and the power adjustment pipe, is used for when itself is connected
Increase the grid capacitance of the power adjustment pipe and the gate voltage Slew Rate when itself is turned off for enhancing the power adjustment pipe
Switched-capacitor circuit.
2. the LDO regulator circuit of capacitance outside no piece according to claim 1, which is characterized in that the charging module tool
Body includes：
Current source；
The differentiator being connect with the voltage output end and the current source；
The current amplifier being connect with the grid of the differentiator, supply voltage feeder ear and the power adjustment pipe.
3. the LDO regulator circuit of capacitance outside no piece according to claim 2, which is characterized in that the differential implement body
Including：
The capacitance that first end is connect with the voltage output end；
First end is connect with the second end of the capacitance and the current amplifier, second end and the current amplifier and described
The resistance of current source connection.
4. the LDO regulator circuit of capacitance outside no piece according to claim 3, which is characterized in that the current amplifier
It specifically includes：
Grid is connect with the second end of the capacitance, source electrode is connect with the supply voltage feeder ear, is drained and the resistance
First PMOS field-effect tube of second end connection；
Grid is connect with the second end of the resistance, source electrode is connect with the supply voltage feeder ear, drain electrode and the power tune
2nd PMOS field-effect tube of the grid connection of homogeneous tube.
5. the LDO regulator circuit of capacitance outside no piece according to claim 4, which is characterized in that the discharge module tool
Body includes comparator and the first NMOS field-effect tube；
The noninverting input of the comparator is connect with the reference voltage output end, the reverse input end of the comparator and institute
Voltage output end connection is stated, the output end of the comparator is connect with the grid of the first NMOS field-effect tube, and described first
The drain electrode of NMOS field-effect tube is connect with the grid of the power adjustment pipe, the source electrode ground connection of the first NMOS field-effect tube.
6. the LDO regulator circuit of capacitance outside no piece according to claim 5, which is characterized in that the switching capacity electricity
Road specifically includes：
The phase inverter that input terminal is connect with the output end of the comparator；
The 2nd NMOS field-effect tube that grid is connect with the output end of the phase inverter；
The 3rd PMOS field-effect tube that grid is connect with the input terminal of the comparator；
First end is connect with the 2nd NMOS field-effect tube and the 3rd PMOS field-effect tube, second end and the power tune
The switching capacity of the grid connection of homogeneous tube.
7. the LDO regulator circuit of capacitance outside no piece according to claim 6, which is characterized in that the switching capacity tool
Body is pF grades of capacitances.
8. according to LDO regulator circuit of the claim 1-7 any one of them without capacitance outside piece, which is characterized in that further include：
It is connect with the error amplifier and the output module, for eliminating the error amplifier and the power adjustment pipe
Between forward path capacitive path.
9. the LDO regulator circuit of capacitance outside no piece according to claim 8, which is characterized in that the capacitive path tool
Body is：
One end is connect with the error amplifier, the compensating electric capacity that the other end is connect with the voltage output end.
10. the LDO regulator circuit of capacitance outside no piece according to claim 9, which is characterized in that the compensating electric capacity tool
Body is pF grades of capacitances.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810311486.9A CN108508951B (en) | 2018-04-09 | 2018-04-09 | LDO voltage regulator circuit without off-chip capacitor |
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|---|---|---|---|
| CN201810311486.9A CN108508951B (en) | 2018-04-09 | 2018-04-09 | LDO voltage regulator circuit without off-chip capacitor |
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| CN108508951A true CN108508951A (en) | 2018-09-07 |
| CN108508951B CN108508951B (en) | 2020-04-28 |
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| CN201810311486.9A Expired - Fee Related CN108508951B (en) | 2018-04-09 | 2018-04-09 | LDO voltage regulator circuit without off-chip capacitor |
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| CN110380723A (en) * | 2019-06-11 | 2019-10-25 | 思瑞浦微电子科技（苏州）股份有限公司 | Amplifier compensation circuit applied to two-way open-drain output buffer |
| CN110703850A (en) * | 2019-11-07 | 2020-01-17 | 新华三半导体技术有限公司 | Low dropout regulator |
| CN111176367A (en) * | 2018-11-13 | 2020-05-19 | 合肥格易集成电路有限公司 | Circuit for generating stable mirror current |
| CN111367340A (en) * | 2018-12-26 | 2020-07-03 | 北京兆易创新科技股份有限公司 | Low dropout linear voltage stabilizing circuit |
| CN113556028A (en) * | 2021-08-10 | 2021-10-26 | 上海壁仞智能科技有限公司 | Ripple voltage control method, ripple voltage control system, electronic device, and storage medium |
| CN114510112A (en) * | 2022-01-12 | 2022-05-17 | 电子科技大学 | Transient enhancement circuit applied to low-power-consumption fully-integrated low dropout linear regulator |
| CN114647271A (en) * | 2022-05-23 | 2022-06-21 | 芯海科技（深圳）股份有限公司 | LDO circuit, control method, chip and electronic equipment |
| CN114690836A (en) * | 2020-12-29 | 2022-07-01 | 圣邦微电子（北京）股份有限公司 | Transient response enhancement circuit |
| US11709515B1 (en) | 2021-07-29 | 2023-07-25 | Dialog Semiconductor (Uk) Limited | Voltage regulator with n-type power switch |
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| CN111176367A (en) * | 2018-11-13 | 2020-05-19 | 合肥格易集成电路有限公司 | Circuit for generating stable mirror current |
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| CN111367340A (en) * | 2018-12-26 | 2020-07-03 | 北京兆易创新科技股份有限公司 | Low dropout linear voltage stabilizing circuit |
| CN110380723A (en) * | 2019-06-11 | 2019-10-25 | 思瑞浦微电子科技（苏州）股份有限公司 | Amplifier compensation circuit applied to two-way open-drain output buffer |
| CN110380723B (en) * | 2019-06-11 | 2022-08-05 | 思瑞浦微电子科技（苏州）股份有限公司 | Operational amplifier compensation circuit applied to bidirectional open-drain output buffer |
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| CN114690836A (en) * | 2020-12-29 | 2022-07-01 | 圣邦微电子（北京）股份有限公司 | Transient response enhancement circuit |
| US11709515B1 (en) | 2021-07-29 | 2023-07-25 | Dialog Semiconductor (Uk) Limited | Voltage regulator with n-type power switch |
| CN113556028A (en) * | 2021-08-10 | 2021-10-26 | 上海壁仞智能科技有限公司 | Ripple voltage control method, ripple voltage control system, electronic device, and storage medium |
| CN114510112A (en) * | 2022-01-12 | 2022-05-17 | 电子科技大学 | Transient enhancement circuit applied to low-power-consumption fully-integrated low dropout linear regulator |
| CN114647271A (en) * | 2022-05-23 | 2022-06-21 | 芯海科技（深圳）股份有限公司 | LDO circuit, control method, chip and electronic equipment |
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