CN108505114B

CN108505114B - Epitaxial wafer and method for manufacturing the same

Info

Publication number: CN108505114B
Application number: CN201710113065.0A
Authority: CN
Inventors: 长谷川博之
Original assignee: Sumco Corp
Current assignee: Sumco Corp
Priority date: 2017-02-28
Filing date: 2017-02-28
Publication date: 2021-03-05
Anticipated expiration: 2037-02-28
Also published as: CN108505114A

Abstract

The invention provides an epitaxial growth wafer with reduced epitaxial defects. The manufacturing method comprises the following steps: a step of obtaining a single crystal silicon ingot free from large-area dislocation defects over the entire cut surface during slicing; a step of slicing the single crystal silicon ingot to perform mirror polishing on the surface thereof to obtain a wafer substrate; and growing a film of a silicon single crystal on the surface of the wafer substrate to form an epitaxial film. In the step of forming the epitaxial film, a front surface inner peripheral side heater opposed to an inner peripheral portion of a front surface of the wafer substrate, a front surface outer peripheral side heater opposed to an outer peripheral portion of the front surface of the wafer substrate, a rear surface inner peripheral side heater opposed to an inner peripheral portion of a rear surface of the wafer substrate, and a rear surface outer peripheral side heater opposed to an outer peripheral portion of the rear surface of the wafer substrate are arranged, and the epitaxial film is formed while heating the inner peripheral side of the wafer substrate to a temperature higher than the outer peripheral side.

Description

Epitaxial wafer and method for manufacturing the same

Technical Field

The present invention relates to an epitaxial growth wafer in which an epitaxial film including single crystal silicon is formed on a surface of a wafer substrate including single crystal silicon, and a manufacturing method thereof.

Background

A silicon epitaxial growth wafer is a wafer in which a film of single crystal silicon is vapor-phase grown on a surface of a wafer substrate including single crystal silicon, and there is an increasing demand for a high-quality wafer that can cope with a case where integrity of crystallization is required or a case where a multilayer structure having different resistivity is required. Such a silicon epitaxial growth wafer is particularly suitable for the manufacture of high-tech logic LSIs and CMOS image sensors.

In recent years, the demand for higher quality of an epitaxially grown wafer has become more stringent, and improvement of defects on the surface of the epitaxially grown wafer has been demanded.

As one of the problems, after an epitaxial film is grown on a CZ-Si wafer substrate obtained by the czochralski method, defects due to various crystal defects introduced when a crystal is grown by the czochralski method (hereinafter, referred to as growth-induced (grow-in) defects) remain on the surface of the epitaxial film, and may adversely affect a semiconductor element formed on the epitaxial film. Such defects on the surface of the epitaxially grown wafer (hereinafter referred to as "epitaxial defects") appear as Light Point defects (hereinafter referred to as LPDs) on the surface of the epitaxially grown wafer.

The above-mentionedLPD is a defect detected by light scattering when the wafer surface is irradiated with laser light, and can be measured by a commercially available particle counter. The LPD rating may also be applied per wafer or per 100cm on the surface of the epitaxial layer²The number of LPDs (a) was evaluated.

Disclosure of Invention

The present invention addresses the problem of providing an epitaxial wafer in which the above-described epitaxial defects are reduced, and a method for manufacturing the same.

In order to achieve the above object, an epitaxial wafer according to the present invention is an epitaxial wafer in which an epitaxial film made of single-crystal silicon is formed on a surface of a wafer substrate made of single-crystal silicon, wherein the epitaxial wafer is characterized in that the detection density of LPDs having a particle size of 0.045 μm or more on the surface of the epitaxial film is 100cm²An area of 4.24 or less, and a detection density of LPDs having a particle diameter of 0.032 μm or more on the surface of the epitaxial film is 100cm or less²The area is less than 11.3.

The method for manufacturing an epitaxially grown wafer according to the present invention includes: a step of growing a single crystal ingot under a condition that the value of V/G is controlled to be in a COP-rich range, when the pulling rate by the Czochralski method is V (mm/min) and the average value of the temperature gradient in the pulling axis direction at the crystal growth interface is G (DEG C/mm), thereby obtaining a single crystal silicon ingot without large-area dislocation defects on the whole cutting surface when slicing; a step of slicing the single crystal silicon ingot to perform mirror polishing on the surface thereof to obtain a wafer substrate; and a step of growing a film of a silicon single crystal on the surface of the wafer substrate to form an epitaxial film, wherein the step of forming the epitaxial film results in the formation of an LPD having a particle size of 0.045 [ mu ] m or more on the surface of the epitaxial film, the LPD having a detection density per 100cm²LPD having an area of 4.24 or less and a particle diameter of 0.032 μm or more is detected at a density of 100cm²An area of the epitaxial film is 11.3 or less.

The cop (crystal ordered grain) is one of growth-induced (Grown-in) defects, and refers to a fine defect in which silicon atoms are not present at lattice points of a single crystal, that is, a "void" is aggregated. The Large-area Dislocation defect (hereinafter referred to as L/D defect) is one of growth-induced (Grown-in) Defects, and refers to a Dislocation loop generated by silicon atoms gathered between lattices.

Drawings

Fig. 1 is a vertical cross-sectional view showing a single crystal pulling apparatus used in an embodiment of the method for manufacturing an epitaxial wafer according to the present invention.

FIG. 2 is a schematic diagram showing the relationship between the V/G value and the distribution of defects when the pulling rate of a single crystal ingot by the Czochralski method is V (mm/min) and the average value of the temperature gradient in the crystal inner in the pulling axis direction is G (. degree. C./mm).

Fig. 3 is a graph showing the ranges of the preferred tilt angles θ and Φ when the wafer substrate is sliced in the method according to the embodiment of the present invention.

Fig. 4 is a vertical sectional view showing an epitaxial film forming apparatus used in the method according to the embodiment of the present invention.

Detailed Description

Embodiments of an epitaxial wafer and a method for manufacturing the same according to the present invention will be described in detail below with reference to the drawings.

[ epitaxial growth wafer ]

The epitaxial wafer according to the present embodiment is an epitaxial wafer in which an epitaxial film made of single crystal silicon is formed on a surface of a wafer substrate made of single crystal silicon. The detection density of LPD having a particle diameter of 0.045 μm or more on the surface of the epitaxial film is 100cm²An area of 4.24 or less, and a detection density of LPDs having a particle diameter of 0.032 μm or more on the surface of the epitaxial film is 100cm or less²The area is less than 11.3.

LPD having a particle diameter of 0.045 μm or more has a density of detection per 100cm²The term "4.24 pieces or less in area" means that 30 pieces or less of LPDs are present on the entire surface of a wafer having a diameter of 300mm, and the detection density of LPDs having a particle size of 0.032 μm or more is 100cm²The area of 11.3 or less means that 80 or less are present over the entire surface of a wafer having a diameter of 300 mm.

An example of a method for measuring the density of detection of LPD is to use a wafer surface inspection apparatus (e.g., a wafer surface inspecting apparatus manufactured by KLA Tencor CorporationProduct name "Surfscan SP 2"), a method for measuring an epitaxially grown wafer using the DCO mode of the apparatus. The wafer surface inspection apparatus irradiates the surface of an epitaxially grown wafer with ultraviolet laser light, and analyzes the signal of the reflected light, thereby detecting defects and foreign substances present on the surface of the wafer. In this specification, the number of LPDs (LPD count) measured on the entire surface of a wafer by using a wafer surface inspection apparatus is converted into LPDs per 100cm²The value of the area is used as the detection density of LPDs.

The outer diameter of the epitaxial wafer is not limited, and may be 150mm to 450 mm. The thickness of the epitaxial wafer is not limited, and may be 625 μm or more and 1300 μm or less. The thickness of the epitaxial film is not limited, and may be 1 μm or more and 10 μm or less. If the above ranges are satisfied, an epitaxially grown wafer having the features of the present invention can be easily manufactured.

The wafer substrate can be used even without doping with nitrogen, but may be a silicon single crystal doped with nitrogen when crystal growth is performed by the czochralski method.

When the single crystal silicon is doped with nitrogen, condensation of oxygen in the crystal is promoted, the density of oxygen precipitation nuclei can be increased, the thermal stability of the oxygen precipitation nuclei can be improved, and a gettering source which does not easily disappear even when subjected to high-temperature heat treatment in the epitaxial step can be easily formed in the wafer substrate. In order to effectively improve the thermal stability of the oxygen precipitation nuclei, the wafer substrate may include a substrate having a thickness of 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³The following concentrations are doped with nitrogen. The amount of nitrogen doped is more preferably 1X 10¹³atoms/cm³Above and 1 × 10¹⁵atoms/cm³Hereinafter, 1 × 10 is more preferable¹³atoms/cm³Above and 1 × 10¹⁴atoms/cm³The following.

However, it has been found that, in the case of the nitrogen-doped silicon single crystal, the above-described effects are obtained, and projections due to the inner wall oxide film of the COP are formed around the COP generated on the wafer substrate, and these projections deteriorate the quality of the epitaxial film. Therefore, when using silicon single crystal doped with nitrogen, it is preferable to remove the projections by dissolving the wafer substrate by cleaning the wafer substrate with a cleaning solution containing hydrofluoric acid (HF) as described later.

[ method for producing epitaxially grown wafer ]

The method for manufacturing an epitaxially grown wafer according to the present embodiment includes the steps of:

(1) a step of growing a single crystal ingot under a condition that the value of V/G is controlled to be in a COP-rich range, when the pulling rate by the Czochralski method is V (mm/min) and the average value of the temperature gradient in the pulling axis direction at the crystal growth interface is G (DEG C/mm), thereby obtaining a single crystal silicon ingot without large-area dislocation defects on the whole cutting surface when slicing;

(2) a step of slicing the single crystal silicon ingot to perform mirror polishing on the surface thereof to obtain a wafer substrate; and

(3) and growing a film of a silicon single crystal on the surface of the wafer substrate to form an epitaxial film.

Hereinafter, each step will be specifically described below.

(1) Process for producing silicon single crystal ingot

In the method of the present embodiment, a single crystal silicon ingot is first produced by the CZ method. The silicon single crystal pulling apparatus may be any apparatus commonly used, and for example, the apparatus shown in fig. 1 may be used. In fig. 1, a chamber 11 which is a cylindrical sealed container is provided with a shaft 12 vertically erected at a central lower portion of the chamber 11 and capable of moving up and down, a carbon heating stage 13 mounted on the shaft 12, and quartz (SiO) which is a semiconductor melt L which is a silicon melt and is supported by the heating stage 13 and stores the silicon melt₂) A crucible 14, a cylindrical heater 15 coaxially disposed with a predetermined distance from the outer periphery of the crucible 14, and a heat insulating cylinder 16 disposed around the heater 15.

A flow pipe 17 is disposed above the crucible 14 coaxially with the crucible 14. The flow pipe 17 is formed in a cylindrical shape with a diameter narrowed downward, and has a horizontally extending flange portion 17a formed at an upper end thereof, and the flange portion 17a is supported by an annular upper ring 18 attached to an upper portion of the heat retention tube 16. The crucible 14 has a bottomed cylindrical shape, and rotates at a predetermined angular velocity on a horizontal plane about the axis of the shaft 12. The heater 15 heats and melts the silicon raw material in the crucible 14 and keeps the temperature of the semiconductor melt L generated thereby, and a resistance heating type heater is generally used.

The heat insulating cylinder 16 is formed of a heat insulating material 16a including carbon fiber (carbon fiber), and a carbon plate 16b as a support plate is laid on the inner side. The pulling wire 19 is suspended at the upper part of the chamber 11 so as to be freely movable up and down and rotatable, and a seed crystal of silicon is fixed to the lower end of the pulling wire 19. A transparent window 20 for observing the solid-liquid interface of the semiconductor single crystal C is provided in the upper part of the chamber 11.

The flow pipe 17 shields radiant heat to the semiconductor single crystal C at the time of growth, and blows off SiO generated from the semiconductor melt L by passing argon (inert gas) supplied from a gas inlet 11a at the upper end of the chamber 11 and blowing the argon onto the semiconductor melt L₂. Containing blown SiO₂The argon gas in the chamber 11 is discharged to the outside from the gas outlet 11b at the lower end.

In the case of crystal growth, first, argon gas is supplied from the gas inlet 11a, a power supply is turned on the heater 15 to melt the silicon raw material in the crucible 14 into the semiconductor melt L, and the electric power of the heater 15 is adjusted to maintain the single crystal growth temperature in the vicinity of the central liquid level of the semiconductor melt L.

Subsequently, the seed crystal suspended by the pulling wire 19 is lowered, dipped and fused into the semiconductor melt L, and is made dislocation-free by so-called necking, and thereafter the semiconductor single crystal C is grown and pulled while rotating the crucible 14 and the pulling wire 19 in opposite directions to each other.

In this case, in the present embodiment, when the pulling rate by the czochralski method is V (mm/min) and the average value of the temperature gradient in the pulling axis direction at the crystal growth interface is G (c/mm), the single crystal ingot is grown under the condition that the value of V/G is controlled to fall within the COP range. Thus, a single crystal silicon ingot free from large dislocation defects over the entire cut surface during slicing was obtained.

FIG. 2 is a schematic view showing a general relationship between a CZ-Si crystal and a CZ-Si crystal, wherein the horizontal axis represents a radial position of the crystal and the vertical axis represents V/G, and a defect distribution. The temperature distribution in the single crystal depends on the hot zone structure in the CZ furnace, and the distribution does not change much even if the pulling rate changes. In FIG. 2, the pull rate is higher at the upper side of the vertical axis, and the pull rate is lower at the lower side. In the case of growing a silicon single crystal in a CZ furnace having the same hot zone structure, the defect distribution depends only on the pulling rate in accordance with the relationship shown in fig. 2. When the pulling rate is high (for example, in the case of the wafer a), high-density COP is detected almost on the entire surface, and when the pulling rate is gradually adjusted to be low, OSF (oxidation in reduced Stacking fault) annularly distributed from the outer peripheral portion appears, and as the rate is decreased, the OSF ring gradually shrinks toward the center portion. In the region below the point P, an L/D region appears in the outer peripheral portion, and then gradually spreads over the entire surface. In fig. 2, the range in which the V/G value is equal to or less than the point P located at the upper end of the L/D region is referred to as the L/D rich range, and the range above the point P is referred to as the COP rich range.

In this method, the pull-up rate is set so that V/G is in a COP-rich region above the P point in FIG. 2. For example, wafer a, which is obtained from a silicon ingot produced at a value a at which V/G is greater than point P, is suitable for the production of epitaxial wafers of the present invention with reduced occurrence of L/D defects. On the other hand, wafer B obtained from an ingot manufactured at a value B smaller than the P point has many L/D defects. The epitaxial wafer fabrication of the present invention is not suitable because it results in large-scale growth of L/D defects after formation of an epitaxial film.

In the case where the nitrogen-doped silicon single crystal is produced in the step (1), in order to remove the projection due to the inner wall oxide film of the COP generated around the COP of the wafer substrate, it is preferable to provide a step (2-1) of cleaning the wafer substrate with an aqueous hydrofluoric acid solution to remove the projection due to the COP existing on the surface of the wafer substrate.

In this case, in the pulling step, the nitrogen doping concentration in the wafer substrate is preferably set to 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³Nitrogen doping is performed in the following manner. More preferably 1X 10¹³atoms/cm³Above and 1 × 10¹⁵atoms/cm³Hereinafter, 1 × 10 is more preferable¹³atoms/cm³Above and1×10¹⁴atoms/cm³the following. The method of doping nitrogen may be any method as long as it is capable of doping nitrogen at a desired concentration, and examples thereof include mixing nitride in a raw material or a melt, growing a single crystal while flowing nitrogen or nitrogen compound gas into a furnace, blowing nitrogen or nitrogen compound gas into polycrystalline silicon at a high temperature before melting, and using a crucible made of nitride. In either case, the nitrogen concentration doped in the crystal can be adjusted by adjusting the amount of nitride, the nitrogen concentration, or the time for blowing the nitrogen.

By doping nitrogen into a silicon single crystal, oxygen condensation in the crystal can be promoted, the density of oxygen precipitation nuclei can be increased, and thermal stability can be increased. The concentration of doped nitrogen is less than 1 x 10¹³atoms/cm³In the case (2), it is difficult to promote the formation of oxygen precipitation nuclei, and the nitrogen concentration exceeds 1X 10¹⁶atoms/cm³In the case of (3), the single crystal is easily dislocated. Epitaxial defects are generated when the nitrogen concentration exceeds 1 x 10¹⁴atoms/cm³Time becomes significant and subsequent hydrofluoric acid cleaning is required.

(2) Process for obtaining wafer substrate

The silicon single crystal grown by the CZ method is sliced perpendicularly to the pulling direction by a usual method, and processed into a wafer substrate. For example, after the outer peripheral grinding and the directional flat processing, slicing is performed by wafer cutting with an inner peripheral blade saw or a wire saw. The sliced wafer substrate is subjected to chamfering and polishing, and chemical etching for removing a processing-affected layer is further performed, and polishing is further performed, thereby obtaining a mirror-finished wafer substrate having optical luster.

The wafer substrate used in the present embodiment is preferably a substrate cut at an oblique angle with respect to the (100) plane of the single crystal silicon ingot. The inclination angle is an angle theta relative to the (100) facing [ 011 ] direction or [ 0-1-1 ] direction, and an angle phi relative to the [ 01-1 ] direction or [ 0-11 ] direction, and the angle theta and the angle phi are preferably in the ranges of 10 '< theta < 2 °, 10' < phi < 30 'or 10' < phi < 2 °, 10 '< theta < 30', respectively.

To describe the tilt angles θ and φ in detail, the crystal directions [ 011 ], [ 0-1-1 ], [ 01-1 ], [ 0-11 ] exist on the (100) surface of the wafer substrate through the center of the wafer substrate, the angle component in the [ 011 ] or [ 0-1-1 ] direction is defined as an angle θ, and the angle component in the [ 01-1 ] or [ 0-11 ] direction is defined as an angle φ, with respect to the angle formed by the normal line of the (100) surface and the normal line of the surface 2a of the wafer substrate.

FIG. 3 is a graph showing preferred ranges of the tilt angles θ and φ, in which the horizontal axis shows the angle component in the tilt angle φ, i.e., the [ 011 ] direction or the [ 0-1-1 ] direction, and the vertical axis shows the angle component in the tilt angle θ, i.e., the [ 01-1 ] direction or the [ 0-11 ] direction. In the wafer substrate of the present embodiment, the tilt angles θ and Φ are set to ranges of 10 '< θ < 2 °, 10' < Φ < 30 ', or 10' < Φ < 2 °, 10 '< θ < 30', and the numerical limitation range of the angles is approximately equivalent to the 4L-shaped frames in fig. 3.

In the cross-shaped region on the side of the outer side of the 4L-shapes in fig. 3 closer to the horizontal axis and the vertical axis, although the occurrence of COP traces after the growth of the epitaxial silicon layer is reduced, defects such as cracks, detachment, cracks, and chipping are likely to occur in the wafer substrate. In a rectangular region surrounded by the inside of the L-shape, micro roughness (micro roughness) becomes good, but COP traces cannot be reduced. However, the 4L-shaped regions in the frame have fewer defects such as cracks, peelings, cracks, and chipping, and COP traces and micro roughness are reduced, thereby obtaining an excellent epitaxial wafer. Therefore, the epitaxially grown wafer of the above quality can be easily produced. The microroughness is a reference of minute unevenness on the surface of the silicon substrate.

As described above, for example, when slicing a silicon single crystal ingot using a wire saw, a smooth surface can be obtained by slightly shifting the wall opening direction of the silicon single crystal ingot from the feeding direction of the wire and the ingot feeding direction, and then slicing the ingot after shifting the two directions.

The wafer substrate thus obtained is mirror-finished through a subsequent wafer processing process. Thus, a plurality of particles (20 particles/cm) can be obtained²Above) 0.1 μm or more in size but can reduce COP traces in the epitaxial film formation process and can also reduce the size of the epitaxial growth surfaceA wafer substrate with micro roughness.

(2-1) Process for removing projections when Nitrogen is doped in silicon Single Crystal

Doping monocrystalline silicon with a concentration exceeding 1 x 10¹⁴atoms/cm³In the case of nitrogen (2), the wafer substrate is preferably cleaned with an aqueous hydrofluoric acid solution containing hydrofluoric acid before epitaxial growth on the wafer substrate. The purpose of this is to remove the protrusion (thought to be mainly an oxide) generated around the COP by doping nitrogen before performing epitaxial growth.

The concentration of hydrofluoric acid in the hydrofluoric acid aqueous solution is preferably 0.5% by mass or more and 50% by mass or less, and within this range, it is possible to effectively remove, within a time period industrially allowable, projections (considered as oxides) generated around COPs generated on the wafer substrate surface, and easily bring the detection density of LPDs of the finally obtained epitaxially grown wafer into the above-mentioned range. The hydrofluoric acid concentration is more preferably 0.5% by mass or more and 20% by mass or less.

After cleaning with an aqueous solution containing hydrofluoric acid, fine particles are likely to adhere to the surface of the wafer substrate, and therefore, it is preferable to remove the fine particles, and cleaning with an aqueous solution containing ammonia and hydrogen peroxide water, so-called SC-1 cleaning, is preferably performed. Preferably, the SC-1 cleaning solution has an ammonia concentration of 0.05 to 5mass% and a hydrogen peroxide concentration of 0.05 to 10 mass%. The temperature of the SC-1 cleaning solution during cleaning is preferably 20-90 ℃. Even when the silicon single crystal is not doped with nitrogen, SC-1 cleaning can be performed as needed.

Further, after the SC-1 cleaning, cleaning with an aqueous solution containing hydrochloric acid and hydrogen peroxide water which exerts an effect of removing metal impurities, so-called SC-2 cleaning, may be performed as necessary. Preferably, the SC-2 cleaning solution has a hydrogen chloride concentration of 0.05 to 10 mass% and a hydrogen peroxide concentration of 0.05 to 10 mass%. The temperature of the SC-2 cleaning solution during cleaning is preferably 20-90 ℃. Even when the silicon single crystal is not doped with nitrogen, SC-2 cleaning can be performed as needed.

In addition, the step of removing the projections may include an ozone water treatment step of oxidizing the surface of the wafer substrate with ozone gas before the wafer substrate is cleaned with the hydrofluoric acid aqueous solution. The concentration of ozone in the ozone water is preferably 10 to 30 ppm.

(3) Process for forming epitaxial film

Fig. 4 shows a piece-by-piece epitaxial film manufacturing apparatus 21 that can be favorably used in the present embodiment. The epitaxial film manufacturing apparatus 21 includes: a film forming chamber 26 formed by an upper dome 24 and a lower dome 25; a disk-shaped heating stage 23 disposed inside the film forming chamber 26; a front surface side heater group 27 disposed above the film forming chamber 26, i.e., on the front surface 22a side of the wafer substrate 22; and a back surface side heater group 28 disposed below the film forming chamber 26, i.e., on the back surface 22b side of the wafer substrate 22. The back surface 22b of the wafer substrate 22 is supported substantially horizontally by the heating stage 23.

The disk-shaped heating stage 23 is rotatably supported by a rotating shaft 23 a. A support arm 23b extending in the radial direction is attached to the rotary shaft 23a, a support pin 23c is attached to the tip of the support arm 23b, and the support pin 23c is joined to the outer edge 23d of the heating stage 23. A lift arm 23e is attached to the rotation shaft 23 a. The lift arm 23e includes a circular tubular body portion 23f having a through hole 23f1, and an arm portion 23g extending in the radial direction from one end portion of the body portion 23 f. The rotating shaft 23a is inserted into the through hole 23f1 of the main body 23f, and the lift arm 23e is movable in the axial direction of the rotating shaft 23 a. On the other hand, movable pins 23h for supporting the wafer substrate 22 are attached to the heating stage 23. The support arm 23b is provided with a through hole 23i, the heating stage 23 is provided with a through hole 23j, and the movable pin 23h penetrates the through hole 23i and the through hole 23 j. The tip of the arm portion 23g of the lift arm 23e is disposed directly below the movable pin 23h, and the movable pin 23h moves up and down as the lift arm 23e moves up and down.

The upper dome 24 and the lower dome 25 constituting the film forming chamber 26 are supported and fixed by a dome supporting member 29. The upper dome 24 and the lower dome 25 are made of a transparent member such as quartz, and heat the heating stage 23 and the wafer substrate 22 by a front side heater group 27 and a back side heater group 28 disposed outside the film forming chamber 26. The dome support member 29 is provided with a gas inlet 29a and a gas outlet 29b, and allows a reaction gas such as silane to flow into the film forming chamber 26. A radiation thermometer, not shown, is provided outside the film forming chamber 26, and is capable of measuring the temperature of the central portion of the front surface 22a of the wafer substrate 22.

As shown in fig. 4, the front surface side heater group 27 is composed of a plurality of heaters 27a arranged regularly. The front surface side heater group 27 is divided into an inner peripheral portion heater 27A facing the front surface 22a of the wafer substrate 22 and an outer peripheral portion heater 27B located outside the inner peripheral portion heater 27A. The inner periphery heater 27A is a heater positioned directly above the front surface 22a of the wafer substrate 22 in the front surface side heater group 27. The number of the inner circumferential heaters 27A is preferably 1 or more. The outer circumferential heater 27B is a plurality of heaters positioned outside the inner circumferential heater 27A, and the outer circumferential heaters 27B are arranged around the inner circumferential heater 27A. The inner peripheral portion heater 27A mainly heats substantially the entire surface of the wafer substrate surface 22a, and the outer peripheral portion heater 27B heats the outer edge portion of the wafer substrate surface 22 a.

The back-side heater group 28 is constituted by a plurality of heaters 28a arranged regularly, similarly to the front-side heater group 27. The rear surface side heater group 28 is divided into an inner peripheral portion heater 28A located at a position opposed to the rear surface 22B of the wafer substrate 22 and an outer peripheral portion heater 28B located outside the inner peripheral portion heater 28A. The inner periphery heater 28A is a heater located directly below the back surface 22b of the wafer substrate 22 in the back surface side heater group 28. The number of the inner periphery heaters 28A is preferably 1 or more. The outer periphery heater 28B is a plurality of heaters positioned outside the inner periphery heater 28A, and the outer periphery heaters 28B are preferably arranged around the inner periphery heater 28A. The inner peripheral heater 28A mainly heats substantially the entire surface of the wafer substrate back surface 22B via the heating stage 23, and the outer peripheral heater 28B heats the outer edge portion of the wafer substrate back surface 22B via the heating stage 23.

The

heaters

27a and 28a constituting the front-side heater group 27 and the back-side heater group 28 may be lamp heaters such as halogen heaters, infrared heaters, or the like, for example. Each heater may be a heater that operates at a constant output or a heater whose output is variable. The output values of the

heaters

27a and 28a may be the same or different. The

heaters

27a and 28a are connected to a control mechanism, not shown, and the control mechanism can open and close the

heaters

27a and 28a, respectively, or change the output of the

heaters

27a and 28a, respectively.

When forming an epitaxial film, the wafer substrate 22 subjected to the mirror surface processing is introduced into the epitaxial film manufacturing apparatus 21 shown in fig. 4 by cutting in the above orientation, and first, the wafer substrate 22 is placed on the heating stage 23 in a hydrogen atmosphere. Then, the inside of the film forming chamber 26 is heated to a predetermined etching temperature to perform hydrogen baking on the surface 22a of the wafer substrate 22. Then, hydrogen chloride gas is supplied to etch the surface 22a of the wafer substrate 22, thereby removing particles and the like. Then, the temperature in the film forming chamber 26 is set to a predetermined growth temperature, and a reaction gas such as hydrogen gas and silane is introduced to grow an epitaxial film under the above-described conditions.

After the epitaxial growth, the inside of the film forming chamber 26 is cooled. Subsequently, the processed epitaxial wafer is taken out of the film forming chamber 26, and hydrogen chloride gas is supplied into the film forming chamber 26 to etch and remove deposits of silicon adhering to the inner wall surface of the film forming chamber 26. When the series of processes is completed, another wafer substrate is set inside the film forming chamber 26 and the epitaxial growth process is continued.

When the epitaxial film is grown, it is preferable that the output of the inner periphery heater 27A of the front side heater group 27 is set to be larger than the output of the outer periphery heater 27B, and the output of the inner periphery heater 28A of the back side heater group 28 is set to be smaller than the output of the outer periphery heater 28B. Specifically, it is preferable that the ratio of the output of the front side heater group 27 to the total output of the front side heater group 27 and the back side heater group 28 is set to a range of 46% to 60%, the ratio of the output of the inner periphery portion heater 27A of the front side heater group 27 to the total output of the front side heater group 27 is set to a range of 60% to 90%, and the ratio of the output of the inner periphery portion heater 28A of the back side heater group 28 to the total output of the back side heater group 28 is set to a range of 14% to 22%.

The outputs of the front-side heater group 27 and the back-side heater group 28 are preferably set so that the temperature of the central portion of the front surface 22a of the wafer substrate is within a range of 1050 ℃ to 1200 ℃. More preferably 1100 ℃ to 1150 ℃.

More preferably, the ratio of the output of the back-side heater group 28 to the total output of the front-side heater group 27 and the back-side heater group 28 is set to the range of 56% to 60%, the ratio of the output of the inner periphery heater 27A to the total output of the front-side heater group 27 is set to the range of 66% to 74%, and the ratio of the output of the inner periphery heater 28A to the total output of the back-side heater group 28 is set to the range of 16% to 18%. The outputs of the front-side heater group 27 and the back-side heater group 28 are preferably set so that the temperature of the central portion of the front surface 22a of the wafer substrate 22 is in the range of 1100 ℃ to 1130 ℃.

As a specific method of adjusting the output of the inner periphery heater or the outer periphery heater, for example, the output of the outer periphery heater and the inner periphery heater may be adjusted to a target output ratio by controlling the amount of electric power by a control mechanism not shown. The adjustment may be performed by operating all the outer periphery heaters and not operating a part of the inner periphery heaters. The design value of the output of each heater constituting the inner periphery heater may be set to be smaller than the design value of the output of each heater constituting the outer periphery heater, and all of the heaters may be operated to adjust the output.

By setting the output of the inner periphery heater 27A of the front side heater group 27 to be larger than the output of the outer periphery heater 27B and setting the output of the inner periphery heater 28A of the back side heater group 28 to be smaller than the output of the outer periphery heater 28B, it is possible to suppress the generation of COP traces in the epitaxial film. In particular, by setting the output of each heater in the above range, the generation of COP traces in the epitaxial film can be more effectively suppressed. Further, by setting the temperature of the central portion of the wafer substrate front surface 22a to the above range, COP traces can be greatly reduced.

The epitaxial film is formed under conditions in which the flow rate and flow ratio of the hydrogen gas and the reaction gas are controlled under normal pressure and the temperature is controlled, and the film forming rate is preferably 1 μm/min to 5 μm/min. The film formation rate is more preferably 2 μm/min to 4 μm/min. The normal pressure is a pressure in which a gas amount supplied into a film forming chamber for accommodating a wafer substrate and a gas amount discharged from the film forming chamber are balanced when an epitaxial film is formed, and the pressure in the film forming chamber is substantially the atmospheric pressure.

Through the above steps, the above epitaxially grown wafer can be produced. The present invention is not limited to the above-described embodiments, and various parts and conditions may be arbitrarily changed within the scope described in the claims.

Effects of the invention

According to the epitaxial wafer and the method for manufacturing the same of the present invention, an epitaxial wafer with reduced epitaxial defects can be obtained.

Claims

1. An epitaxial growth wafer having an epitaxial film including single-crystal silicon formed on a surface of a wafer substrate including single-crystal silicon,

the detection density of LPD having a particle diameter of 0.045 μm or more on the surface of the epitaxial film is 100cm²An area of 4.24 or less, and a detection density of LPDs having a particle diameter of 0.032 μm or more on the surface of the epitaxial film is 100cm or less²The area is less than 11.3.

2. The epitaxial growth wafer of claim 1,

the outer diameter of the epitaxial wafer is 150mm to 450mm, the thickness of the epitaxial wafer is 625 μm to 1300 μm, and the thickness of the epitaxial film is 1 μm to 10 μm.

3. The epitaxially grown wafer of claim 1 or 2,

the wafer substrate comprises a substrate 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³The following concentrations are doped with nitrogen.

4. A method for manufacturing an epitaxially grown wafer is characterized by comprising the following steps:

a step of growing a single crystal ingot under a condition that the value of V/G is controlled to be in a COP-rich range, when the pulling rate by the Czochralski method is V (mm/min) and the average value of the temperature gradient in the pulling axis direction at the crystal growth interface is G (DEG C/mm), thereby obtaining a single crystal silicon ingot without large-area dislocation defects on the whole cutting surface when slicing;

a step of slicing the single crystal silicon ingot to perform mirror polishing on the surface thereof to obtain a wafer substrate; and

a step of growing a film of a silicon single crystal on the surface of the wafer substrate to form an epitaxial film,

in the step of obtaining the single crystal silicon ingot, the value of V/G is controlled so that COP of 0.1 μm or more in size existing on the surface before forming an epitaxial film is 20 pieces/cm²The above-mentioned wafer substrate is provided with a plurality of grooves,

in the step of forming the epitaxial film, the single crystal growth rate is set to 1 μm/min to 5 μm/min under normal pressure,

in the step of obtaining the single crystal silicon ingot, the silicon ingot is 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³The single crystal silicon is pulled up while doping nitrogen at the following concentration,

after the step of obtaining the wafer substrate, cleaning the wafer substrate with a hydrofluoric acid aqueous solution to remove a projection due to COP existing on the surface of the wafer substrate,

the hydrofluoric acid concentration of the hydrofluoric acid aqueous solution is 0.5mass% or more and 50mass% or less,

forming the epitaxial film so that the detection density of LPDs having a particle size of 0.045 [ mu ] m or more on the surface of the epitaxial film is 100cm²LPD having an area of 4.24 or less and a particle diameter of 0.032 μm or more is detected at a density of 100cm²An area of the epitaxial film is 11.3 or less.

5. The method of manufacturing an epitaxially grown wafer according to claim 4,

in the step of forming the epitaxial film, a front surface inner periphery side heater opposed to an inner periphery side of a front surface of the wafer substrate, a front surface outer periphery side heater opposed to an outer periphery side of the front surface of the wafer substrate, a back surface inner periphery side heater opposed to an inner periphery side of a back surface of the wafer substrate, and a back surface outer periphery side heater opposed to an outer periphery side of the back surface of the wafer substrate are arranged, respectively, and the epitaxial film is formed while heating the inner periphery side of the wafer substrate to a temperature higher than the outer periphery side by setting an output of the front surface inner periphery side heater to be larger than the front surface outer periphery side heater and setting an output of the back surface inner periphery side heater to be larger than the back surface outer periphery side heater.

6. The method of manufacturing an epitaxially grown wafer according to claim 4 or 5,

the step of removing the protrusions includes an ozone water treatment step of oxidizing the surface of the wafer substrate with ozone water before the wafer substrate is cleaned with a hydrofluoric acid aqueous solution.