CN108505114A

CN108505114A - Epitaxial growth wafer and its manufacturing method

Info

Publication number: CN108505114A
Application number: CN201710113065.0A
Authority: CN
Inventors: 长谷川博之
Original assignee: Sumco Corp
Current assignee: Sumco Corp
Priority date: 2017-02-28
Filing date: 2017-02-28
Publication date: 2018-09-07
Anticipated expiration: 2037-02-28
Also published as: CN108505114B

Abstract

The present invention provides a kind of epitaxial growth wafer reducing epitaxy defect.The manufacturing method has following process：Obtain the process that the monocrystal silicon of large area dislocation defects is not present in the entire section when being sliced；The monocrystal silicon is sliced, in the process that its surface is mirror-finished and obtains wafer substrate；And the film of silicon single crystal is set to grow the process to form epitaxial film on the surface of the wafer substrate.In the process for forming the epitaxial film, the configuration surface inner circumferential side heater opposed with the inner peripheral portion on the surface of the wafer substrate, the periphery side heater opposed with the peripheral part on the surface of the wafer substrate, the back side inner circumferential side heater opposed with the inner peripheral portion at the back side of the wafer substrate, the back side peripheral side heater opposed with the peripheral part at the back side of the wafer substrate, the epitaxial film is formed while being heated into the inner circumferential side of the wafer substrate higher than peripheral side temperature.

Description

Epitaxial growth wafer and its manufacturing method

Technical field

The present invention relates to a kind of on the surface of the wafer substrate including monocrystalline silicon formed include monocrystalline silicon epitaxial film Epitaxial growth wafer and its manufacturing method.

Background technology

Growing epitaxial silicon wafer is that the film of monocrystalline silicon is carried out gas phase life on the surface of the wafer substrate including monocrystalline silicon Long wafer, the height for the case where the case where to coping with the integrality for requiring crystallization or needing resistivity different multilayered structure The demand of quality wafer is higher and higher.This growing epitaxial silicon wafer is especially suitable for high new logic LSI and cmos image passes The manufacture of sensor.

In recent years, the requirement to the high-quality of epitaxial growth wafer is all the more stringent, it is desirable that improves epitaxial growth wafer table The defect in face.

As one of described problem, make epitaxial film growth on the CZ-Si wafer substrates obtained using Czochralski method sometimes Later, imported when the remained on surface of epitaxial film using Czochralski method because making crystalline growth various crystal defects (with Under, referred to as growth introduces (grown-in) defect) caused by defect, and brought to the semiconductor element for being formed in epitaxial film bad It influences.The defect (hereinafter referred to as epitaxy defect) of this epitaxial growth crystal column surface is lacked with the luminous point of epitaxial growth crystal column surface The form for falling into the grade deterioration of (Light Point Defect, hereinafter referred to as LPD) shows.

The LPD is when irradiating laser to crystal column surface, and the defect arrived by scattering measuring can use commercially available particle Calculator measures.The grade of LPD can also use every wafer or every 100cm on the surface of epitaxial layer²The number of LPD comment Valence.

Invention content

Problem of the present invention is that providing a kind of epitaxial growth wafer reducing the epitaxy defect and its manufacturer Method.

In order to realize the project, the epitaxial growth wafer of the invention shape on the surface of the wafer substrate including monocrystalline silicon At there is the epitaxial film including monocrystalline silicon, which is characterized in that, 0.045 μm of grain size on the surface of the epitaxial film The detection density of above LPD is per 100cm²Area 4.24 is hereinafter, and 0.032 μm of grain size on the surface of the epitaxial film The detection density of above LPD is per 100cm²Area 11.3 or less.

The manufacturing method of the epitaxial growth wafer of the present invention is characterized in that having following process：Qie Kelao will utilized The pull rate that Si Jifa is carried out is set as V (mm/min), by being averaged for the axial temperature gradient of lifting on crystalline growth interface In the case that value is set as G (DEG C/mm), controlling the value of V/G and as COP rich ranges under conditions of grows single crystal rod, to Obtain the process that the monocrystal silicon of large area dislocation defects is not present in the entire section when being sliced；By the monocrystalline silicon Ingot is sliced, in the process that its surface is mirror-finished and obtains wafer substrate；And on the surface of the wafer substrate The film of silicon single crystal is set to grow the process to form epitaxial film, the process by forming the epitaxial film forms the epitaxial film The detection density of the LPD of 0.045 μm of grain size or more is per 100cm on surface²Area 4.24 is hereinafter, and 0.032 μm of grain size The detection density of above LPD is per 100cm²11.3 epitaxial films below of area.

The COP (Crystal Originated Particle) introduces one of (Grown-in) defect as growth, refer to The grid point of monocrystalline does not have the fine defect that silicon atom has accumulated " emptying aperture ".Large area dislocation defects (the Large Dislocation Defects, hereinafter referred to as L/D defects) as growth one of (Grown-in) defect is introduced, refer between grid The dislocation ring for having accumulated silicon atom and generating.

Description of the drawings

Fig. 1 is the single crystal pulling apparatus for indicating to be used in an embodiment of the epitaxial growth wafer manufacturing method of the present invention Longitudinal section view.

Fig. 2 is to indicate the pull rate of the single crystal rod carried out using Czochralski method being set as V (mm/min), and lifting is axial Crystallization in temperature gradient average value be set as G (DEG C/mm) in the case of, relationship between the distribution of the value and defect of V/G Skeleton diagram.

Fig. 3 is preferred angle θ, φ when being sliced wafer substrate in the method for indicate one embodiment of the present invention Range chart.

Fig. 4 is the longitudinal section view for indicating to be used in the extension film formation device of the method for one embodiment of the present invention.

Specific implementation mode

Hereinafter, reference chart carries out in detail the embodiment of epitaxial growth wafer according to the present invention and its manufacturing method Explanation.

[epitaxial growth wafer]

The epitaxial growth wafer of present embodiment is to be formed with including monocrystalline silicon on the surface of the wafer substrate including monocrystalline silicon Epitaxial film epitaxial growth wafer.The detection density of the LPD of 0.045 μm of grain size or more is every on the surface of the epitaxial film 100cm²Area 4.24 is hereinafter, and the detection density of the LPD of 0.032 μm of grain size or more is every on the surface of the epitaxial film 100cm²Area 11.3 or less.

The detection density of the LPD of 0.045 μm of grain size or more is per 100cm²Area 4.24 or less refers to, if diameter 300mm wafers, then have in its entire surface 30 hereinafter, the detection density of the LPD of 0.032 μm of grain size or more is per 100cm²Area 11.3 or less refer to, if diameter 300mm wafers, then have 80 or less in its entire surface.

As the method for the detection density for measuring LPD, can enumerate using wafer surface inspection device (such as KLA Tencor Corporation systems, trade name " Surfscan SP2 "), the side of epitaxial growth wafer is measured using the DCO patterns of the device Method.The wafer surface inspection device irradiates ultraviolet laser to the surface of epitaxial growth wafer, and analyzes the signal of the reflected light, To which detection is present in the defect and foreign matter of crystal column surface.In this specification, wafer surface inspection device will be used whole to wafer The number (LPD numbers) of the LPD of a planar survey is converted into every 100cm²The value of area is used as the detection density of LPD.

The outer diameter of the epitaxial growth wafer does not limit, and can be 150mm or more and 450mm or less.The extension life The thickness of long wafer does not limit, and can be 625 μm or more and 1300 μm or less.The film thickness of the epitaxial film does not limit, can To be 1 μm or more and 10 μm or less.As long as in each range, the outer of the feature for having the present invention just can be easily manufactured Epitaxial growth wafer.

The wafer substrate can be used undoped with nitrogen and be carried out but it is also possible to be using Czochralski method Doped with the monocrystalline silicon of nitrogen when crystalline growth.

In monocrystalline silicon doped with nitrogen in the case of, can promote crystallization in oxygen condensation, can improve oxygen be precipitated core density, and And the thermal stability that core is precipitated in oxygen can be improved, it can easily be formed even across in extension process inside wafer substrate The high-temperature heat treatment of implementation is not easy to the gettering source to disappear.In order to effectively improve the thermal stability that core is precipitated in oxygen, the wafer base Plate may include with 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³Doped in concentrations profiled below has the monocrystalline silicon of nitrogen.Nitrogen Doping more preferable 1 × 10¹³atoms/cm³Above and 1 × 10¹⁵atoms/cm³Hereinafter, further preferred 1 × 10¹³atoms/ cm³Above and 1 × 10¹⁴atoms/cm³Below.

But the effect is although obtained when it has been found that being the monocrystalline silicon doped with nitrogen, and resulting from wafer substrate The bump caused by the inner wall oxide film of COP is formed around COP, these bumps can reduce the quality of epitaxial film.Therefore, In the case of using the monocrystalline silicon doped with nitrogen, preferably as be described hereinafter as use hydrofluoric acid containing (HF) cleaning solution cleaning wafer base Plate dissolves and removes the bump.

[manufacturing method of epitaxial growth wafer]

The manufacturing method of the epitaxial growth wafer of present embodiment has following process：

(1) pull rate carried out using Czochralski method is being set as V (mm/min), by the lifting on crystalline growth interface In the case that the average value of axial temperature gradient is set as G (DEG C/mm), control V/G value and as the item of COP rich ranges Single crystal rod is grown under part, to obtain the monocrystal silicon that large area dislocation defects are not present in the entire section when being sliced Process；

(2) monocrystal silicon is sliced, in the process that its surface is mirror-finished and obtains wafer substrate；And

(3) film of silicon single crystal is made to grow the process to form epitaxial film on the surface of the wafer substrate.

Hereinafter, each process is described in detail below.

(1) manufacturing process of monocrystal silicon

In the method for present embodiment, monocrystal silicon is made by CZ legal systems first.Silicon single-crystal pullup apparatus is general used Device, such as the device such as Fig. 1 can be used.In Fig. 1, it is provided in cylindric sealing container, that is, chamber 11 vertical Be erected in the central lower of chamber 11 and can move up and down axis 12, be placed on axis 12 carbon warm table 13, heated Platform 13 supports and stores the quartz (SiO of melt, that is, semiconductor melt L of silicon₂) crucible 14 processed, in the periphery of crucible 14 across rule The cylindric heater 15 of set a distance and arranged coaxial and configure heat-preservation cylinder 16 around heater 15.

There is flow tube 17 in the top of crucible 14 and 14 arranged coaxial of crucible.The cylinder that flow tube 17 diametrically narrows downward Shape is formed with the flange part 17a of horizontal extension in upper end, and flange part 17a is installed in the annular shape on the top of heat-preservation cylinder 16 Upper ring 18 support.Crucible 14 is in bottomed cylindrical, is revolved in the horizontal plane with defined angular speed centered on the axis of axis 12 Turn.Silicon raw material in crucible 14 heat/melt and keep the temperature the semiconductor melt L generated with this by heater 15, Usually using electric resistor heating type heater.

Heat-preservation cylinder 16 is covered with conduct by including that the thermal insulation material 16a of carbon fiber (carbon fiber) is formed in medial surface The carbon plate 16b of support plate.Lifting steel wire 19 is being lifted by lifting freely and hanging on the top of chamber 11 in a manner of rotating freely The seed crystal of the fixed silicon in lower end of steel wire 19.The top of chamber 11 is provided with solid-liquid circle for observing semiconductor monocrystal C The window 20 in face.

To the radiant heat of semiconductor monocrystal C when the shielding growth of flow tube 17, and make the gas introduction port from 11 upper end of chamber The argon gas (inert gas) of 11a supplies by and be blown on semiconductor melt L, and blow away and generated from semiconductor melt L SiO₂.Containing the SiO blown₂Argon gas be discharged to the outside from the gas discharge outlet 11b of 11 lower end of chamber.

In the case of carrying out crystalline growth, argon gas, the turn-on power on heater 15 are supplied from gas introduction port 11a first Silicon raw material melting in crucible 14 is made into semiconductor melt L, the electrical power of adjustment heater 15 makes semiconductor melt L's Central liquid level nearby keeps crystal growth temperature.

Then, make the seed crystal decline dipping by lifting the suspension of steel wire 19 and be blended in semiconductor melt L, pass through so-called neck It is retracted row dislocation-free, so that semiconductor monocrystal C is grown while making crucible 14 with lifting 19 rotation reversely with each other of steel wire later And it is lifted.

At this point, in present embodiment, the pull rate carried out using Czochralski method is being set as V (mm/min), it will In the case that the average value of the axial temperature gradient of lifting on crystalline growth interface is set as G (DEG C/mm), in the value of control V/G And as growing single crystal rod under conditions of COP ranges.There is no large area dislocations to lack for entire section when obtaining slice as a result, Sunken monocrystal silicon.

Fig. 2 is to indicate that horizontal axis is set as crystallization radial position in CZ-Si crystallizations, general both when the longitudinal axis is set as V/G The skeleton diagram of relationship and defect distribution.Temperature Distribution in monocrystalline depends on the hot zone structure in CZ stoves, even if pull rate is sent out Too big variation will not occur for its distribution of changing.In Fig. 2, the top of the longitudinal axis, pull rate is bigger, lower section lifting Speed is lower.In the CZ stoves with identical hot zone structure in the case of growing silicon single crystal, according to relationship shown in Fig. 2, defect Distribution is only dependent upon pull rate.When pull rate is high speed (for example, the case where wafer A), almost entire surface detects highly dense The COP of degree occurs if gradually turning down pull rate from the ring-shaped distributed OSF of peripheral part (Oxidation in duced Stacking Fault), with the decline of speed, OSF rings are gradually shunk towards central part.In the region than point P on the lower, in periphery There are the regions L/D in portion, is then gradually spread in entire surface.In Fig. 2, by the value of V/G be positioned at the regions L/D upper end P points with Under range be known as L/D rich ranges, the range more top than P point is known as COP rich ranges.

In this method, is become in a manner of the COP more top than P point enriches in region by V/G set pull rate in fig. 2. For example, the generation of the L/D defects for the wafer A that the silicon ingot of the value A manufactures by being more than P points with V/G obtains is reduced, and it is suitble to The epitaxial wafer manufacture of the present invention.On the other hand, the L/D defects of the wafer B obtained by the ingot with the value B manufactures less than P points It is more.Due to leading to L/D defects grown on larger scale after forming epitaxial film, be not suitable for the epitaxial wafer system of the present invention It makes.

In the case of manufacturing the monocrystalline silicon doped with nitrogen in the process (1), wafer substrate is resulted from order to remove The bump caused by the inner wall oxide film of COP around COP, is preferably provided with and cleans the wafer base with hydrofluoric acid aqueous solution Plate, thus the process (2-1) of bump caused by COP of the removal by the surface for being present in the wafer substrate.

In this case, in lifting process, preferably become 1 × 10 with the nitrogen doped concentration in wafer substrate¹³atoms/cm³ Above and 1 × 10¹⁶atoms/cm³Mode below carries out N doping.More preferably 1 × 10¹³atoms/cm³Above and 1 × 10¹⁵atoms/cm³Hereinafter, further preferred 1 × 10¹³atoms/cm³Above and 1 × 10¹⁴atoms/cm³Below.N doping As long as method can adulterate the nitrogen of required concentration then which kind of method, such as can enumerate in the feed or be mixed in melt nitrogen Compound, on one side flow into nitrogen into stove or compound gas while grow monocrystalline, before melting at a high temperature of be blown to polysilicon The use etc. of nitrogen or compound gas, nitride crucible.It, can be by adjusting nitride no matter in the case that any Amount, the concentration of nitrogen or be blown these time come adjust be entrained in crystallization in nitrogen concentration.

By adulterating nitrogen in silicon single crystal, the oxygen condensation in crystallization can be promoted, oxygen is improved and the density of core is precipitated, and increase Thermal stability.The nitrogen concentration adulterated is less than 1 × 10¹³atoms/cm³In the case of, it is difficult to promote oxygen that the formation of core is precipitated, separately On the one hand, nitrogen concentration is more than 1 × 10¹⁶atoms/cm³In the case of, monocrystalline is easy dislocation.The generation of epitaxy defect is dense in nitrogen Degree is more than 1 × 10¹⁴atoms/cm³When become notable, it is therefore desirable to subsequent hydrofluoric acid clean.

(2) process for obtaining wafer substrate

The silicon single crystal grown by CZ methods is sliced according to usual way is vertical with dip direction, is processed into wafer substrate. For example, after carrying out periphery grinding, directional plane processing, it is sliced by wafer using inner circumferential sword saw or scroll saw. Implement chamfering, grinding by the wafer substrate of slice, and implement the chemical etching for removing affected layer, further implements Polishing obtains the minute surface wafer substrate with optical luster.

Wafer substrate for present embodiment is preferably cut relative to (1 0 0) face of monocrystal silicon with angle of inclination Substrate.The angle of inclination be relative to (1 0 0) towards [0 1 1] direction or [0-1-1] direction be angle, θ, And to [0 1-1] direction or [0-1 1] direction be angle φ, angle, θ and angle φ respectively preferably 10 ' θ≤2 ° ＜, 30 ' or 10 ' φ≤2 ° ＜ 10 ' ＜ φ ＜, 10 ' ＜ θ ＜ 30 ' range.

If being described in detail about tilt angle theta, φ, on (1 0 0) face of wafer substrate, wafer substrate is penetrated through There are crystallization direction [0 1 1], [0-1-1], [0 1-1], [0-1 1] at center, with (1 0 0) face normal and wafer substrate Surface 2a face normal angulation subject to, by the angular components in [0 1 1] or [0-1-1] direction be defined as angle, θ, will The angular components in [0 1-1] or [0-1 1] direction are defined as angle φ.

Fig. 3 is the chart for indicating tilt angle theta, the preferred scope of φ, and horizontal axis indicates angle of inclination φ, i.e. [0 1 1] side To or [0-1-1] direction angular components, the longitudinal axis indicates tilt angle theta, i.e. [0 1-1] direction or [0-1 1] direction Angular components.In the wafer substrate of present embodiment, the tilt angle theta and φ are set as 10 ' θ≤2 ° ＜, 10 ' ＜ φ ＜ 30 ' or 10 ' φ≤2 ° ＜, 10 ' ＜ θ ＜ 30 ' range, the numerical definiteness range of the angle substantially with 4 L-shaped of Fig. 3 In frame quite.

In the outside of 4 L-shaped of Fig. 3 and horizontal axis, the longitudinal axis close to the criss-cross region of side, make epitaxial silicon layer grown The generation of COP traces later is reduced, but be easy to rupture, fall off, be cracked in wafer substrate generation, fragment the defects of. The rectangular area surrounded by the inside of L-shaped, microroughness (micro roughness) becomes good, but can not reduce COP traces Mark.But the region in the frame of 4 L-shaped, rupture, fall off, being cracked, fragment the defects of generation tail off, and reduce COP Trace and microroughness, and obtain excellent epitaxial wafer.Therefore, easy to manufacture goes out the epitaxial growth wafer of aforementioned quality.It is micro- Roughness is the small concave-convex benchmark of silicon substrate.

When as described above, such as using scroll saw monocrystal silicon being sliced, by the wall evolution of monocrystal silicon to steel The direction of feed and ingot direction of feed of silk are slightly staggered, and are sliced ingot after the two is staggered, smooth so as to obtain Surface.

The wafer substrate being achieved in that is subject to mirror finish by subsequent wafer processing technology.It so, it is possible to obtain Though on surface, there are several (20/cm²More than) COP of 0.1 μm of size or more but can subtract in epitaxial film formation process Few COP traces, and the wafer substrate of the microroughness of epitaxial growth plane can also be reduced.

(2-1) in monocrystalline silicon doped with nitrogen in the case of remove bump process

Doped with concentration it is more than 1 × 10 in monocrystalline silicon¹⁴atoms/cm³Nitrogen in the case of, carried out preferably on wafer substrate Before epitaxial growth, the hydrofluoric acid aqueous solution cleaning wafer substrate of hydrofluoric acid containing is used.Its object is to carry out epitaxial growth The bump (thinking mainly oxide) generated around COP by adulterating nitrogen is removed before.

If the hydrofluoric acid concentration in hydrofluoric acid aqueous solution is preferably 0.5mass% or more and 50mass% hereinafter, in the model It, then can industrially being effectively removed the bump generated around COP in the time allowed (be considered oxygen in enclosing Compound), which results from wafer substrate surface, easily makes the detection density of the LPD of the epitaxial growth wafer finally obtained Enter the range.Hydrofluoric acid concentration is more preferably 0.5mass% or more and 20mass% or less.

After being cleaned using the aqueous solution of hydrofluoric acid containing, particle is easy to be attached to the surface of wafer substrate, therefore excellent Choosing removal particle is preferably utilized the cleaning of the aqueous solution containing ammonia and aquae hydrogenii dioxidi, so-called SC-1 cleanings.It is preferred that SC-1 is clear The ammonia density of washing lotion is 0.05~5mass%, dense hydrogen peroxide is 0.05~10mass%.The temperature of SC-1 cleaning solutions when cleaning Preferably 20~90 DEG C of degree.Even if in the case of in monocrystalline silicon undoped with nitrogen, SC-1 cleanings can also be carried out as needed.

It can carry out utilizing the effect for playing removal metal impurities after carrying out SC-1 cleanings further as needed The cleaning of hydrochloric and aquae hydrogenii dioxidi aqueous solution, so-called SC-2 cleanings.It is preferred that the hydrogen cloride concentration of SC-2 cleaning solutions is 0.05~10mass%, concentration of hydrogen peroxide are 0.05~10mass%.The temperature of SC-2 cleaning solutions when cleaning is preferably 20 ~90 DEG C.Even if in the case of in monocrystalline silicon undoped with nitrogen, SC-2 cleanings can also be carried out as needed.

In addition, in the process of removal bump, can also have before with hydrofluoric acid aqueous solution cleaning wafer substrate The Ozone Water treatment process on the surface of wafer substrate is aoxidized using ozone gas.Ozone concentration in Ozone Water is preferably 10~ 30ppm。

(3) process for forming epitaxial film

Fig. 4 is the extension of the formula piecewise film manufacturing device 21 that can be used in present embodiment well.Extension film manufacturing device 21 Have：Film forming room 26 is formed by upside dome 24 and downside dome 25；Disk-shaped warm table 23 is configured in film forming room 26 It is internal；Surface side heater group 27 is configured in the surface sides 22a of upside, that is, wafer substrate 22 of film forming room 26；And back side adds Hot device group 28 is configured in the back side sides 22b of downside, that is, wafer substrate 22 of film forming room 26.Pass through 23 approximate horizontal bearing of warm table The back side 22b of wafer substrate 22.

Disk-shaped warm table 23 is supported to rotate freely by rotary shaft 23a.It is equipped with along radiation in rotary shaft 23a The supporting arm 23b that direction extends, is equipped with fulcrum post 23c, fulcrum post 23c is engaged in warm table in the front end of supporting arm 23b 23 outer edge 23d.Lift arm 23e is installed in rotary shaft 23a.Lift arm 23e is by the circular tube shaped with through hole 23f1 Main part 23f and one end from main part 23f are constituted along the arm 23g that radiation direction extends.Rotary shaft 23a is inserted in master The through hole 23f1 of body portion 23f, lift arm 23e can freely be moved along the axial direction of rotary shaft 23a.On the other hand, it is heating Platform 23 is equipped with the movable pin 23h for supporting wafer substrate 22.Supporting arm 23b is provided with through-hole 23i and in warm table 23 It is provided through hole 23j, movable pin 23h runs through these through-holes 23i and through hole 23j.It is configured in the underface of movable pin 23h The front end of the arm 23g of lift arm 23e, as lift arm 23e is moved up and down, movable pin 23h is also and then moved up and down.

The upside dome 24 and downside dome 25 of composition film forming room 26 are by dome bearing part 29 by supporting and fixing.Upside Dome 24 and downside dome 25 are made of the transparent component such as quartz, by configuring the surface side heating in the outside of film forming room 26 Device group 27 and back side heater group 28 and heat warm table 23 and wafer substrate 22.Dome bearing part 29 is provided with gas Inflow entrance 29a and gas flow outlet 29b, makes the reaction gas such as silane be passed to inside film forming room 26.In the outside of film forming room 26 It is provided with radiation thermometer (not shown), the temperature of the central portion of the surface 22a of wafer substrate 22 can be measured.

As shown in figure 4, surface side heater group 27 is made of the well-regulated arrangement of multiple heater 27a.Surface side Heater group 27 is divided into the inner peripheral portion heater 27A opposed with the surface 22a of wafer substrate 22 and is heated positioned at inner peripheral portion The peripheral part heater 27B in the outside of device 27A.Inner peripheral portion heater 27A refers to being located at wafer base in surface side heater group 27 The heater of the surface of the surface 22a of plate 22.The quantity of inner peripheral portion heater 27A is preferably 1 or more.Peripheral part heater 27B refers to positioned at multiple heaters in the outside of inner peripheral portion heater 27A, these peripheral part heaters 27B is around inner peripheral portion Heater 27A and configure.Inner peripheral portion heater 27A mainly heats the substantially entire surface of wafer substrate surface 22a, periphery Portion heater 27B heats the peripheral edge portion of wafer substrate surface 22a.

Back side heater group 28 and surface side heater group 27 equally by the well-regulated arrangement of multiple heater 28a and It constitutes.Back side heater group 28 is divided into the inner peripheral portion heater of the opposed locations of the back side 22b positioned at wafer substrate 22 28A and peripheral part heater 28B positioned at the outside of inner peripheral portion heater 28A.Inner peripheral portion heater 28A refers to back side heating Positioned at the heater of the underface of the back side 22b of wafer substrate 22 in device group 28.The quantity of inner peripheral portion heater 28A is preferably 1 More than a.Peripheral part heater 28B refers to multiple heaters positioned at the outside of inner peripheral portion heater 28A, preferably these peripheries Portion heater 28B is configured around inner peripheral portion heater 28A.Inner peripheral portion heater 28A is via warm table 23 mainly to wafer The substantially entire surface of substrate back 22b is heated, and peripheral part heater 28B is via warm table 23 to wafer substrate back side 22b Peripheral edge portion heated.

Heater 27a, 28a of surface side heater group 27 and back side heater group 28 are constituted, such as halogen can be used The lamps such as plain heater heater, infrared heater etc..Each heater can also may be used with the heater of constant output services To be the variable heater of output.Each respective output valve of heater 27a, 28a can be all identical, can also be different.Respectively plus Hot device 27a, 28a are connected to the control mechanism that the illustration is omitted, can respectively be carried out heater 27a, 28a by control mechanism Opening and closing or the change respective output of heater 27a, 28a.

When forming epitaxial film, is cut with aforementioned orientation, the wafer substrate 22 Jing Guo mirror finish is imported into Fig. 4 institutes Wafer substrate 22 is placed on warm table 23 by the extension film manufacturing device 21 shown in a hydrogen atmosphere first.It then, will be at Etch temperature as defined in being heated to inside film room 26 by the surface 22a of wafer substrate 22 to carry out hydrogen baking.Then, chlorination is supplied Hydrogen etches the surface 22a of wafer substrate 22, removal particle etc..Then the temperature in film forming room 26 is set as defined life Long temperature imports the reaction gas such as hydrogen and silane and makes epitaxial film growth under the foregoing conditions.

After epitaxial growth, to cooling down inside film forming room 26.Then, the extension being disposed is taken out from film forming room 26 Grow wafer, to film forming room 26 inside supply hydrogen chloride gas etch the deposit of the silicon for the internal face for being attached to film forming room 26 It removes it.So terminate a series of processing, then will continue extension life inside the setting to film forming room 26 of other wafer substrates Long processing.

When growing epitaxial film, preferably the output of the inner peripheral portion heater 27A of surface side heater group 27 is set as being more than outer The output of circumference heater 27B, and the output of the inner peripheral portion heater 28A of back side heater group 28 is set as less than periphery The output of portion heater 28B.Specifically, it is preferable that by the output phase of surface side heater group 27 for surface side heater group 27 And the ratio of back side heater group 28 always exported is located at 46%~60% range, by the inner circumferential of surface side heater group 27 The output phase of portion heater 27A is located at the ratio of surface side heater group 27 always exported 60%~90% range, will The output phase of the inner peripheral portion heater 28A of back side heater group 28 sets the ratio of back side heater group 28 always exported In 14%~22% range.

It is preferred that the output of surface side heater group 27 and back side heater group 28 is set as to make wafer substrate surface 22a The temperature of center portion be in 1050 DEG C or more 1200 DEG C of ranges below.More preferably 1100 DEG C or more 1150 DEG C or less.

More preferably by the output phase of back side heater group 28 for surface side heater group 27 and back side heater group 28 ratio always exported is located at 56%~60% range, and the output phase of inner peripheral portion heater 27A heats surface side The ratio of device group 27 always exported is located at 66%~74% range, by the output phase of inner peripheral portion heater 28A for back side The ratio of heater group 28 always exported is located at 16%~18% range.It is preferred that surface side heater group 27 and back side are added The output of hot device group 28 is set as making the temperature of the center portion of the surface 22a of wafer substrate 22 to be in 1100 DEG C or more 1130 DEG C Range below.

The specific method of output as adjustment inner peripheral portion heater or peripheral part heater, such as can also be by not scheming The output adjustment of peripheral part heater and inner peripheral portion heater is that target exports ratio by the control mechanism control amount of electrical power shown Rate.A part of inner peripheral portion heater can also be on the other hand set not work to carry out by making all peripheral part heaters work Adjustment.In advance the design value of the output for each heater that inner peripheral portion heater constituted can also be set as being less than and constitute peripheral part The design value of the output of each heater of heater is adjusted by making this institute's having heaters all work.

By the way that the output of the inner peripheral portion heater 27A of surface side heater group 27 is set as to be more than peripheral part heater 27B Output, and the output of the inner peripheral portion heater 28A of back side heater group 28 is set as less than peripheral part heater 28B Output, so as to inhibit the generation of COP traces in epitaxial film.In particular, by the way that the output of each heater is set as the model It encloses, so as to more effectively inhibit the generation of COP traces in epitaxial film.In addition, by by the center of wafer substrate surface 22a Partial temperature is set as the range, so as to which COP traces are greatly decreased.

The membrance casting condition of epitaxial film be subject under normal pressure it is above-mentioned it is temperature controlled on the basis of control hydrogen and reaction gas Flow and flow-rate ratio, rate of film build is preferably set as 1 μm/min or more and 5 μm/min or less.Rate of film build is more preferably 2 μ M/min or more and 4 μm/min or less.The normal pressure refers to being supplied into the film forming room for accommodating wafer substrate when forming epitaxial film Gas flow reaches balance with the gas flow excluded from film forming room, the indoor pressure that forms a film substantially atmospheric pressure.

By the above process, aforementioned epitaxial growth wafer can be produced.In addition, the present invention is not limited to the reality Mode is applied, each portion and each condition are arbitrarily changed in the range of capable of recording in detail in the claims.

Invention effect

According to epitaxial growth wafer according to the present invention and its manufacturing method, can obtain reduces the outer of epitaxy defect Epitaxial growth wafer.

Claims

1. a kind of epitaxial growth being formed with the epitaxial film including monocrystalline silicon on the surface of the wafer substrate including monocrystalline silicon is brilliant Circle, which is characterized in that

The detection density of the LPD of 0.045 μm of grain size or more is per 100cm on the surface of the epitaxial film²Area 4.24 hereinafter, And the detection density of the LPD of 0.032 μm of grain size or more is per 100cm on the surface of the epitaxial film²Area 11.3 or less.

2. epitaxial growth wafer according to claim 1, which is characterized in that

The outer diameter of the epitaxial growth wafer is 150mm or more and 450mm hereinafter, the thickness of the epitaxial growth wafer is 625 μ M or more and 1300 μm hereinafter, the film thickness of the epitaxial film is 1 μm or more and 10 μm or less.

3. epitaxial growth wafer according to claim 1 or 2, which is characterized in that

The wafer substrate includes with 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³Doped in concentrations profiled below has nitrogen Monocrystalline silicon.

4. a kind of manufacturing method of epitaxial growth wafer, which is characterized in that have following process：

The pull rate carried out using Czochralski method is being set as V (mm/min), by the lifting shaft on crystalline growth interface To temperature gradient average value be set as G (DEG C/mm) in the case of, control V/G value and as the condition of COP rich ranges Lower growth single crystal rod, to obtain the entire section when being sliced, there is no the monocrystal silicons of large area dislocation defects Process；

The monocrystal silicon is sliced, in the process that its surface is mirror-finished and obtains wafer substrate；And

The film of silicon single crystal is set to grow the process to form epitaxial film on the surface of the wafer substrate,

Process by forming the epitaxial film, forms the detection of the LPD of 0.045 μm of grain size or more on the surface of the epitaxial film Density is per 100cm²Area 4.24 is hereinafter, and the detection density of the LPD of 0.032 μm of grain size or more is per 100cm²Area 11.3 epitaxial films below.

5. the manufacturing method of epitaxial growth wafer according to claim 4, which is characterized in that

In the process for obtaining the monocrystal silicon, by controlling the value of the V/G, to obtain before forming epitaxial film Surface is 20/cm there are the COP of 0.1 μm of size or more²Above wafer substrate.

6. the manufacturing method of epitaxial growth wafer according to claim 4 or 5, which is characterized in that

In the process for forming the epitaxial film, it is respectively configured in the surface opposed with the inner peripheral portion on the surface of the wafer substrate Side heater, the periphery side heater opposed with the peripheral part on the surface of the wafer substrate and the wafer substrate The opposed back side inner circumferential side heater of inner peripheral portion at the back side, outside the back side opposed with the peripheral part at the back side of the wafer substrate The output of surface inner circumferential side heater is set as being more than periphery side heater, by the back of the body by side heater The output of face inner circumferential side heater is set as being less than back side peripheral side heater, to by the inner circumferential side of the wafer substrate The epitaxial film is formed while being heated into higher than peripheral side temperature.

7. the manufacturing method of epitaxial growth wafer according to claim 4 or 5, which is characterized in that

In the process for forming the epitaxial film, under normal pressure by single crystal growth rate be set as 1 μm/min or more and 5 μm/min with Under.

8. the manufacturing method of epitaxial growth wafer according to claim 4 or 5, which is characterized in that also have following process：

In the process for obtaining the monocrystal silicon, with 1 × 10¹³atoms/cm³Above and 1 × 10¹⁶atoms/cm³It is below Pulling silicon single crystal while doped in concentrations profiled nitrogen,

After the process for obtaining the wafer substrate, the wafer substrate is cleaned with hydrofluoric acid aqueous solution, to which removal is because existing The bump caused by the COP on the surface of the wafer substrate,

The hydrofluoric acid concentration of the hydrofluoric acid aqueous solution is 0.5mass% or more and 50mass% or less.

9. the manufacturing method of epitaxial growth wafer according to claim 8, which is characterized in that

Have in the process for removing the bump and uses ozone before cleaning the wafer substrate with hydrofluoric acid aqueous solution The Ozone Water treatment process on the surface of wafer substrate described in water oxygen.