JP4508000B2 - Epitaxial film manufacturing method - Google Patents

Description

  The present invention relates to an epitaxial film manufacturing method, and more particularly to an epitaxial film manufacturing method capable of reducing COP traces generated in an epitaxial film due to COP defects in a wafer.

  An epitaxial wafer is obtained by epitaxially growing an epitaxial silicon film on a silicon wafer, and the dopant concentration in the epitaxial silicon film can be controlled relatively freely, and an epitaxial silicon film free from defects and dislocations can be obtained. There are advantages. Since the epitaxial silicon film is formed by a so-called vapor deposition method in which a gaseous raw material such as silane is reacted on a silicon wafer, in principle, COP defects are rarely generated. The COP (Crystal Originated Particle) defect is a defect composed of a minute cavity of about 0.1 to 0.3 μm existing in the silicon bulk.

On the other hand, a silicon wafer serving as a substrate for an epitaxial silicon film is generally formed by the CZ method, but this silicon wafer has COP defects. When COP defects are exposed on the wafer surface, they appear as pits. When an epitaxial silicon film is formed on a silicon wafer in which COP defects appear on the surface in this way, COP traces corresponding to the COP defects may be generated in the epitaxial silicon film. The COP trace is a minute dent generated on the surface of the epitaxial film corresponding to the COP defect. In particular, when a COP has a complete defect size of less than 4 μm, a COP trace tends to occur. Since the generated COP trace causes a defect in the device, it is desirable to prevent the generation of the COP trace as much as possible.
Patent Document 1 discloses a method for reducing COP defects in a wafer by setting a cutting angle of a single crystal silicon ingot within a specific range.
JP 2002-273647 A

However, even when the method described in Patent Document 1 is applied to the manufacture of an epitaxial wafer, the COP defects of the wafer cannot be completely removed, and it is impossible to eliminate the COP trace of the epitaxial silicon film. Met.
The present invention has been made in view of the above circumstances, and provides an epitaxial film manufacturing method capable of preventing the occurrence of COP traces.

In order to achieve the above object, the present invention employs the following configuration.
The method for producing an epitaxial film of the present invention supports a silicon wafer from the back side by a susceptor and disposes a front side heater group and a back side heater group on the front side and back side of the silicon wafer, respectively, and the front side heater group and the back side Each of the heater groups is divided into an inner peripheral portion facing the front and back surfaces of the silicon wafer and an outer peripheral portion disposed outside the inner peripheral portion, and the silicon wafer is heated while heating the silicon wafer with each heater. When the epitaxial film is formed on the surface of the heater, the output of the inner peripheral portion of the front heater group is made larger than the output of the outer peripheral portion, and the output of the inner peripheral portion of the back heater group is made smaller than the output of the outer peripheral portion. An epitaxial film is formed.
In the epitaxial film manufacturing method of the present invention, the ratio of the output of the back side heater group to the total output of the front side heater group and the back side heater group is in the range of 46% to 60%, and the overall output of the front side heater group is set. The ratio of the output of the inner peripheral portion of the front heater group to the range of 60% to 90% with respect to the total output of the rear heater group is 14% to 22%. It is preferable to be in the range.
In the epitaxial film manufacturing method of the present invention, it is preferable that the temperature of the central portion of the silicon wafer surface is set in a range of 1050 ° C. or higher and 1150 ° C. or lower when the epitaxial film is formed.
In the epitaxial film manufacturing method of the present invention, the silicon wafer is cut from the silicon single crystal ingot with an inclination angle with respect to the (1 0 0) plane of the silicon single crystal ingot. The inclination angle is an angle [theta] in the [0 1 1] direction or [0 -1 -1] direction and the [0 1 -1] direction or [0 -1 1] with respect to the (1 0 0) plane. The angle is φ in the direction, and the angle θ and the angle φ are in the range of 10 ′ <θ ≦ 2 °, 10 ′ <φ <30 ′, or 10 ′ <φ ≦ 2 °, 10 ′ <θ <30 ′, respectively. It is preferable that
In the present specification, the notation “−1” indicating the crystal orientation means “1” with a bar.

According to the above epitaxial film manufacturing method, the output of the inner peripheral portion of the front heater group is made larger than the output of the outer peripheral portion, and the output of the inner peripheral portion of the back heater group is made smaller than the output of the outer peripheral portion. Generation of COP traces in the epitaxial film can be suppressed. In particular, the occurrence of COP traces in the epitaxial film can be more effectively suppressed by setting the output of each heater within the above range. Furthermore, by setting the temperature of the central portion of the silicon wafer surface within the above range, the COP trace can be greatly reduced.
Further, according to the above epitaxial film manufacturing method, the COP defect of the wafer itself can be reduced by setting the tilt angle when cutting the silicon wafer in the above range, and the epitaxial film is epitaxially formed on such a wafer. By forming the film, the COP trace of the epitaxial film can be further reduced.

  As described above, according to the present invention, it is possible to provide an epitaxial film manufacturing method capable of preventing the occurrence of COP traces.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows an example of an epitaxial film manufacturing apparatus (hereinafter sometimes referred to as a manufacturing apparatus) that is preferably used in the epitaxial film manufacturing method of the present embodiment.
A manufacturing apparatus 1 shown in FIG. 1 is a single-wafer type epitaxial film manufacturing apparatus 1 that supports a back surface 2b of a silicon wafer 2 (hereinafter sometimes referred to as a wafer 2) substantially horizontally by a susceptor 3. The epitaxial film manufacturing apparatus 1 includes a film formation chamber 6 formed by an upper dome 4 and a lower dome 5, a disk-shaped susceptor 3 disposed inside the film formation chamber 6, and a film formation chamber 6. A front side heater group 7 disposed on the upper side, that is, on the front surface 2a side of the silicon wafer 2, and a back side heater group 8 disposed on the lower side of the film forming chamber 6, that is, on the back surface 2b side of the silicon wafer 2, are schematically shown. It is configured.

The disc-shaped susceptor 3 is rotatably supported by a rotating shaft 3a. A support arm 3b extending in the radial direction is attached to the rotating shaft 3a. A support pin 3c is attached to the tip of the support arm 3b, and the support pin 3c is joined to the outer edge 3d of the susceptor 3. A lift arm 3e is attached to the rotary shaft 3a. Lift arm 3e has a circular Kan shaped body portion 3f having a through hole 3f _1, and an arm portion 3g extending along from one end of the body portion 3f in the radial direction. Rotary shaft 3a to the through hole 3f ₁ of the main body 3f is inserted, lift arm 3e along the axial direction of the rotating shaft 3a is freely movable. On the other hand, movable pins 3 h for supporting the wafer 2 are attached to the susceptor 3. The support arm 3b is provided with a through hole 3i and the susceptor 3 is provided with a through hole 3j. A movable pin 3h passes through the through hole 3i and the through hole 3j. Further, the tip of the arm portion 3g of the lift arm 3e is disposed directly below the movable pin 3h, and the movable pin 3h is also moved up and down in conjunction with the lift arm 3e moving up and down.

  Next, the upper dome 4 and the lower dome 5 constituting the film forming chamber 6 are supported and fixed by a dome support member 9. The upper dome 4 and the lower dome 5 are made of a transparent member such as quartz, and the susceptor 3 and the wafer 2 are heated by the front side heater group 7 and the back side heater group 8 disposed outside the film forming chamber 6. ing. Further, the dome support member 9 is provided with a gas inlet 9 a and a gas outlet 9 b so that a reactive gas such as silane flows through the film forming chamber 6. A radiation thermometer (not shown) is installed outside the film forming chamber 6 so that the temperature at the center of the wafer surface 2a can be measured.

  Next, as shown in FIG. 1, the front heater group 7 is configured by regularly arranging a plurality of heaters 7a. The front heater group 7 is divided into an inner peripheral heater 7A (inner peripheral portion) facing the surface 2a of the silicon wafer 2 and an outer peripheral heater 7B (outer peripheral portion) located outside the inner peripheral heater 7A. Is done. Here, the inner peripheral heater 7 </ b> A refers to a heater in the front heater group 7 that is located immediately above the surface 2 a of the wafer 2. The number of inner peripheral heaters 7A is desirably 1 or more. The outer peripheral heater 7B refers to a plurality of heaters located outside the inner peripheral heater 7A, and these outer peripheral heaters 7B are preferably arranged so as to surround the inner peripheral heater 7A. The inner peripheral heater 7A mainly heats almost the entire surface of the wafer surface 2a, and the outer peripheral heater 7B heats the outer edge portion of the wafer surface 2a.

  Next, as shown in FIG. 1, the back heater group 8 is configured by regularly arranging a plurality of heaters 8 a like the front heater group 7. Further, the back heater group 8 includes an inner peripheral heater 8A (inner peripheral portion) positioned at a position facing the back surface 2b of the silicon wafer 2, and an outer peripheral heater 8B (outer peripheral portion) positioned outside the inner peripheral heater 8A. It is divided into and. The inner peripheral heater 8 </ b> A refers to a heater located immediately below the back surface 2 b of the wafer 2 in the back heater group 8. The number of inner peripheral heaters 8A is desirably 1 or more. The outer peripheral heater 8B refers to a plurality of heaters located outside the inner peripheral heater 8A, and these outer peripheral heaters 8B are preferably arranged so as to surround the inner peripheral heater 8A. The inner peripheral heater 8A mainly heats almost the entire surface of the wafer back surface 2b through the susceptor 3, and the outer peripheral heater 8B heats the outer edge portion of the wafer back surface 2b through the susceptor 3.

  As the heaters 7a and 8a constituting the front heater group 7 and the back heater group 8, for example, a lamp heater such as a halogen heater, an infrared heater, or the like can be used. Each heater may operate with a constant output or may have a variable output. Further, the output values of the heaters 7a and 8a may all be the same or different. The heaters 7a and 8a are connected to control means (not shown) so that the control means can turn on / off the heaters 7a and 8a or change the output of the heaters 7a and 8a.

Next, the manufacturing method of the epitaxial film of this embodiment is demonstrated.
First, the silicon wafer 2 used when producing an epitaxial film will be described. The silicon wafer 2 suitably used in the present embodiment is cut out with an inclination angle with respect to the (1 0 0) plane of the silicon single crystal ingot. The inclination angle is an angle θ in the [0 1 1] direction or [0 −1 -1] direction with respect to the (1 0 0) plane, and the [0 1 −1] direction or [0 −1 1] direction. And the angle θ and the angle φ are in the range of 10 ′ <θ ≦ 2 °, 10 ′ <φ <30 ′, or 10 ′ <φ ≦ 2 °, 10 ′ <θ <30 ′, respectively. Preferably there is.

The tilt angles θ and φ will be described in more detail. In the (1 0 0) plane of the wafer, the crystal directions [0 1 1], [0 −1 −1], [0 1 −1] pass through the wafer center. ], [0 -1 1], and the angle component between the (1 0 0) surface normal and the surface normal of the wafer surface 2a, the angle component in the [0 1 1] or [0 -1 -1] direction Is defined as an angle θ, and an angle component in the [0 1 -1] or [0 −1 1] direction is defined as an angle φ.
FIG. 2 is a graph showing the ranges of the tilt angles θ and φ defined in the present invention, and the horizontal axis indicates the tilt angle φ, that is, the angle component in the [0 1 1] direction or the [0 −1 -1] direction, The axis represents the inclination angle θ, that is, the angle component in the [0 1 -1] direction or the [0 -1 1] direction. In the silicon wafer of the present embodiment, the inclination angles θ and φ are set to 10 ′ <θ ≦ 2 °, 10 ′ <φ <30 ′, or 10 ′ <φ ≦ 2 °, 10 ′ <θ <30 ′. The numerical limit range of the angle corresponds to approximately four L-shaped frames in FIG.

  In the cross-shaped region on the outer side of the four L-shapes in FIG. 2 near the horizontal axis and the vertical axis, tear drops are reduced, but defects such as cracks, chips, cracks, chips, etc. are likely to occur. In addition, in the rectangular region surrounded by the L-shaped inner side, the microroughness is good, but the teardrop cannot be reduced. However, in the regions within the four L-shaped frames, there are few defects such as cracks, chips, cracks, chips, etc., and the microroughness is reduced together with tear drops, and an excellent epitaxial wafer can be obtained. .

  Therefore, when slicing a silicon single crystal ingot using a wire saw, for example, slicing the ingot without slightly shifting the wall opening direction of the silicon single crystal ingot to the wire feeding direction and the ingot feeding direction. Can prevent cracks, cracks, chips, damage and suppress the defect rate, reduce COP traces during epitaxial growth, and reduce the microroughness of the epitaxial growth surface, thereby obtaining a smooth surface 2a. become.

  Next, the wafer 2 cut out as described above is introduced into the epitaxial film manufacturing apparatus 1 shown in FIG. 1, and manufacturing of the epitaxial film is started. First, the silicon wafer 2 is placed on the susceptor 3 in a hydrogen atmosphere. Next, the inside of the film forming chamber 6 is heated to a predetermined etching temperature, and the surface 2a of the wafer 2 is hydrogen baked. Next, hydrogen chloride gas is supplied to etch the surface 2a of the wafer 2 to remove particles and the like. Next, the temperature in the film forming chamber 6 is set to a predetermined growth temperature, and a reactive gas such as silane is introduced to grow an epitaxial film. After the epitaxial growth, the temperature inside the film forming chamber 6 is lowered. Next, the processed wafer is taken out from the film formation chamber 6, hydrogen chloride gas is supplied into the film formation chamber 6, and silicon deposits attached to the inner wall surface of the film formation chamber 6 are removed by etching. When a series of processes are completed in this way, another wafer is placed in the film forming chamber 6 and the epitaxial growth process is continued.

  When growing the epitaxial film, the output of the inner peripheral heater 7A of the front heater group 7 is made larger than the output of the outer peripheral heater 7B, and the output of the inner peripheral heater 8A of the back heater group 8 is set to the outer peripheral heater 8B. It is preferable to make it smaller than the output. Specifically, the ratio of the output of the front side heater group 7 to the total output of the front side heater group 7 and the back side heater group 8 is in the range of 46% to 60%. The ratio of the output of the peripheral heater 7A is in the range of 60% to 90%, and the ratio of the output of the inner peripheral heater 8A of the back side heater group 8 to the total output of the back side heater group 8 is in the range of 14% to 22%. It is preferable. Moreover, it is preferable to set the outputs of the front side heater group 7 and the back side heater group 8 so that the temperature of the central portion of the silicon wafer surface 2a is in the range of 1050 ° C. or higher and 1150 ° C. or lower.

  More preferably, the ratio of the output of the back side heater group 8 to the total output of the front side heater group 7 and the back side heater group 8 is in the range of 56% to 60%, and the inner circumference of the front side heater group 7 with respect to the overall output of the front side heater group 7 The ratio of the output of the inner heater 7A is in the range of 66% to 74%, and the ratio of the output of the inner peripheral heater 8A of the rear heater group 8 to the entire output of the rear heater group 8 is in the range of 16% to 18%. Is preferred. Moreover, it is preferable to set the outputs of the front heater group 7 and the back heater group 8 so that the temperature of the central portion of the silicon wafer surface 2a is in the range of 1100 ° C. or higher and 1130 ° C. or lower.

  Further, as specific means for adjusting the output of the inner peripheral heater or the outer peripheral heater, for example, the control means (not shown) adjusts the output of the outer peripheral heater and the inner peripheral heater so as to have a target output ratio. May be. Alternatively, the adjustment may be performed by operating all the outer peripheral heaters while not operating a part of the inner peripheral heater. In addition, the design value of the output of each heater constituting the inner circumference heater is set to be smaller than the design value of the output of each heater constituting the outer circumference heater in advance, and all these heaters are operated. You may adjust it.

  By making the output of the inner peripheral heater 7A of the front heater group 7 larger than the output of the outer heater 7B, and making the output of the inner heater 8A of the back heater group 8 smaller than the output of the outer heater 8B, It is possible to suppress the occurrence of COP traces in the film. In particular, the occurrence of COP traces in the epitaxial film can be more effectively suppressed by setting the output of each heater within the above range. Furthermore, by setting the temperature of the central portion of the silicon wafer surface 2a within the above range, the COP trace can be greatly reduced.

  A 300 mm diameter single crystal silicon ingot formed by pulling up in the <1 0 0> direction by the CZ method was prepared, and this ingot was sliced using a wire saw device. In slicing, the silicon was cut with an inclination angle with respect to the (1 0 0) plane, and the inclination angle at that time was adjusted to θ = 0.21 ° and φ = 0.35 °. After slicing, lapping, etching, and polishing were performed to make the surface a mirror surface. Thus, a silicon wafer was manufactured.

  Next, the obtained silicon wafer was introduced into the epitaxial film manufacturing apparatus shown in FIG. 1 to manufacture the epitaxial film. First, a silicon wafer was placed on a susceptor in a hydrogen atmosphere, and the film formation chamber was heated to an etching temperature of 1110 to 1150 ° C. to hydrogen bak the surface of the wafer. Next, the front side heater group and the back side heater group were operated to heat the silicon wafer in the film forming chamber, and further, trichlorosilane was introduced to grow an epitaxial film. After the epitaxial growth, the temperature in the film formation chamber was lowered to room temperature, and the processed wafer was taken out from the film formation chamber.

  Regarding the output of the front side heater group and the back side heater group when growing the epitaxial film, the ratio of the output of the back side heater group to the total output of the front side heater group and the back side heater group is 58%, and the front side with respect to the overall output of the front side heater group The ratio of the output of the inner peripheral heater of the heater is 62%, the ratio of the output of the inner peripheral heater of the back heater group to the total output of the back heater group is 15%, and the temperature of the center portion of the silicon wafer surface is The temperature was set to 1110 ° C to 1150 ° C.

  About the obtained epitaxial film, the number of the COP traces which arose on the surface was measured with the particle counter (KLA-Tencor SP1). The results are shown in Table 1 and FIGS. 3 shows the distribution of COP traces of the wafer of sample 1 in Table 1, FIG. 4 shows the distribution of COP traces of sample 2, FIG. 5 shows the distribution of COP traces of sample 3, and FIG. Indicates the distribution of COP traces of Sample 4. In FIG. 3 to FIG. 6, the cross mark is the occurrence location of the COP trace.

  As shown in Table 1 and FIGS. 3 to 6, it can be seen that the lower the etching temperature and the growth temperature (the temperature at the center of the wafer), the fewer the COP traces. It can also be seen that COP traces are concentrated in the central portion of the wafer and that there are fewer COP traces in the outer peripheral portion.

Next, after fixing the etching temperature and the growth temperature at 1130 ° C., the output ratio was changed to grow an epitaxial film, and the number and distribution of COP traces were examined.
Specifically, the same silicon wafer as described above was prepared and introduced into the epitaxial film manufacturing apparatus shown in FIG. 1 to manufacture an epitaxial film. That is, a silicon wafer was placed on a susceptor in a hydrogen atmosphere, and the surface of the wafer was hydrogen baked by heating the film formation chamber to an etching temperature of 1130 ° C. Next, the front side heater group and the back side heater group were operated to heat the silicon wafer in the film forming chamber, and further, trichlorosilane was introduced to grow an epitaxial film. After the epitaxial growth, the temperature in the film formation chamber was lowered to room temperature, and the processed wafer was taken out from the film formation chamber.

  Regarding the output of the front side heater group and the back side heater group when growing the epitaxial film, the ratio of the output of the back side heater group to the total output of the front side heater group and the back side heater group is 58 to 62%, and the total output of the front side heater group The ratio of the output of the inner peripheral heater of the front heater group to 62 to 74% relative to the total output of the rear heater group to the ratio of the output of the inner peripheral heater of the rear heater group to the range of 15 to 18%, and a silicon wafer The temperature of the central part of the surface was set to 1130 ° C.

  The number of COP traces generated on the surface of the obtained epitaxial film was measured in the same manner as in Table 1. The results are shown in Table 2 and FIGS. 7 to 12 show COP trace distributions of the wafers of Sample 5 to Sample 10 in Table 2, respectively. In FIG. 7 to FIG. 12, the crosses are the locations where COP traces are generated.

As shown in Table 2 and Samples 5 to 8 in FIGS. 7 to 10, when the outputs of the inner peripheral heaters of the front and back heater groups are gradually increased while the output of the back heater group is fixed, the COP trace It can be seen that is gradually decreasing. From the distribution shown in FIGS. 7 to 10, it appears that the COP trace on the outer peripheral side of the wafer is reduced. Thus, it can be seen that the COP trace can be reduced by setting the outputs of the inner peripheral heaters of the front and back heater groups to the ranges of 60 to 90% and 14 to 22%.
Next, as shown in Table 2 and Samples 9 to 10 in FIGS. 11 and 12, when the output of the entire rear side heater group is increased with the outputs of the inner peripheral portions of the front side and the rear side heater group being fixed, the COP trace It can be seen that is slightly decreased. Thus, it can be seen that the COP trace can be reduced by setting the output ratio of the back side heater group in the front side and back side heater groups in the range of 46 to 60%.

Next, the etching temperature and the growth temperature are fixed at 1130 ° C. and the output ratio is fixed. Then, the epitaxial film is grown by changing the cutting inclination angles θ and φ of the silicon wafer, and the number and distribution of COP traces are determined. Examined.
Specifically, a silicon wafer having different inclination angles θ and φ was prepared, and this was introduced into the epitaxial film manufacturing apparatus shown in FIG. 1 to manufacture an epitaxial film. That is, a silicon wafer was placed on a susceptor in a hydrogen atmosphere, and the surface of the wafer was hydrogen baked by heating the film formation chamber to an etching temperature of 1130 ° C. Next, the front side heater group and the back side heater group were operated to heat the silicon wafer in the film forming chamber, and further, trichlorosilane was introduced to grow an epitaxial film. After the epitaxial growth, the temperature in the film formation chamber was lowered to room temperature, and the processed wafer was taken out from the film formation chamber.

  Regarding the output of the front side heater group and the back side heater group when growing the epitaxial film, the ratio of the output of the back side heater group to the total output of the front side heater group and the back side heater group is 58%, and the front side with respect to the overall output of the front side heater group The ratio of the output of the inner peripheral heater of the heater group is 62%, the ratio of the output of the inner peripheral heater of the rear heater group to the total output of the rear heater group is 15%, and the temperature of the central portion of the silicon wafer surface Was set to 1130 ° C.

  The number of COP traces generated on the surface of the obtained epitaxial film was measured in the same manner as in Table 1. The results are shown in Table 3.

  As shown in Table 3, the angle θ and the angle φ are in the range of 10 ′ <θ ≦ 2 °, 10 ′ <φ <30 ′, or 10 ′ <φ ≦ 2 °, 10 ′ <θ <30 ′, respectively. It can be seen that in some cases, the COP trace is reduced.

FIG. 1 is a cross-sectional view showing an example of an epitaxial film manufacturing apparatus suitably used in an epitaxial film manufacturing method according to an embodiment of the present invention. FIG. 2 is a graph showing ranges of the inclination angle θ and the inclination angle φ. 3 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 1. FIG. FIG. 4 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 2. FIG. 5 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 3. 6 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 4. FIG. FIG. 7 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 5. FIG. 8 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 6. 9 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 7. FIG. FIG. 10 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 8. 11 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 9. FIG. 12 is a distribution diagram showing the distribution of COP traces in the epitaxial film of Test Example 10. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Epitaxial film manufacturing apparatus, 2 ... Silicon wafer, 2a ... Front surface, 2b ... Back surface, 3 ... Susceptor, 4 ... Upper dome, 5 ... Lower dome, 6 ... Deposition chamber, 7 ... Front side heater group, 7A ... Inside Peripheral heater (inner periphery), 7B ... outer periphery heater (outer periphery), 8 ... back side heater group, 8A ... inner periphery heater (inner periphery), 8B ... outer periphery heater (outer periphery)

Claims (4)

A silicon wafer is supported by a susceptor from the back side, and a front side heater group and a back side heater group are arranged on the front side and back side of the silicon wafer, respectively, and the front side heater group and the back side heater group are respectively placed on the surface of the silicon wafer. When the epitaxial film is formed on the surface of the silicon wafer while the silicon wafer is heated with each heater, the inner peripheral part facing the back surface and the outer peripheral part arranged outside the inner peripheral part are divided. ,
An epitaxial film characterized in that an output of an inner part of the front heater group is made larger than an output of an outer part, and an output of an inner part of the back heater group is made smaller than an output of an outer part to generate an epitaxial film. Manufacturing method. The ratio of the output of the back heater group to the total output of the front heater group and the back heater group is in the range of 46% to 60%,
The ratio of the output of the inner periphery of the front heater group to the total output of the front heater group is in the range of 60% to 90%,
2. The method of manufacturing an epitaxial film according to claim 1, wherein a ratio of an output of an inner peripheral portion of the back heater group to a total output of the back heater group is in a range of 14% to 22%.   3. The method of manufacturing an epitaxial film according to claim 1, wherein when the epitaxial film is formed, a temperature of a central portion of the surface of the silicon wafer is set in a range of 1050 ° C. or more and 1150 ° C. or less. . The silicon wafer is cut from a silicon single crystal ingot with an inclination angle with respect to the (1 0 0) plane of the silicon single crystal ingot, and the inclination angle is the (1 0 0) The angle θ in the [0 1 1] direction or the [0 −1 -1] direction and the angle φ in the [0 1 -1] direction or the [0 −1 1] direction with respect to the surface, the angle θ and the angle The ranges of φ are 10 ′ <θ ≦ 2 °, 10 ′ <φ <30 ′, or 10 ′ <φ ≦ 2 °, 10 ′ <θ <30 ′, respectively. Item 4. The method for producing an epitaxial film according to any one of Items 3 to 4.

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