CN108490666A - 显示装置及其阵列基板 - Google Patents

显示装置及其阵列基板 Download PDF

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CN108490666A
CN108490666A CN201810275956.0A CN201810275956A CN108490666A CN 108490666 A CN108490666 A CN 108490666A CN 201810275956 A CN201810275956 A CN 201810275956A CN 108490666 A CN108490666 A CN 108490666A
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touching signals
array substrate
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light shield
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CN108490666B (zh
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韩约白
张嘉伟
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to PCT/CN2018/087787 priority patent/WO2019184070A1/zh
Priority to US16/071,525 priority patent/US11099440B2/en
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Abstract

本发明提供一种显示装置及其阵列基板，阵列基板包括呈阵列设置的多个像素单元，每一个像素单元包括遮光层、薄膜晶体管、触控电极、扫描线及数据线，扫描线沿第一方向设置，数据线沿第二方向设置，扫描线与数据线交叉，像素单元还包括触控信号线，触控信号线与扫描线位于同一层，在第一方向上的相邻两个触控信号线之间通过遮光层连接，触控信号线通过第一过孔与遮光层连接，触控信号线通过第二过孔与所述触控电极连接。本发明将遮光层作为相邻两个触控信号线之间的桥接线，通过触控信号线来传递触控信号，避免将触控信号的传输线直接设置在数据线所在的金属层上，造成数据线所在的金属层的密度过大而限制像素的大小，从而提升了开口率、降低功耗。

Description

显示装置及其阵列基板
技术领域
本发明涉及显示装置技术领域，尤其涉及一种显示装置及其阵列基板。
背景技术
低温多晶硅面板借着其高分辨率、高迁移率、低功耗等诸多优点已成为了目前平板显示产品中的明星产品，被广泛应用在例如苹果、三星、华为、小米、魅族等各大手机及平板电脑上，由于低温多晶硅器件阵列工艺制程复杂，需要多次光罩(Mask)，因此，在低温多晶硅制程中如果能够降低光罩使用次数将会有效的降低生产成本。在目前生产的In-CellTouch Panel工艺过程中，一般需要13次Mask，而为了节约成本，目前行业内通常使用M2传递触控信号，可实现9次Mask，但由于M2密度过大，将会造成开口率降低等问题。
发明内容
为了解决上述问题，本发明提供一种显示装置及其阵列基板，能够提升整个显示装置的开口率、降低功耗。
本发明提出的具体技术方案为：提供一种阵列基板，所述阵列基板包括呈阵列设置的多个像素单元，每一个所述像素单元包括遮光层、薄膜晶体管、触控电极、扫描线及数据线，所述扫描线沿第一方向设置，所述数据线沿第二方向设置，所述扫描线与所述数据线交叉，所述像素单元还包括触控信号线，所述触控信号线与所述扫描线位于同一层，在第一方向上的相邻两个所述触控信号线之间通过所述遮光层连接，所述触控信号线通过第一过孔与所述遮光层连接，所述触控信号线通过第二过孔与所述触控电极连接。
进一步地，所述数据线覆盖所述触控信号线位于第一方向上的部分。
进一步地，所述触控信号线包括沿第一方向延伸的垂直部以及由所述垂直部的两端朝向第二方向弯折延伸出的水平部，所述数据线覆盖所述垂直部，所述水平部通过第一过孔与所述遮光层连接，所述水平部通过第二过孔与所述触控电极连接。
进一步地，所述水平部与所述扫描线平行。
进一步地，所述垂直部与所述扫描线垂直。
进一步地，所述触控信号线位于相邻两条扫描线之间。
进一步地，所述遮光层包括遮光部和桥接部，所述遮光部与所述薄膜晶体管对应，所述桥接部与所述水平部对应，所述桥接部通过第一过孔与所述水平部连接。
进一步地，所述薄膜晶体管为顶栅型。
进一步地，所述像素单元包括衬底、遮光层、缓冲层、多晶硅层、第一层间介质层、栅绝缘层、第一金属层、第二层间介质层、第二金属层、第三层间介质层及触控电极，所述第一金属层用于形成所述扫描线和所述触控信号线，所述第二金属层用于形成所述数据线。
本发明还提供了一种显示装置，所述显示装置包括如上任一所述的阵列基板。
本发明提出的阵列基板的像素单元包括还包括触控信号线，所述触控信号线与所述扫描线位于同一层，在第一方向上的相邻两个所述触控信号线之间通过所述遮光层连接，所述触控信号线通过第一过孔与所述遮光层连接，所述触控信号线通过第二过孔与所述触控电极连接，将遮光层作为相邻两个触控信号线之间的桥接线，通过触控信号线来传递触控信号，避免将触控信号的传输线直接设置在数据线所在的金属层上，造成数据线所在的金属层的密度过大而限制像素的大小，从而提升了开口率、降低功耗。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
图1为阵列基板的结构示意图；
图2为图1中不包括第二金属层的阵列基板的结构示意图；
图3为图2中不包括第一金属层的阵列基板的结构示意图；
图4为图1中的A处在第一方向上的截面图；
图5为显示装置的结构示意图。
具体实施方式
以下，将参照附图来详细描述本发明的实施例。然而，可以以许多不同的形式来实施本发明，并且本发明不应该被解释为限制于这里阐述的具体实施例。相反，提供这些实施例是为了解释本发明的原理及其实际应用，从而使本领域的其他技术人员能够理解本发明的各种实施例和适合于特定预期应用的各种修改。在附图中，相同的标号将始终被用于表示相同的元件。
参照图1～4，本实施例的图1为省略了不导电膜层和触控电极的阵列基板的结构示意图，图2为图1中不包括第二金属层的阵列基板的结构示意图，图3为图2中不包括第一金属层的阵列基板的结构示意图，图4为图1中的A处在第一方向上的截面图。下面参照图1-3对本实施例的阵列基板的结构进行详细的描述。
本实施例提供的阵列基板1包括呈阵列设置的多个像素单元10，每一个像素单元10包括遮光层11、薄膜晶体管12、触控电极13、扫描线14及数据线15，扫描线14沿第一方向设置，数据线15沿第二方向设置，扫描线14与数据线15交叉。像素单元10还包括触控信号线16，触控信号线16与扫描线14位于同一层，在第一方向上的相邻两个触控信号线16之间通过遮光层11连接，触控信号线16通过第一过孔20与遮光层11连接，触控信号线16通过第二过孔21与触控电极13连接。
像素单元10还包括像素电极(图未示)，像素电极在触控电极13的上层金属层中形成。像素电极通过薄膜晶体管12与扫描线14、数据线15连接。
本实施例中的第一方向为图1中的x轴方向，第二方向为图1中的y轴方向，第一方向与第二方向垂直，沿第一方向排列的多个扫描线14与沿第二方向排列的多个数据线15交叉并呈网格状形成阵列排布的多个像素单元10，每一个网格所在区域形成一个像素单元10。阵列基板1包括显示区域和非显示区域，其中，薄膜晶体管12所在的区域为阵列基板1的非显示区域。本实施例中的像素电极和触控电极13都为透明电极。
触控电极13用于接收触控信号并通过第二过孔21将触控信号传递给触控信号线16，触控信号线16再通过第一过孔20将触控信号传递给遮光层11，遮光层11再通过第一过孔20将触控信号传递至在第一方向上与该触控信号线16相邻的另一触控信号线16，遮光层11作为相邻两个触控信号线16之间的桥接线，通过触控信号线16来传递触控信号，避免将触控信号的传输线直接设置在数据线15所在的金属层上，造成数据线15所在的金属层的密度过大而限制像素的大小，从而提升了开口率、降低功耗。
较佳地，数据线15覆盖触控信号线16位于第一方向上的部分，即数据线15在触控信号线16所在的平面内的投影与触控信号线16位于x轴上的部分重合。这样，触控信号线16不会影响阵列基板1的像素的大小，从而进一步地提升了开口率、降低功耗。
具体地，触控信号线16包括沿第一方向延伸的垂直部16a以及由垂直部16a的两端朝向第二方向弯折延伸出的水平部16b，数据线15覆盖垂直部16a，即数据线15在触控信号线16所在的平面内的投影与垂直部16a重合。水平部16b通过第一过孔20与遮光层11连接，水平部16b通过第二过孔21与触控电极13连接。遮光层11通过第一过孔20分别与在第一方向上的相邻两个触控信号线16连接，从而实现将第一方向上的触控信号线16进行桥接。
遮光层11包括遮光部11a和桥接部11b，遮光部11a与薄膜晶体管12对应，桥接部11b与水平部16b对应，桥接部11b通过第一过孔20与水平部16b连接。
水平部16b与扫描线14平行，垂直部16b与扫描线14垂直，即水平部16b与垂直部16a垂直。触控信号线16位于相邻两条扫描线14之间。
本实施例中的薄膜晶体管12为顶栅型，具体地，像素单元10包括衬底22、遮光层11、缓冲层23、多晶硅层24、第一层间介质层25、栅绝缘层26、第一金属层27、第二层间介质层、第二金属层、第三层间介质层28、触控电极13、第四层间介质层及像素电极。
遮光层11设置于衬底22上，缓冲层23设置于衬底22上并覆盖遮光层11。多晶硅层24设置于缓冲层23上，第一层间介质层25设置于缓冲层23上并覆盖多晶硅层24。栅绝缘层26设置于第一层间介质层25上，第一金属层27设置于栅绝缘层26上，其用于形成触控信号线16和扫描线14，扫描线14作为薄膜晶体管12的栅极，第二层间介质层覆盖第一金属层27，第二金属层设置于第二层间介质层上，第二金属层用于形成数据线15。第三层间介质层28覆盖于第二金属层上，触控电极13设置于第三层间介质层28上，第四层间介质层覆盖触控电极13，像素电极设置于第四层间介质层上。薄膜晶体管12的源极与数据线连接，薄膜晶体管12的漏极与像素电极连接。
本实施例还提供了一种显示装置，该显示装置可以是LCD，也可以是OLED。这里不做限定。
参照图5，以显示装置为LCD为例，显示装置包括阵列基板1、CF基板2及液晶层3，阵列基板1与CF基板2对盒设置，液晶层3夹设于阵列基板1与CF基板2之间，显示装置通过采用上述阵列基板1可以提升整个显示装置的开口率、降低显示装置的功耗。
以上所述仅是本申请的具体实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (10)

1.一种阵列基板，其特征在于，包括呈阵列设置的多个像素单元，每一个所述像素单元包括遮光层、薄膜晶体管、触控电极、扫描线及数据线，所述扫描线沿第一方向设置，所述数据线沿第二方向设置，所述扫描线与所述数据线交叉，所述像素单元还包括触控信号线，所述触控信号线与所述扫描线位于同一层，在第一方向上的相邻两个所述触控信号线之间通过所述遮光层连接，触控信号线通过第一过孔与遮光层连接，所述触控信号线通过第二过孔与所述触控电极连接。
2.根据权利要求1所述的阵列基板，其特征在于，所述数据线覆盖所述触控信号线位于第一方向上的部分。
3.根据权利要求2所述的阵列基板，其特征在于，所述触控信号线包括沿第一方向延伸的垂直部以及由所述垂直部的两端朝向第二方向弯折延伸出的水平部，所述数据线覆盖所述垂直部，所述水平部通过第一过孔与所述遮光层连接，所述水平部通过第二过孔与所述触控电极连接。
4.根据权利要求3所述的阵列基板，其特征在于，所述水平部与所述扫描线平行。
5.根据权利要求1所述的阵列基板，其特征在于，所述垂直部与所述扫描线垂直。
6.根据权利要求1所述的阵列基板，其特征在于，所述触控信号线位于相邻两条扫描线之间。
7.根据权利要求3所述的阵列基板，其特征在于，所述遮光层包括遮光部和桥接部，所述遮光部与所述薄膜晶体管对应，所述桥接部与所述水平部对应，所述桥接部通过第一过孔与所述水平部连接。
8.根据权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管为顶栅型。
9.根据权利要求7所述的阵列基板，其特征在于，所述像素单元包括衬底、遮光层、缓冲层、多晶硅层、第一层间介质层、栅绝缘层、第一金属层、第二层间介质层、第二金属层、第三层间介质层及触控电极，所述第一金属层用于形成所述扫描线和所述触控信号线，所述第二金属层用于形成所述数据线。
10.一种显示装置，其特征在于，包括如权利要求1-9任一所述的阵列基板。
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