CN108461382A - 一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法 - Google Patents

一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法 Download PDF

Info

Publication number
CN108461382A
CN108461382A CN201810114586.2A CN201810114586A CN108461382A CN 108461382 A CN108461382 A CN 108461382A CN 201810114586 A CN201810114586 A CN 201810114586A CN 108461382 A CN108461382 A CN 108461382A
Authority
CN
China
Prior art keywords
bismuth selenide
doping
nano material
preparation
realizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201810114586.2A
Other languages
English (en)
Other versions
CN108461382B (zh
Inventor
张汝康
闫慧
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin University of Technology
Original Assignee
Tianjin University of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin University of Technology filed Critical Tianjin University of Technology
Priority to CN201810114586.2A priority Critical patent/CN108461382B/zh
Publication of CN108461382A publication Critical patent/CN108461382A/zh
Application granted granted Critical
Publication of CN108461382B publication Critical patent/CN108461382B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02491Conductive materials
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • CCHEMISTRY; METALLURGY
    • C01INORGANIC CHEMISTRY
    • C01BNON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B19/00Selenium; Tellurium; Compounds thereof
    • C01B19/007Tellurides or selenides of metals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02568Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02584Delta-doping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • CCHEMISTRY; METALLURGY
    • C01INORGANIC CHEMISTRY
    • C01PINDEXING SCHEME RELATING TO STRUCTURAL AND PHYSICAL ASPECTS OF SOLID INORGANIC COMPOUNDS
    • C01P2004/00Particle morphology
    • C01P2004/10Particle morphology extending in one dimension, e.g. needle-like
    • C01P2004/16Nanowires or nanorods, i.e. solid nanofibres with two nearly equal dimensions between 1-100 nanometer
    • CCHEMISTRY; METALLURGY
    • C01INORGANIC CHEMISTRY
    • C01PINDEXING SCHEME RELATING TO STRUCTURAL AND PHYSICAL ASPECTS OF SOLID INORGANIC COMPOUNDS
    • C01P2004/00Particle morphology
    • C01P2004/10Particle morphology extending in one dimension, e.g. needle-like
    • C01P2004/17Nanostrips, nanoribbons or nanobelts, i.e. solid nanofibres with two significantly differing dimensions between 1-100 nanometer

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Organic Chemistry (AREA)
  • Nanotechnology (AREA)
  • Inorganic Chemistry (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

本发明公开了一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,所述纳米材料为纳米线和纳米带。本发明采用气相沉积法,以硒化铋为原料在管式炉中进行高温蒸发,并经惰性载气传输,在Au/Cu薄膜作催化剂的条件下制备出Cu掺杂硒化铋纳米材料。本发明制备的Cu掺杂硒化铋纳米材料具有很好的结晶性,纳米线和纳米带的长度在百微米级别,并通过X射线衍射分析(XRD)、X射线能量色散谱(EDS)和X射线激发俄歇电子能谱(XAES)证明了Cu的引入,以及掺入Cu的价态。

Description

一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法
技术领域
本发明涉及硒化铋纳米材料Cu掺杂的制备方法,属于半导体材料与微电子器件领域。
背景技术
硒化铋是一种窄带隙半导体半导体材料,早先由于其良好热电性质和红外探测效应而受到广泛关注。近年来,理论计算和实验工作证明硒化铋是一类强三维拓扑绝缘体,即体内是有能隙的绝缘态,表面则是导电的金属态,而且电子在表面传输时是一种自旋有序运动,避免了能量损耗,在低能耗和自旋电子器件的应用上有着重要的科研价值。在对硒化铋纳米材料的研究中,研究人员发现将适量的Cu插入硒化铋晶格中,可以得到一种表面金属、内部超导的拓扑超导体(Phys.Rev.Lett.,2010,104(5):057001,Phys.Rev.Lett.,2011,106(21):216803),Cu的引入给硒化铋带来了更加奇异的性质,引起了科研工作者的极大兴趣。在硒化铋实现Cu掺杂的制备方法中,具体有电化学法,热壁外延法,分子束外延法,但大都存在工艺复杂、产物结晶性差、纯度低的问题,对拓扑超导体的研究带来了不便,完善和优化Cu掺杂硒化铋纳米材料的制备方法有着重要意义。
发明内容
本发明的目的在于克服现有技术存在的上述不足,提供一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,此方法简单可靠、重复性良好、制备的Cu掺杂硒化铋纳米材料具有良好的结晶性。
本发明的技术解决方案是:
实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,包括以下步骤:
(1)使用磁控溅射仪在清洗后的SiO2/Si衬底(长度和宽度均为10mm)上镀上一层Cu膜,随后在Cu膜上再镀上一层Au膜(Cu膜和Au膜的厚度均为10nm),作为Au/Cu催化剂,其中Cu膜作为掺杂Cu的引入源,Au膜作为保护层防止Cu被氧化;
(2)将清洗好的石英管(内径为50mm,长度为1.5m)水平放置在管式炉内,在加热中心处放入硒化铋粉末(质量为0.02~0.03g,重量比浓度为99.999%,Alfa Asear),在载气下游方向距硒化铋粉末8~14cm处放置步骤(1)得到的SiO2/Si衬底,对石英管密封,密封方式为法兰密封,并用机械泵抽真空,石英管内压强≤130Pa;
(3)对步骤(2)中的管式炉进行加热,并通入载气(Ar),流量50sccm,设定加热温度为550~700℃,优选为650℃,升温速率10℃/min,保温2h后,自然冷却至室温;
(4)打开步骤(3)石英管的密封装置,得到长有Cu掺杂硒化铋纳米材料的衬底。
本发明的优点和有益效果:
本发明采用气相沉积法,在使用Cu/Au薄膜做催化剂的条件下,制备得到Cu掺硒化铋纳米材料(纳米线和纳米带)。本发明制备Cu掺硒化铋纳米材料的方法,具有步骤简单、成本低、可控行好的优点,制备得到的Cu掺硒化铋纳米线长度在百微米级别,且具有很高的结晶性,有望在拓扑超导领域获得重要的应用。
附图说明
图1为本发明实施例1制备的Cu掺杂硒化铋纳米材料与纯硒化铋纳米材料的XRD对比图。
图2为本发明实施例1制备的Cu掺杂硒化铋纳米材料与纯硒化铋纳米材料的XRD的(006)衍射峰的对比图。
图3为本发明实施例1制备的Cu掺杂硒化铋纳米材料的扫描电子显微镜图像(SEM),(a)图标尺10μm,(b)图标尺20μm。
图4为本发明实施例1制备的Cu掺杂硒化铋纳米材料的EDS图谱与相对应的SEM图像,(a)图是纳米带,(b)图是纳米带和纳米线。
图5为本发明实施例1制备的Cu掺杂硒化铋纳米材料的XAES拟合图。
图6为本发明实施例2制备的Cu掺杂硒化铋纳米材料的SEM图像。
具体实施方式
为了进一步理解本发明,下面结合实施例对本发明优选实施方案进行描述,但是应当理解,这些描述只是为进一步说明本发明的特点和优点,而不是对本发明权利要求的限制。
实施例1
根据本发明提供的方法制备Cu掺杂硒化铋纳米材料,步骤如下:
(1)清洗好SiO2/Si衬底,并使用磁控溅射仪在SiO2/Si衬底上镀上一层Cu膜,随后在Cu膜上镀上一层Au膜,Cu膜和Au膜的厚度均为10nm,作为Au/Cu催化剂;
(2)将清洗好的石英管(内径为50mm,长度为1.5m)水平放置在管式炉内,在加热中心处放入质量为0.02~0.03g、重量比浓度为99.999%的硒化铋粉末(AlfaAsear),在载气下游方向距硒化铋粉末8~14cm处放置步骤(1)得到的SiO2/Si衬底,对石英管密封,密封方式为法兰密封,并用机械泵抽真空,压强≤130Pa;
(3)对步骤(2)中的管式炉进行加热,并通入载气(Ar),流量50sccm,设定加热温度为650℃,升温速率10℃/min,保温2h后,待其自然冷却至室温;
(4)打开步骤(3)石英管的密封装置,即可得到长有Cu掺杂硒化铋纳米材料的衬底。
本发明实施例1所得样品的XRD衍射峰(如图1所示)与硒化铋标准衍射峰相符合,说明制备产物为硒化铋相,X射线衍射峰形状锐利,表明产物具有很好的结晶性。另外在与纯硒化铋纳米材料的XRD比较中,发现Cu掺硒化铋的(006)衍射峰较纯硒化铋向高角度移动(如图2所示),根据布拉格方程2dsinθ=nλ,衍射角增大即晶格间距d减小,Cu的原子半径要小于Bi的原子半径初步表明Cu原子替代了Bi原子,导致晶格间距d减小。
本发明实施例1所得样品的SEM图像(如图3所示),可以看出所得产物的形貌为纳米线,数量较多,长度可达百微米级别。
本发明实施例1所得样品的EDS图谱和相对应的取点区域的SEM图像(如图4所示),其中,图4(a)的EDS测试取点的Cu掺硒化铋纳米带宽度较窄,且周围是衬底,在EDS测试结果中发现有Au的出现,表明测试受到衬底上Cu的影响。为了避免衬底上Cu的影响,选择在较大面积的纳米带上进行测试(如图4(b)所示),测试结果显示没有Au的出现,说明测试没有受到衬底的影响,EDS测试结果中的Cu来源于纳米材料,表明本发明方法确实在硒化铋纳米材料中引入了Cu。
本发明实施例1所得样品的X射线激发俄歇电子能谱(如图5所示),在测试之前将实例1所得样品进行超声震荡30min,静置取上层清液中的纳米线和纳米带进行测试,以避免衬底上Cu的影响,经拟合分析得到硒化铋纳米材料中掺入Cu的价态为0价和+1价。
实施例2
根据本发明提供的方法制备Cu掺杂硒化铋纳米材料,步骤如下:
(1)清洗好SiO2/Si衬底,并使用磁控溅射仪在SiO2/Si衬底上镀上一层Cu膜,随后在Cu膜上镀上一层Au膜,Cu膜和Au膜的厚度均为10nm,作为Au/Cu催化剂;
(2)将清洗好的石英管(内径为50mm,长度为1.5m)水平放置在管式炉内,在加热中心处放入质量为0.02~0.03g、重量比浓度为99.999%的硒化铋粉末(AlfaAsear),在载气下游方向距硒化铋粉末8~14cm处放置步骤(1)得到的SiO2/Si衬底,对石英管密封,密封方式为法兰密封,并用机械泵抽真空,压强≤130Pa;
(3)对步骤(2)中的管式炉进行加热,并通入载气(Ar),流量50sccm,设定加热温度为550℃,升温速率10℃/min,保温2h后,待其自然冷却至室温;
(4)打开步骤(3)石英管的密封装置,即可得到长有Cu掺杂硒化铋纳米材料的衬底。
本发明实施例2所得样品的SEM图像(如图6所示),可以看出在550℃加热温度下,Cu掺杂硒化铋纳米线和纳米带在密度上较实施例1样品要低,纳米线长度30~50μm。
实施例3
本实施例与实施例1不同的是,步骤(3)中的加热温度设定为600℃,其他与实施例1相同。
实施例4
本实施例与实施例1不同的是,步骤(3)中的加热温度设定为700℃,其他与实施例1相同。

Claims (6)

1.一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,其特征在于,采用气相沉积法,通过加热硒化铋粉末,经惰性气体进行气相输运,在使用Au/Cu薄膜做催化剂的条件下,在SiO2/Si衬底上制备得到Cu掺杂硒化铋纳米材料;包括以下步骤:
(1)使用磁控溅射仪在SiO2/Si衬底上镀上一层Cu膜,随后在Cu膜上再镀上一层Au膜;
(2)将清洗后的石英管水平放置在管式炉内,在加热中心处放入硒化铋粉末,在载气下游方向距硒化铋粉末8~14cm距离处放置步骤(1)得到的SiO2/Si衬底,密封石英管,并用机械泵抽真空;
(3)对步骤(2)中的管式炉进行加热,并通入惰性载气,在设定温度下保温后,自然冷却;
(4)打开步骤(3)中的石英管密封装置,得到长有Cu掺杂硒化铋纳米材料的衬底。
2.根据权利要求1所述的实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,其特征在于,步骤(1)中所述的SiO2/Si衬底的长度和宽度为10mm,Cu膜和Au膜的厚度为10nm;步骤(2)中硒化铋粉末的质量为0.02~0.03g,石英管内径为50mm,长度为1.5m。
3.根据权利要求1所述的实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,其特征在于,步骤(2)所述的石英管密封方式为法兰密封,石英管内压强≤130Pa。
4.根据权利要求1所述的实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,其特征在于,步骤(3)所述的载气为Ar气,流量50sccm。
5.根据权利要求1所述的实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法,其特征在于,步骤(3)中设定加热温度为550~700℃,升温速率10℃/min,保温时长2h,自然冷却至室温。
6.根据权利要求5所述的实现拓扑绝缘体Cu掺杂硒化铋纳米材料的制备方法,其特征在于,步骤(3)中设定加热温度优选为650℃。
CN201810114586.2A 2018-02-06 2018-02-06 一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法 Expired - Fee Related CN108461382B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810114586.2A CN108461382B (zh) 2018-02-06 2018-02-06 一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810114586.2A CN108461382B (zh) 2018-02-06 2018-02-06 一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法

Publications (2)

Publication Number Publication Date
CN108461382A true CN108461382A (zh) 2018-08-28
CN108461382B CN108461382B (zh) 2020-06-19

Family

ID=63239444

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810114586.2A Expired - Fee Related CN108461382B (zh) 2018-02-06 2018-02-06 一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法

Country Status (1)

Country Link
CN (1) CN108461382B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115341272A (zh) * 2022-08-02 2022-11-15 中山大学 一种毫米级二维拓扑材料硒化铋单晶的制备方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102020253A (zh) * 2010-11-09 2011-04-20 北京大学 一种拓扑绝缘体材料及其制备方法
CN102063950A (zh) * 2010-11-09 2011-05-18 北京大学 一种拓扑绝缘体材料及其制备方法
CN103046110A (zh) * 2011-10-13 2013-04-17 国家纳米科学中心 一种制备单晶Bi2Se3纳米结构的方法
US20130299780A1 (en) * 2012-05-14 2013-11-14 The Johns Hopkins University Simplified devices utilizing novel pn-semiconductor structures
CN103400760A (zh) * 2013-08-05 2013-11-20 电子科技大学 一种在硅衬底上生长硒化铋单晶薄膜的方法及装置
CN103526297A (zh) * 2013-10-17 2014-01-22 西南交通大学 一种制备拓扑绝缘体Bi2Se3薄膜的方法
CN107287577A (zh) * 2016-04-11 2017-10-24 新疆大学 一种制备一维硒化铋纳米线的方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102020253A (zh) * 2010-11-09 2011-04-20 北京大学 一种拓扑绝缘体材料及其制备方法
CN102063950A (zh) * 2010-11-09 2011-05-18 北京大学 一种拓扑绝缘体材料及其制备方法
CN103046110A (zh) * 2011-10-13 2013-04-17 国家纳米科学中心 一种制备单晶Bi2Se3纳米结构的方法
US20130299780A1 (en) * 2012-05-14 2013-11-14 The Johns Hopkins University Simplified devices utilizing novel pn-semiconductor structures
CN103400760A (zh) * 2013-08-05 2013-11-20 电子科技大学 一种在硅衬底上生长硒化铋单晶薄膜的方法及装置
CN103526297A (zh) * 2013-10-17 2014-01-22 西南交通大学 一种制备拓扑绝缘体Bi2Se3薄膜的方法
CN107287577A (zh) * 2016-04-11 2017-10-24 新疆大学 一种制备一维硒化铋纳米线的方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115341272A (zh) * 2022-08-02 2022-11-15 中山大学 一种毫米级二维拓扑材料硒化铋单晶的制备方法
CN115341272B (zh) * 2022-08-02 2023-09-15 中山大学 一种毫米级二维拓扑材料硒化铋单晶的制备方法

Also Published As

Publication number Publication date
CN108461382B (zh) 2020-06-19

Similar Documents

Publication Publication Date Title
Hu et al. Characterization of zinc oxide crystal whiskers grown by thermal evaporation
Zhou et al. Large‐area nanowire arrays of molybdenum and molybdenum oxides: synthesis and field emission properties
Wang et al. Catalyst-free fabrication of single crystalline boron nanobelts by laser ablation
CN103046110B (zh) 一种制备单晶Bi2Se3纳米结构的方法
CN110294463B (zh) 一种过渡族元素掺杂的室温铁磁性二维材料及制备方法
Zhang et al. Amorphous carbon coating for improving the field emission performance of SiC nanowire cores
Jayadevan et al. One-dimensional ZnO nanostructures
Shen et al. A low-temperature n-propanol gas sensor based on TeO 2 nanowires as the sensing layer
Meng et al. Synthesis and field emission properties of silicon carbide nanobelts with a median ridge
Zhang et al. Green Synthesis and Property Characterization of Single‐Crystalline Perovskite Fluoride Nanorods
CN103400760A (zh) 一种在硅衬底上生长硒化铋单晶薄膜的方法及装置
Zhang et al. Routes to grow well‐aligned arrays of ZnSe nanowires and nanorods
CN108330543A (zh) 一种N型SnSe单晶及其制备方法
CN110512285A (zh) 一种高质量硒化铋单晶体的制备方法
CN108461382A (zh) 一种实现拓扑绝缘体硒化铋纳米材料Cu掺杂的制备方法
CN111607826B (zh) 超导单晶膜的水热制备方法及其产品
Fang et al. Transformation of monolayer MoS 2 into multiphasic MoTe 2: Chalcogen atom-exchange synthesis route
Li et al. Synthesis of aligned gallium nitride nanowire quasi-arrays
Wei et al. Synthesis and characterization of Sn-doped β-Ga 2 O 3 nano-and micrometer particles by chemical vapor deposition
CN107699856B (zh) 采用蒸发镀膜-电场诱导可控制备定向Bi-Te-Se纳米柱阵列的方法
Cai et al. Preparation, characterization and formation mechanism of gallium oxide nanowires
CN107265460B (zh) 一种大宽厚比B掺杂SiC纳米带及其制备方法
Kwon et al. Synthesis of vertical arrays of ultra long ZnO nanowires on noncrystalline substrates
CN111470485B (zh) 一种磷化金纳米片及其可控制备方法与应用
CN114735751A (zh) 一种基于化学气相传输制备的单层CrI3薄片及方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20200619

Termination date: 20210206

CF01 Termination of patent right due to non-payment of annual fee