CN108427517B - Embedded touch array substrate, manufacturing method and liquid crystal display device - Google Patents

Abstract

The invention discloses an embedded touch array substrate, a manufacturing method and a liquid crystal display device. The manufacturing method of the embedded touch array substrate utilizes the same photomask manufacturing process to manufacture the first through hole and the second through hole, can reduce one-time exposure, shorten the manufacturing time, reduce the production cost and cannot influence the penetration rate.

Description

Embedded touch array substrate, manufacturing method and liquid crystal display device

Technical Field

The invention relates to the technical field of liquid crystal display, in particular to an embedded touch array substrate, a manufacturing method and a liquid crystal display device.

Background

With the rapid development of display technology, touch screens (touch panels) have been spread over various aspects of people's lives. With the continuous progress of touch technology, people have higher and higher requirements on touch products, and light and thin products are considered while paying attention to sensitivity, so that the manufacturing cost of display panel manufacturers is greatly increased.

At present, a touch screen can be divided into: an On-cell touch panel (On-cell touch panel) and an In-cell touch panel (In-cell touch panel). In the in-cell touch screen, the touch electrodes of the touch screen are embedded inside the display screen, for example, the touch electrodes are embedded on the array substrate. In one of the methods, a common electrode layer (common electrode) on the array substrate is used as a touch electrode, the common electrode layer is time-division multiplexed, so that image display and touch sensing are performed alternately, that is, one frame of image is divided into a display time period and a touch time period, the common electrode layer is used for driving liquid crystal molecules to perform image display in the display time period, and is used for realizing touch sensing detection in the touch time period.

As shown in fig. 1, a common electrode layer and an induction line layer are disposed on an existing array substrate, wherein the common electrode layer includes a plurality of common electrode blocks 81 arranged in an array and insulated from each other, the induction line layer includes a plurality of induction lines 82 insulated from each other, and the plurality of induction lines 82 are electrically connected to the plurality of common electrode blocks 81 in a one-to-one correspondence manner. Specifically, an insulating layer is disposed between the common electrode layer and the sensing line layer, a first via hole 83 is disposed in the insulating layer at a position corresponding to each common electrode block 81, one end of each sensing line 82 in the sensing line layer is electrically connected to one corresponding common electrode block 81 through the first via hole 83, and the other end of each sensing line 82 in the sensing line layer is electrically connected to the touch driving integrated chip 90.

As shown in fig. 2, a plurality of pixel units defined by the scan lines 86 and the data lines 87 in an insulated and crossed manner are further disposed on the array substrate, and a pixel electrode 88 and a thin film transistor 70 are disposed in each pixel unit. Fig. 2 shows that each sensing line 82 of the sensing line layer is arranged next to and next to the data line 87 in the same layer.

As shown in fig. 3 and 4, during the manufacturing of the array substrate, a first etching process is used to manufacture the gate 71 and the scan line 86 of the thin film transistor 70; the second etching process is used to fabricate the semiconductor layer 72 of the thin film transistor 70; the third etching process is used to fabricate the source electrode 73, the drain electrode 74, the data line 87 and the sensing line 82 of the sensing line layer of the thin film transistor 70; the fourth etching process is used to make the first via hole 83 for conducting the common electrode block 81; the fifth etching process is used to fabricate the common electrode 81; the sixth etching process is used to form the second via hole 84 of the pixel electrode 88, the seventh etching process is used to form the pixel electrode 88, and the pixel electrode 88 contacts the drain electrode 74 of the thin film transistor 70 through the second via hole 84. The first via hole 83 and the second via hole 84 are formed by etching through two masks, which is complicated, long in process time and high in manufacturing cost.

Disclosure of Invention

In order to overcome the defects and shortcomings in the prior art, the invention aims to provide an embedded touch array substrate, a manufacturing method and a liquid crystal display device, which reduce the process of using a photomask and save the processing time and cost.

The purpose of the invention is realized by the following technical scheme:

the invention provides an embedded touch array substrate, which comprises:

a substrate;

a first metal layer formed on the substrate, the first metal layer including a gate electrode and a plurality of scan lines;

a first insulating layer covering the first metal layer;

an active layer formed on the first insulating layer;

the second metal layer is formed on the first insulating layer and comprises a source electrode, a drain electrode, a plurality of data lines and a plurality of induction lines, the source electrode and the drain electrode are respectively connected with the active layer, and each data line is connected with the source electrode;

a second insulating layer overlying the second metal layer;

the common electrode is formed on the second insulating layer and comprises a plurality of common electrode blocks which are arranged in an array and mutually insulated;

a third insulating layer covering the common electrodes, wherein a first through hole and a second through hole are formed in the third insulating layer and the second insulating layer, the first through hole is formed in the position where each common electrode block is connected with the corresponding induction line, and the second through hole is formed in the position corresponding to the drain electrode;

the pixel electrodes and the conductive blocks are insulated from each other, each conductive block is filled in the first through hole to electrically connect each common electrode block with the corresponding induction line, and each pixel electrode is filled in the second through hole to electrically connect with the drain electrode.

Further, the first through hole penetrates through each common electrode block and exposes the side wall of each common electrode block, and the conductive block is in contact with the exposed side wall of each common electrode block when being filled in the first through hole.

Furthermore, the first through hole penetrates through each common electrode block and enables the side wall and the top of each common electrode block to be exposed, and the conductive block is in contact with the exposed side wall and the exposed top of each common electrode block when being filled into the first through hole.

Furthermore, each sensing line is parallel to and adjacent to the data line.

Furthermore, one end of each induction line is in conductive connection with the corresponding common electrode block through one or more first through holes, and the other end of each induction line is electrically connected with the touch control driving integrated chip.

Furthermore, the first through hole and the second through hole are formed by the same photomask manufacturing process.

Furthermore, the conductive block and the pixel electrode are located on the same layer and are formed by the same photo-masking process.

Furthermore, a plurality of pixel units arranged in an array are defined by a plurality of mutually insulated and crossed scanning lines and a plurality of data lines, and each common electrode block correspondingly covers the plurality of pixel units.

The invention also provides a liquid crystal display device which comprises an array substrate, a color film substrate arranged opposite to the array substrate and a liquid crystal layer positioned between the array substrate and the color film substrate, wherein the array substrate is the embedded touch array substrate.

The invention also provides a manufacturing method of the embedded touch array substrate, which comprises the following steps:

depositing a first metal layer on a substrate, and etching the first metal layer by utilizing a first photomask process to form a grid and a scanning line;

depositing a first insulating layer covering the first metal layer on the substrate;

depositing an active layer film on the first insulating layer, and etching the active layer film by using a second photomask process to manufacture an active layer;

depositing a second metal layer on the first insulating layer, etching the second metal layer by using a third photomask process to form a source electrode, a drain electrode, a data line and an induction line, wherein the source electrode and the drain electrode are respectively connected with the active layer, and the data line is connected with the source electrode;

depositing a second insulating layer covering the second metal layer on the first insulating layer;

depositing a first transparent conducting layer on the second insulating layer, and etching the first transparent conducting layer by using a fourth photomask manufacturing process to form a common electrode, wherein the common electrode comprises a plurality of common electrode blocks which are arranged in an array and are mutually insulated;

depositing a third insulating layer on the common electrode, etching the third insulating layer and the second insulating layer by using a fifth photomask process to form a first through hole and a second through hole, wherein the first through hole is formed in the position where each common electrode block is connected with the corresponding induction line, and the second through hole is formed in the position corresponding to the drain electrode;

and depositing a second transparent conducting layer on the third insulating layer, etching the second transparent conducting layer by using a sixth photomask manufacturing process to form mutually insulated conducting blocks and pixel electrodes, filling the conducting blocks into the first through holes to electrically connect each common electrode block with the corresponding induction line, and filling the pixel electrodes into the second through holes to electrically connect the pixel electrodes with the drain electrodes.

The invention has the beneficial effects that: the first through hole and the second through hole are formed by etching in the same photomask manufacturing process, so that one-time exposure can be reduced, the manufacturing time can be shortened, the production cost can be reduced, the driving voltage can be reduced, the power consumption can be reduced, and the penetration rate can not be influenced.

Drawings

Fig. 1 is a schematic plan view of a conventional in-cell touch array substrate.

Fig. 2 is a schematic structural diagram of a single pixel unit on the in-cell touch array substrate of fig. 1.

Fig. 3 is a schematic cross-sectional view taken along line a-a of fig. 2.

Fig. 4 is a schematic cross-sectional view taken along line B-B of fig. 2.

Fig. 5 is a schematic plan view of an in-cell touch array substrate according to an embodiment of the invention.

Fig. 6 is a schematic structural diagram of a single pixel unit on the in-cell touch array substrate of fig. 5.

Fig. 7 is a schematic cross-sectional view taken along line C-C of fig. 6.

Fig. 8 is a schematic cross-sectional view taken along line D-D of fig. 6.

Fig. 9a to 9h are schematic cross-sectional views illustrating a manufacturing process of the in-cell touch array substrate of fig. 6 along a line C-C.

Fig. 10a to 10D are schematic cross-sectional views illustrating a manufacturing process of the in-cell touch array substrate of fig. 6 along a line D-D.

Fig. 11 is a schematic structural diagram of a liquid crystal display device in an embodiment of the invention.

Fig. 12 is a comparison data of transmittance versus voltage simulation test between the lcd device of the present invention and the conventional lcd device.

Detailed Description

The present invention will be described in further detail with reference to the following drawings and specific examples, but the scope of the present invention is not limited thereto.

Referring to fig. 5 to 8, an embodiment of the invention provides an embedded touch array substrate, including:

a substrate 10;

a first metal layer formed on the substrate 10, the first metal layer including a gate 111 and a plurality of scan lines 112, wherein each scan line 112 is electrically connected to a corresponding gate 111, and the gate 111 may be independently disposed or may be a part of the scan line 112;

a first insulating layer 12 overlying the first metal layer;

an active layer 13 formed on the first insulating layer 12;

a second metal layer formed on the first insulating layer 12, the second metal layer including a source electrode 141, a drain electrode 142, a plurality of data lines 143, and a plurality of sensing lines 144, each sensing line 144 being parallel to and adjacent to the data line 143, the source electrode 141 and the drain electrode 142 being respectively connected to two ends of the active layer 13 in contact therewith, each data line 143 being connected to a corresponding source electrode 141, each source electrode 141, drain electrode 142, and gate electrode 111 correspondingly forming a thin film transistor 80;

a second insulating layer 15 overlying the second metal layer;

a common electrode 16 formed on the second insulating layer 15, the common electrode 16 including a plurality of common electrode blocks 161 arranged in an array and insulated from each other;

a third insulating layer 17 covering the common electrode 16, wherein a first through hole 171 and a second through hole 172 are formed through the third insulating layer 17 and the second insulating layer 15, the first through hole 171 corresponds to a position where each common electrode block 161 is connected to the corresponding sensing line 144, the first through hole 171 penetrates each common electrode block 161 to expose the sidewall and the top of each common electrode block 161, and the second through hole 172 is formed at a position corresponding to the drain electrode 142;

a plurality of pixel electrodes 181 and a plurality of conductive bumps 182 formed on the third insulating layer 17, wherein the plurality of pixel electrodes 181 and the plurality of conductive bumps 182 are insulated from each other, each conductive bump 182 fills the first through hole 171 to electrically connect the exposed sidewall and top of each common electrode block 161 with the corresponding sensing line 144, that is, each common electrode block 161 is bridged with the corresponding sensing line 144 by the conductive bump 182, and each pixel electrode 181 fills the second through hole 172 to electrically connect with the drain electrode 142. Exposing the top of each common electrode block 161 may increase the contact area between the conductive block 182 and each common electrode block 161, thereby achieving better conductive connection between each common electrode block 161 and the corresponding sensing line 144. However, the present invention is not limited thereto, and in other embodiments, the first through hole 171 may penetrate each common electrode block 161 and expose only a sidewall of each common electrode block 161, and each conductive block 182 is filled in the first through hole 171 to electrically connect the exposed sidewall of each common electrode block 161 with the corresponding sensing line 144.

Further, the first via hole 171 and the second via hole 172 are formed by the same photo-masking process, and the conductive block 182 and the pixel electrode 181 are formed by the same photo-masking process.

Further, the plurality of scan lines 112 and the plurality of data lines 143 are insulated from each other and cross to define a plurality of pixel units arranged in an array, and each common electrode block 161 correspondingly covers the plurality of pixel units.

Since the second insulating layer 15 is disposed between the common electrode 16 and the sensing lines 144, each sensing line 144 may be insulated from other common electrode blocks 161 by the second insulating layer 15. That is, except that one end of each sensing line 144 is electrically connected to the corresponding common electrode block 161 through the first through hole 171 and the conductive block 182, and the other end is electrically connected to the touch driving integrated chip 100, the middle portion of each sensing line 144 and the other common electrode blocks 161 are insulated from each other by the second insulating layer 15.

In this embodiment, the sensing lines 144 and the common electrodes 16 form an In-cell touch sensor (In-cell sensors) In the array substrate, the In-cell touch sensor is a self-contained structure, each common electrode block 161 of the common electrodes 16 is used as a self-contained electrode, each sensing line 144 is used as a routing line to lead out a detection signal to the touch driving integrated chip 100, and the detection signal is processed by the touch driving integrated chip 100.

In this embodiment, the common electrode 16 on the array substrate serves as a touch sensing function, the common electrode 16 is time-division multiplexed, so that image display and touch sensing are performed alternately, that is, one frame of image is divided into a display time period and a touch time period, the common electrode 16 is used for applying a common voltage Vcom in the display time period and forms an electric field with the pixel electrode 181 to drive liquid crystal molecules to perform image display, and the common electrode 16 is used for implementing touch sensing detection in the touch time period to sense a touch signal on the display screen.

Fig. 9a to 9h are schematic cross-sectional views illustrating a manufacturing process of the array substrate of fig. 6 along a line C-C, and fig. 10a to 10D are schematic cross-sectional views illustrating a manufacturing process of the array substrate of fig. 6 along a line D-D. Referring to fig. 9a to 9h and fig. 10a to 10d, the present invention further provides a method for manufacturing the in-cell touch array substrate, including the following steps:

referring to fig. 9a, a first metal layer is deposited on a substrate 10, the first metal layer may be made of a metal with a low resistivity, such as Mo, Al, Au, Ag, Cu, or an alloy containing any of these materials, or other composite film layers, and the first metal layer is etched by a first photo-masking process to form a gate 111 and a scan line 112, where the gate 111 is connected to the scan line 112 or the gate 111 is a part of the scan line 112;

referring to fig. 9b, a first insulating layer 12 covering the first metal layer is deposited on the substrate 10;

referring to fig. 9b, an active layer film is deposited on the first insulating layer 12, and the active layer film, such as but not limited to an amorphous silicon (a-Si) semiconductor layer, is etched by using a second photo-masking process to form the active layer 13;

referring to fig. 9c, a second metal layer is deposited on the first insulating layer 12, and a third photo-masking process is used to etch the second metal layer to form a source 141, a drain 142, a data line 143, and a sensing line 144, wherein the source 141 and the drain 142 are respectively connected to two ends of the active layer 13 in a contact manner, and the data line 143 is connected to the source 141;

referring to fig. 9d, a second insulating layer 15 covering the second metal layer is deposited on the first insulating layer 12;

referring to fig. 9e and fig. 10a, a first transparent conductive layer is deposited on the second insulating layer 15, and is etched by using a fourth photo-masking process to form a common electrode 16, where the common electrode 16 includes a plurality of common electrode blocks 161 arranged in an array and insulated from each other, the second insulating layer 15 is exposed between the common electrode blocks 161, and the second insulating layer 15 is exposed at a position where each common electrode block 161 is connected to the corresponding sensing line 144, and the first transparent conductive layer is made of, but not limited to, a transparent conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO);

referring to fig. 9f, 9g, 10b and 10c, a third insulating layer 17 is deposited on the common electrode 16, the third insulating layer 17 covers each common electrode block 161 and exposes the second insulating layer 15, the third insulating layer 17 and the second insulating layer 15 are etched by a fifth photomask process to form a first through hole 171 and a second through hole 172, wherein the first through hole 171 is disposed at a position where each common electrode block 161 is connected to the corresponding sensing line 144, the first through hole 171 penetrates each common electrode block 161 to expose the sidewall and the top of each common electrode block 161, and the second through hole 172 is disposed at a position corresponding to the drain electrode 142;

referring to fig. 9h and 10d, a second transparent conductive layer is deposited on the third insulating layer 17, and the second transparent conductive layer is etched by a sixth photo-masking process to form conductive blocks 182 and pixel electrodes 181, which are insulated from each other, the conductive blocks 182 are filled in the first through holes 171 to electrically connect the exposed sidewalls and tops of the common electrode blocks 161 with the corresponding sensing lines 144, and the pixel electrodes 181 are filled in the second through holes 172 to electrically connect the drain electrodes 142. The second transparent conductive layer is made of a transparent conductive material such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO), but not limited thereto.

The second metal layer may be made of a metal having a low resistivity, such as Mo, Al, Au, Ag, Cu, or an alloy or other composite film layer including any one of them. The first insulating layer 12, the second insulating layer 15, and the third insulating layer 17 may be made of an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or the like.

As shown in fig. 11, the present invention further provides a liquid crystal display device, which includes the embedded touch array substrate, a color film substrate 20 disposed opposite to the embedded touch array substrate, and a liquid crystal layer 30 disposed between the embedded touch array substrate and the color film substrate 20.

As shown in fig. 12, the transmittance-voltage simulation test effect of the liquid crystal display device provided in the embodiment of the present invention is compared with that of the conventional liquid crystal display device. In the embodiment, six masks (masks) are adopted, when the driving voltage is 4.3V, the transmittance is 3.91%, compared with the existing mask adopting six masks (the common electrode is manufactured above the pixel electrode, and the sensing line and the data line are manufactured on the same layer), when the driving voltage is 5.4V or 5V, the transmittance is 3.96% or 3.93%, the driving voltage is reduced, and the transmittance is not lost basically; compared with the prior art that seven photomasks are adopted (the pixel electrode is manufactured above the common electrode, and the induction line and the data line are manufactured on the same layer), when the driving voltage is 4.3V, the penetration rate is 3.81 percent, and the penetration rate is improved.

In the embodiment, the first through hole 171 and the second through hole 172 are formed by etching in the same photo-mask process, which can reduce one exposure, shorten the process time, reduce the production cost, reduce the driving voltage, reduce the power consumption, and do not affect the transmittance, compared with the conventional method that requires two photo-mask processes to be formed separately.

The above embodiments are only examples of the present invention and are not intended to limit the scope of the present invention, and all equivalent changes and modifications made according to the contents described in the claims of the present invention should be included in the claims of the present invention.

Claims (8)

1. An in-cell touch array substrate, comprising:

a substrate (10);

a first metal layer formed on the substrate (10), the first metal layer including a gate electrode (111) and a plurality of scan lines (112);

a first insulating layer (12) overlying the first metal layer;

an active layer (13) formed on the first insulating layer (12);

a second metal layer formed on the first insulating layer (12), the second metal layer including a source electrode (141), a drain electrode (142), a plurality of data lines (143), and a plurality of sensing lines (144), the source electrode (141) and the drain electrode (142) being respectively connected to the active layer (13), each data line (143) being connected to the source electrode (141);

a second insulating layer (15) overlying the second metal layer;

a common electrode (16) formed on the second insulating layer (15), the common electrode (16) including a plurality of common electrode blocks (161) arranged in an array and insulated from each other;

a third insulating layer (17) covering the common electrode (16), wherein a first through hole (171) and a second through hole (172) are formed in the third insulating layer (17) and the second insulating layer (15), the first through hole (171) is formed at a position where each common electrode block (161) is connected to the corresponding sensing line (144), the first through hole (171) penetrates each common electrode block (161) and exposes a side wall of each common electrode block (161), and the second through hole (172) is formed at a position corresponding to the drain electrode (142);

a plurality of pixel electrodes (181) and a plurality of conductive blocks (182) formed on the third insulating layer (17), wherein the plurality of pixel electrodes (181) and the plurality of conductive blocks (182) are insulated from each other, each conductive block (182) is filled into the first through hole (171) to electrically connect each common electrode block (161) with the corresponding sensing line (144), the conductive block (182) is in contact with the exposed sidewall of each common electrode block (161) when filled into the first through hole (171), and each pixel electrode (181) is filled into the second through hole (172) to electrically connect with the drain electrode (142);

the first through hole (171) penetrates through each common electrode block (161) to expose the top of each common electrode block (161), and the conductive block (182) is in contact with the exposed side wall and the exposed top of each common electrode block (161) when filled in the first through hole (171).

2. The in-cell touch array substrate of claim 1, wherein each sensing line (144) is disposed parallel to and adjacent to the data line (143).

3. The in-cell touch array substrate of claim 1, wherein one end of each sensing line (144) is electrically connected to the corresponding common electrode block (161) through one or more first through holes (171), and the other end of each sensing line (144) is electrically connected to the touch driving integrated chip (100).

4. The in-cell touch array substrate of claim 1, wherein the first via (171) and the second via (172) are formed by a same photo-masking process.

5. The in-cell touch array substrate of claim 1, wherein the conductive bumps (182) and the pixel electrodes (181) are disposed on the same layer and formed by a same photo mask process.

6. The in-cell touch array substrate according to any one of claims 1 to 5, wherein the plurality of scan lines (112) and the plurality of data lines (143) are insulated from each other and cross to define a plurality of pixel units arranged in an array, and each common electrode block (161) correspondingly covers the plurality of pixel units.

7. A liquid crystal display device, comprising an array substrate, a color filter substrate (20) disposed opposite to the array substrate, and a liquid crystal layer (30) disposed between the array substrate and the color filter substrate (20), wherein the array substrate is the embedded touch array substrate of any one of claims 1 to 6.

8. A manufacturing method of an embedded touch array substrate is characterized by comprising the following steps:

depositing a first metal layer on a substrate (10), and etching the first metal layer by using a first photomask process to form a gate (111) and a scanning line (112);

depositing a first insulating layer (12) on the substrate (10) covering the first metal layer;

depositing an active layer film on the first insulating layer (12), and etching the active layer film by using a second photomask process to manufacture an active layer (13);

depositing a second metal layer on the first insulating layer (12), etching the second metal layer by using a third photomask process to form a source electrode (141), a drain electrode (142), a data line (143) and an induction line (144), wherein the source electrode (141) and the drain electrode (142) are respectively connected with the active layer (13), and the data line (143) is connected with the source electrode (141);

depositing a second insulating layer (15) covering the second metal layer on the first insulating layer (12);

depositing a first transparent conductive layer on the second insulating layer (15), etching the first transparent conductive layer by using a fourth photomask process to form a common electrode (16), wherein the common electrode (16) comprises a plurality of common electrode blocks (161) which are arranged in an array and are insulated from each other;

depositing a third insulating layer (17) on the common electrode (16), etching the third insulating layer (17) and the second insulating layer (15) by using a fifth photomask process to form a first through hole (171) and a second through hole (172), wherein the first through hole (171) is formed at a position where each common electrode block (161) is connected with the corresponding sensing line (144), the first through hole (171) penetrates through each common electrode block (161) and exposes the side wall of each common electrode block (161), and the second through hole (172) is formed at a position corresponding to the drain electrode (142);

depositing a second transparent conductive layer on the third insulating layer (17), etching the second transparent conductive layer by using a sixth photomask process to form mutually insulated conductive blocks (182) and pixel electrodes (181), wherein the conductive blocks (182) are filled into the first through holes (171) to electrically connect each common electrode block (161) with the corresponding sensing line (144), the conductive blocks (182) are in contact with the exposed side wall of each common electrode block (161) when being filled into the first through holes (171), and the pixel electrodes (181) are filled into the second through holes (172) to be electrically connected with the drain electrodes (142);

the first through hole (171) penetrates through each common electrode block (161) to expose the top of each common electrode block (161), and the conductive block (182) is in contact with the exposed side wall and the exposed top of each common electrode block (161) when filled in the first through hole (171).

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