CN108352373A - 器件和用于制造器件的方法 - Google Patents
器件和用于制造器件的方法 Download PDFInfo
- Publication number
- CN108352373A CN108352373A CN201680062454.9A CN201680062454A CN108352373A CN 108352373 A CN108352373 A CN 108352373A CN 201680062454 A CN201680062454 A CN 201680062454A CN 108352373 A CN108352373 A CN 108352373A
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- metal
- atom
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- concentration
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- Granted
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- 238000000034 method Methods 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 290
- 239000002184 metal Substances 0.000 claims abstract description 290
- 239000000853 adhesive Substances 0.000 claims abstract description 96
- 230000001070 adhesive effect Effects 0.000 claims abstract description 94
- 238000009792 diffusion process Methods 0.000 claims abstract description 45
- 230000004888 barrier function Effects 0.000 claims abstract description 39
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 14
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 11
- 229910052737 gold Inorganic materials 0.000 claims description 11
- 239000010931 gold Substances 0.000 claims description 11
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 10
- 229910052738 indium Inorganic materials 0.000 claims description 9
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical group [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 8
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical group [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- 229910052718 tin Inorganic materials 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 229910021332 silicide Inorganic materials 0.000 claims description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052763 palladium Inorganic materials 0.000 claims description 5
- 229910052697 platinum Inorganic materials 0.000 claims description 5
- 239000010936 titanium Substances 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 229910052715 tantalum Inorganic materials 0.000 claims description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010937 tungsten Substances 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 118
- 239000004065 semiconductor Substances 0.000 description 22
- 239000000463 material Substances 0.000 description 14
- 238000003466 welding Methods 0.000 description 8
- 235000012431 wafers Nutrition 0.000 description 7
- 239000000758 substrate Substances 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 229910052594 sapphire Inorganic materials 0.000 description 5
- 239000010980 sapphire Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000002346 layers by function Substances 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- -1 nitride compound Chemical class 0.000 description 4
- 230000005855 radiation Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 229910010293 ceramic material Inorganic materials 0.000 description 3
- 230000004927 fusion Effects 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 238000002149 energy-dispersive X-ray emission spectroscopy Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012530 fluid Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 238000006116 polymerization reaction Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910006119 NiIn Inorganic materials 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910002847 PtSn Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 238000000441 X-ray spectroscopy Methods 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000002146 bilateral effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 150000002344 gold compounds Chemical class 0.000 description 1
- 239000003550 marker Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000021715 photosynthesis, light harvesting Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 150000003482 tantalum compounds Chemical class 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 230000000930 thermomechanical effect Effects 0.000 description 1
- 150000003609 titanium compounds Chemical class 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53242—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
- H01L23/53252—Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53257—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a refractory metal
- H01L23/53266—Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L24/93—Batch processes
- H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
- B23K35/3033—Ni as the principal constituent
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/32—Selection of soldering or welding materials proper with the principal constituent melting at more than 1550 degrees C
- B23K35/322—Selection of soldering or welding materials proper with the principal constituent melting at more than 1550 degrees C a Pt-group metal as principal constituent
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- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/05599—Material
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Abstract
本发明涉及一种器件(100),具有:第一组件(1);第二组件(2);连接元件(3),其直接布置在第一组件(1)和第二组件(2)之间,其中该连接元件(3)至少具有第一金属(Me1),该第一金属被成型为粘接层(4),该粘接层直接布置在第一组件(1)和/或第二组件(2)上,第一金属被成型为扩散垒(5),第一金属是连接元件(3)的第一物相(31)和/或第二物相(32)的组成部分,其中第一和/第二物相(31,32)除了第一金属(Me1)之外还分别具有与该第一金属不同的另外的金属,其中第一金属(Me1)在第一物相(31)中的浓度(c11)大于第一金属(Me1)在第二物相(32)中的浓度(c25)。
Description
技术领域
本发明涉及器件。本发明还涉及用于制造器件的方法。
背景技术
在将两个组件(例如两个晶圆)连接时,除了连接元件之外大多还存在粘接层和/或扩散垒。尤其是连接元件的材料与粘接层的材料不同。
发明内容
本发明的任务是提供一种器件,其具有更简单的结构构造。尤其是,该器件应当具有第一金属,所述第一金属作为粘接层、扩散垒和连接元件的第一和第二物相(Phase)的组成部分、也即作为焊料金属被成型出。尤其是,该器件应当不具有附加的粘接层和/或不具有附加的扩散垒。
此外,本发明的任务是提供一种用于制造器件的方法,该方法能够容易和/或低成本地予以执行。
这些任务通过按照独立权利要求1的器件来予以解决。本发明的有利的扩展方案和改进方案是从属权利要求的主题。此外,这些任务通过按照权利要求16所述的用于制造器件的方法来予以解决。
该方法的有利的扩展方案和改进方案是从属权利要求17的主题。
在至少一种实施方式中,该器件具有第一组件、第二组件和连接元件。尤其是,该器件由第一组件、第二组件和连接元件组成。该连接元件直接地、也即以直接的机械和/或电接触的方式布置在第一组件和第二组件之间。该连接元件至少具有第一金属。第一金属被成型为粘接层。粘接层布置在第一组件和/或第二组件处。尤其是,该粘接层直接布置在第一组件和/或第二组件处。该第一金属被成型为扩散垒。第一金属是连接元件的第一物相和/或第二物相的组成部分。第一和/第二物相除了第一金属之外还分别具有与该第一金属不同的另外的金属。尤其是,当存在至少两个物相时,第一金属在第一物相中的浓度大于第一金属在第二物相中的浓度。附加地,也可以存在多于两个物相,例如三个物相、四个物相或五个物相。
附加地,连接元件可以具有由第一金属的硅化物制成的层,该层布置在粘接层和第一和/或第二组件之间。
按照至少一种实施方式,该器件具有第一组件和/或第二组件。第一组件和/或第二组件可以从各种数量的材料和元素中选择。第一和/或第二组件例如可以分别从如下组中选择,该组包括蓝宝石、氮化硅、半导体材料、陶瓷材料、金属和玻璃。
这两个组件之一例如可以是半导体晶圆或陶瓷晶圆,例如由蓝宝石、硅、锗、氮化硅、氧化铝、发光陶瓷(例如YAG)制成的成型材料。此外,可能的是,至少一个组件被成型为印制电路板(PCB)、成型为金属导体框或成型为其他类型的连接载体。此外,至少一个组件例如可以包括电子芯片、光电子芯片、发射光的发光二极管、激光芯片、光电检测器芯片或晶圆或者具有多个这样的芯片。尤其是,第一组件和/或第二组件包括发射光的发光二极管,简称LED。
包括发射光的发光二极管的组件优选被设立用于发射蓝光或白光。代替地,该组件也可以发射其他颜色(例如红色、橙色、绿色)或来自红外范围的辐射或激光的辐射。发射光的发光二极管包括至少一个光电子半导体芯片。该光电子半导体芯片可以具有半导体层序列。
半导体芯片的半导体层序列优选基于III-V化合物半导体材料。例如使用由如下元素制成的化合物,这些元素可以选自铟、镓、铝、氮、磷、砷、氧、硅、碳和其组合。但是也可以使用其他的元素和添加剂。带有有源区的半导体层序列例如可以基于氮化合物半导体材料。“基于氮化合物半导体材料”在本上下文中意味着,半导体层序列或者其至少一部分具有氮化合物半导体材料、优选AlnGamIn1-n-mN或者由其组成,其中0≤n≤1,0≤m≤1并且n+m≤1。这里,该材料不一定具有按照上式的数学上精确的组成。相反,其例如可以具有一种或多种掺杂剂以及附加的组成部分。但是出于简单起见,上式仅仅包含晶格(Al、Ga、In、N)的主要组成部分,即使这些主要组成部分可以部分地通过少量其他物质来代替和/或补充。
半导体层序列包含带有至少一个pn结和/或一个或多个量子阱结构的有源层。在LED或半导体芯片的运行中,在有源层中产生电磁辐射。该辐射的波长或波长最大值优选处于紫外和/或可见光和/或红外的光谱范围中,尤其是处于在包含端值的420nm至800nm之间的波长处,例如在包含端值的440nm至480nm之间的波长处。
按照至少一种实施方式,器件具有连接元件。该连接元件将第一组件和第二组件相互连接。
按照至少一种实施方式,连接元件是连接层或者具有多个连接层。
连接元件例如可以是第一组件和第二组件的机械连接。此外,也可以通过连接元件进行第一组件与第二组件的电连接。尤其是,该连接元件直接与第一组件以及与第二组件直接机械和/或电接触地布置,也即该连接元件直接布置到第一组件以及与第二组件。该连接元件至少包括第一金属。
该第一金属可以被成型为粘接层或者粘接层可以包括该第一金属。“粘接层”这里并且在下面是指,该第一金属被设立用于将连接元件接合到至少第一组件和/或第二组件。粘接层尤其是直接地机械和/或电接触第一组件和/或第二组件地布置。于是,换句话说,在第一组件和第二组件之间,除了由第一金属制成的粘接层之外不布置另外的层、尤其是不布置另外的粘接层和/或除了由第一金属制成的扩散垒之外不布置另外的扩散垒。
换句话说,这里放弃另外的粘接层和/或垒层。由此,可以使得器件的制造简单化并且减小器件的复杂度。
按照至少一种实施方式,连接元件没有游离形式或者键合形式的下述元素:钛、钽、钨和/或氮。例如,该连接元素不具有钛。该连接元件尤其是不具有由金和/或钛组成或者包括这些材料的粘接层。
连接元件尤其是不具有附加的、包括钽和/或钛或者由钽和/或钛组成的扩散垒。
尤其是,在该器件中没有由钛化合物(如氮化钛、钨化钛、氮化钛钨)、钽化合物(如氮化钽)和/或金化合物制成的扩散垒层和/或粘接层。
按照至少一种实施方式,该连接元件具有由第一金属的硅化物制成的层。尤其是,在粘接层和第一和/或第二组件之间布置有由第一金属的硅化物制成的层。例如,在与硅键合的情况下,第一金属可以是镍,从而粘接层由硅化镍(NixSiy)构成或者包括它。
连接元件的第一金属可以被成型为扩散垒。由此第一金属防止在空间和时间方向上其他物质的迁移或扩散。尤其是,第一金属作为扩散垒例如防止:在器件(例如光电子器件)中的功能层在运行中失去其特殊特性。这样的特殊特性的失去例如可能由于其他组成部分扩散到功能层中导致。这大多导致降级并且可能甚至导致器件的损坏。
第一金属这里因此也用作垒并且由此防止或者避免不期望的物质(例如锡、铟或银)在第一和第二组件之间的扩散。
按照至少一种实施方式,该扩散垒被成型为层并且直接布置在粘接层之后。代替地,粘接层可以承担扩散垒的功能。换句话说,粘接层于是也是扩散垒。
按照至少一种实施方式,连接元件的第一金属是连接元件的第一物相以及必要时第二物相的组成部分。换句话说,第一物相和必要时第二物相至少包括第一金属。
按照至少一种实施方式,第一物相和/或第二物相除了第一金属之外分别还具有与第一金属不同的另外的金属。第一和/或第二物相例如分别具有第二金属、第三金属和/或第四金属或者由其组成。
连接元件却也可以具有多于两个物相,例如三个、四个或五个物相。连接元件也可以具有多个第一物相和/或多个第二物相。尤其是,多个第一物相在空间上相互分开。两个第一物相例如可以通过一个第二物相在空间上相互分开。所述至少一个第一物相和/或所述至少一个第二物相至少在其组成上彼此不同。如果该连接元件例如由三个物相构成,那么可以有两个相同的第一物相和所述第二物相。
“物相”在这里意味着所述连接元件的区域,在该区域中该材料具有类似或相同的组成并且从而有类似或相同的物理特性,例如类似或相同的熔化温度。
按照至少一种实施方式,连接元件的各个物相具有不同类型的金属。尤其是,在相应的物相内部的金属相互不同。例如,连接元件在第一物相中以不同浓度具有至少三种或四种不同金属。尤其是,该第一物相具有浓度c11的第一金属Me1,浓度c12的第二金属Me2,浓度c13的第三金属Me3,必要时还具有浓度c14的第四金属Me4。尤其是,由这三种或四种所述金属组成第一物相。第二物相同样可以具有不同类型的金属或者由其组成。例如,第二物相可以包含浓度c25的与在第一物相中包含的相同的第一金属Me1,包含浓度c26的与在第一物相中包含的相同的第二金属Me2、以及包含浓度c27的与在第一物相中包含的相同的第三金属Me3,或者由其组成。代替地或附加地,在第二物相中也可以存在另外的金属,例如浓度c28的第四金属Me4。尤其是,第一物相的第一金属Me1与第二物相的第一金属Me1区别在于其在相应物相内的浓度。尤其是,在第一物相中的第一金属Me1的浓度c11大于在第二物相中的第一金属Me1的浓度c25。
尤其是在相应的物相中的相应的金属构成合金。
按照至少一种实施方式,从如下组中选择第一金属,所述组包含镍、铂和钯。优选地,第一金属是镍,其可以被低成本地提供。代替地或附加地,尤其是在扩散垒中的第一金属Me1的浓度大于在第一物相中的第一金属的浓度。
按照至少一种实施方式,器件具有层序列:第一组件、粘接层、第一物相、第二物相、第二组件。尤其是,在粘接层中的第一金属的浓度大于在第一物相中的第一金属的浓度并且大于在第二物相中的第一金属的浓度。因此,换句话说,第一金属的浓度从粘接层向第二物相方向下降。
代替地,该器件具有如下层序列:第一组件、粘接层、扩散垒、第一物相、第二物相、第一物相、粘接层、扩散垒、第二组件。代替地,粘接层可以实现扩散垒的功能,从而不存在单独的扩散垒。尤其是,在粘接层中的第一金属的浓度大于在第一物相中的第一金属的浓度并且大于在第二物相中的第一金属的浓度。因此,换句话说,第一金属的浓度从第一和/或第二组件向第二物相方向下降。
按照至少一种实施方式,第一和/或第二物相分别被成型为层。尤其是,粘接层和由第一和/或第二物相制成的层彼此叠置。粘接层具有层厚d2。尤其是,粘接层的层厚d2至多是第一和第二物相的层厚之和的1/2。
粘接层可以具有5nm至50nm的层厚。第一和/或第二物相可以分别具有50nm至100nm的层厚。按照至少一种实施方式,第二金属是铟和/或第三金属是锡。
按照至少一种实施方式,所述另外的金属至少包含第四金属Me4。尤其是,该第四金属是金。
尤其是,第一和/或第二物相具有由NiInSn、AuInSn、NiIn和/或PtSn构成的系统。
按照至少一种实施方式,在第一物相中的第一金属的浓度c11在包含端值的40原子%至包含端值的65原子%之间,尤其是在包含端值的45原子%至包含端值的60原子%之间,例如为50原子%。代替地或附加地,在第二物相中的第一金属的浓度c25在包含端值的20原子%至包含端值的40原子%之间,尤其是在包含端值的25原子%至包含端值的35原子%之间,例如为30原子%。
按照至少一种实施方式,在第一物相中的第一金属的浓度c11在包含端值的8原子%至30原子%之间,尤其是在包含端值的11原子%至包含端值的25原子%之间,例如为20原子%。代替地或附加地,在第二物相中的第一金属的浓度c25为0原子%。换句话说,第二物相不包含或具有第一金属。
按照至少一种实施方式,在第一物相中的第二金属的浓度c12在包含端值的5原子%至包含端值的25原子%之间,尤其是在包含端值的8原子%至包含端值的20原子%之间,例如为15原子%。代替地或附加地,在第二物相中的第二金属的浓度c26在包含端值的15原子%或包含端值的20原子%至40原子%之间,尤其是在包含端值的20原子%至包含端值的35原子%之间,例如为25原子%。
按照至少一种实施方式,在第一物相中的第二金属的浓度c12在0原子%至10原子%之间,尤其是在0原子%至包含端值的7原子%之间,例如为3原子%。在第一物相中的第二金属的浓度c12可以是0原子%,也即在第一物相中不存在第二金属。代替地或附加地,在第二物相中的第二金属的浓度c26在包含端值的8原子%至包含端值的35原子%之间,尤其是在包含端值的13原子%至包含端值的29原子%之间,例如为20原子%。
按照至少一种实施方式,在第一物相中的第三金属的浓度c13在包含端值的15原子%至包含端值的45原子%之间,尤其是在包含端值的15原子%或20原子%至包含端值的40原子%之间,例如为30原子%。代替地或附加地,在第二物相中的第三金属的浓度c27在包含端值的25或30原子%至包含端值的50原子%之间,尤其是在包含端值的30原子%至包含端值的45原子%之间,例如为35原子%。
按照至少一种实施方式,在第一物相中的第三金属的浓度c13在包含端值的35原子%至包含端值的55原子%之间,尤其是在包含端值的41原子%至包含端值的50原子%之间,例如为45原子%。代替地或附加地,在第二物相中的第三金属的浓度c27在0原子%至15原子%之间,尤其是在0至10原子%之间,例如为5原子%。在第二物相中的第三金属的浓度可以为0原子%,也即,在连接元件的第二物相中不存在第三金属。
按照至少一种实施方式,在第一物相和/或第二物相中的第四金属的浓度c14在0原子%至5原子%之间,例如为3原子%。第四金属在连接元件的第一物相和/或第二物相中可以不存在,也即为0原子%。代替地,在第一物相中的第四金属的浓度c14在包含端值的25原子%至包含端值的45原子%之间,尤其是在包含端值的28原子%至包含端值的40原子%之间,例如30原子%。代替地或附加地,在第二物相中的第四金属的浓度c28在包含端值的65原子%至包含端值的88原子%之间,尤其是在包含端值的71原子%至包含端值的83原子%之间,例如为80原子%。
这些浓度借助EDX(英文为energy dispersive X-ray spectroscopy,能量扩散X射线光谱学)来确定,其可以具有最多5%、尤其是最多2%的容差。
尤其是,在第一物相中的第一金属的浓度与在第一物相中的第二金属的浓度、以及与在第一物相中的第三金属的浓度、以及必要时与在第一物相中的第四金属的浓度任意地相互组合。尤其是,在第二物相中的第一金属的浓度与在第二物相中的第二金属的浓度、以及与在第二物相中的第三金属的浓度、以及必要时与在第二物相中的第四金属的浓度任意地相互组合。
按照至少一种实施方式,连接元件在第一和/或第二物相中具有由镍、钯或铂制成的第一金属、由铟制成的第二金属和由锡制成的第三金属。
按照至少一种实施方式,该连接元件在第一和/或第二物相中具有由镍、钯或铂制成的第一金属、由铟制成的第二金属、由锡制成的第三金属和由金制成的第四金属。
按照至少一种实施方式,第一金属、第二金属和第三金属适于在<200℃、尤其是小于180℃的加工温度下进行混合。这例如可以通过如下方式来进行:第二金属和第三金属在<200℃或者<120℃的加工温度情况下转换为流体的物态并且与固态的第一金属发生反应。由此得到第一物相和/或第二物相,该第一物相和/或第二物相具有相应金属的不同的浓度组成。
发明人已经认识到,第一金属满足多种功能,如粘接、扩散垒和用于焊接系统的第一和第二物相的组成部分。另外的由其他材料制成的粘接层和/或扩散垒因此是不需要的。
尤其是,在焊接系统中包含的层在其厚度和特性方面被优化,使得焊接金属堆叠的处于外侧的层已经实现该任务。因此使得能够放弃专门的粘接层和扩散垒,这减少了制造组件、尤其是薄膜LED所需要的工艺步骤并且因此减少了部件的复杂性。
各个层的厚度、尤其是粘接层的层厚必须选择为,使得在接合工艺中在第一和第二物相、也即焊料完全消散之后,保留由第一金属制成的封闭的、足够厚的层,尤其是粘接层。所形成的物相必须是热力学和机械上足够稳定的。尤其是,在形成第一和第二物相之后,粘接层具有足够的剩余厚度,以便维持其作为粘接层和/或扩散垒的功能。此外,由第一金属制成的层可以被施加为,使得其具有对相应的应用有利的张力状态。由第一金属制成的粘接层可以是牺牲层或者连接形成垒,其在这里是焊接系统的组成部分。
按照至少一种实施方式,第一物相层和/或第二物相层和/或粘接层的表面被成型为波纹状的。尤其是, 第一物相层和/或第二物相层和/或粘接层的彼此邻接的表面是波纹状的。换句话说,各个层的表面不是平的,而是这些层由于其波纹状的成型而相互啮合。这种波纹状的构型尤其是可以通过不同大小的冲子来产生。
此外,还说明了一种用于制造器件的方法。该用于制造器件的方法优选制造器件。也就是说,针对方法所公开的全部特征也针对器件被公开,反之亦然。
按照至少一种实施方式,该方法具有如下步骤:
A)提供第一组件和第二组件,
B)将由第一金属制成的至少一个粘接层以d1的层厚施加到第一和/或第二组件上。附加地,将由第二金属制成的至少一个层和由第三金属制成的至少一个层施加到粘接层上,其中第一金属和/或第二金属和/或第三金属彼此不同。代替地,也可以施加由第四金属制成的层。由第四金属制成的层尤其是可以布置在由第一金属制成的层和由第二金属制成的层之间。
C)将在步骤B)中产生的布置加热到在130℃至200℃之间的第一温度,以便构造出第一物相和第二物相,其中第一物相和第二物相由粘接层的第一金属、第二金属和第三金属以及必要时还由第四金属构成。
D)将在步骤C)中产生的布置加热到在230℃至400℃之间的第二温度,用于构造出热力学上并且机械上稳定的第一和第二物相,其中至少在步骤D)之前将第一和第二组件相互连接,其中器件在步骤D)之后具有带有第一层厚的粘接层,其中在步骤D)之后产生的粘接层是粘性的并且是扩散不透的,并且其中粘接层布置在第一物相和第一组件之间和/或第一物相和第二组件之间。尤其是,这些组件相互重叠地施加,使得所施加的层直接叠置。尤其是,在步骤B)中施加的、由第一金属制成的粘接层已经是扩散不透的。换句话说,不需要步骤D)来使得这些层扩散不透。
“热力学上并且机械上稳定”这里并且在下面理解为:第一金属与第二金属和第三金属完全反应和/或完全混合,从而第一物相和/或第二物相具有固定的聚合状态。尤其是,在步骤D)之后于是第一物相和/或第二物相具有如下熔化温度,其与在步骤D)之前的第一物相和/或第二物相(例如在步骤C)中的第一和第二物相)的熔化温度不相同。尤其是,在步骤D)之后的第一物相和/或第二物相的再熔化温度大于在步骤D)之前(例如在步骤C)中)第一物相和/或第二物相的再熔化温度。
按照至少一种实施方式,连接元件至少在步骤C)中构成至第一组件和第二组件的固定连接。
按照至少一种实施方式,在步骤C)和D)之间还进行另外的步骤C1):
C1)在步骤C)中生成的布置被冷却至室温。这里,室温尤其是理解为25℃的温度。
按照至少一种实施方式,在步骤B)中附加地施加由第四金属制成的层,该第四金属至少在步骤C)中是第一物相和/或第二物相的组成部分,其中在步骤D)之后在该器件的第一组件和/或第二组件之后以层厚d2布置粘接层并且然后布置第一物相以及然后布置第二物相。
换句话说,该方法能够实现第一组件通过连接元件与第二组件的连接。在此,连接元件具有粘接、扩散垒和焊接系统的功能。焊接系统这里以及在下面理解为:尤其是第二和第三金属在<200℃的低加工温度情况下混合并且与第一金属反应。在此,它们构成第一物相和第二物相的固定连接,其中相应金属的第一和第二物相的浓度彼此不同。接着,这些物相可以在第二温度步骤中被加热,使得这些物相是热机械稳定的。尤其是,该器件在扩散垒和组件之间的界面处具有粘接层。
按照该方法的至少一种实施方式,第一组件和/或第二组件被加热至第一温度,例如被加热至最高200℃或者最高180℃的第一温度。在此,第一金属和第二金属和第三金属构成三元的第一物相和/或第二物相。尤其是,第二和第三金属由于其适宜形成共熔物而熔化并且与第一金属反应成三元的第一物相和/或第二物相。三元的第一或第二物相包括第一、第二和第三金属或者由其组成。该三元的物相可以是多物相的金属间层。于是,在器件中,这些三元的物相将第一和第二组件相互连接。尤其是,这些组件具有不同大小的热膨胀系数。
附图说明
另外的优点、有利的实施方式和扩展方式由下面结合附图描述的实施例得到。
其中:
图1A示出了按照一种实施方式的器件的示意性侧视图,
图1B 示出了图1A的详细视图,
图2A至2B分别示出按照一种实施方式的器件的示意性侧视图,
图3A和3B分别示出了按照一种实施方式的器件的示意性侧视图,
图4A和4B分别示出了按照一种实施方式的器件的示意性侧视图,
图5A和5B示出了按照一种实施方式的用于制造器件的方法。
在实施例和附图中,相同、类似或功能一样的元件分别被设置相同的参考标记。所示出的元件及其相互间的尺寸关系不能看作是比例正确的。相反,各个元件(例如层、部件、器件和区域)为了更好的可视性和/或为了更好的理解而被夸大地示出。
具体实施方式
图1示出了按照一种实施方式的器件的示意性侧视图。器件100具有第一组件1和第二组件2。在第一组件1和第二组件2之间布置有连接元件3。连接元件3包括第一金属Me1的层、第一物相31和第二物相32、另外的第一物相31和由第一金属Me1制成的另外的层或者由它们组成。尤其是,由第一金属Me1制成的层构成粘接层4和/或由第一金属Me1制成的另外的层构成另外的粘接层4。代替地,由第一金属Me1制成的层构成粘接层4和扩散垒5,和/或由第一金属Me1制成的另外的层构成另外的粘接层4和另外的扩散垒5。尤其是,由第一金属Me1制成的层、尤其是粘接层4不仅直接布置在第一组件1处、而且直接布置在第二组件2处。第一组件1和第二组件2例如选自包括蓝宝石、陶瓷材料、半导体材料和金属的组。在此,第一组件1和第二组件2可以被选择为,使得它们具有不同的热膨胀系数。尤其是,热膨胀系数至少相差1.5倍,例如3倍或者更高。
连接元件3尤其是以直接机械和/或电接触的方式布置在第一组件1和第二组件2之间。该连接元件3至少具有Me1层作为粘接层4,其可以附加地是扩散垒5。尤其是,器件100具有两个粘接层4。粘接层4分别直接布置在至第一和第二组件1,2的相应界面处。
第一物相31可以由下面的金属和下面的浓度组成或者包括它们:
第一金属Me1:45至60原子%,
第二金属Me2:8至20原子%,
第三金属Me3:20至40原子%,
第四金属Me4:0至5原子%。
第二物相32可以由下面的金属和其浓度组成或者包括它们:
第一金属Me1:25至35原子%,
第二金属Me2:20至35原子%,
第三金属Me3:30至45原子%,
第四金属Me4:0至5原子%。
于是,另外的第一物相31可以由下面的金属和其浓度组成或者包括它们:
第一金属Me1:45至60原子%,
第二金属Me2:8至20原子%,
第三金属Me3:20至40原子%,
第四金属Me4:0至5原子%。
代替地,第一物相31例如可以由下面的金属和下面的浓度组成或者包括它们:
第一金属Me1:11至24原子%,
第二金属Me2:0至7原子%,
第三金属Me3:42至50原子%,
第四金属Me4:29至40原子%。
代替地,第二物相32例如可以由下面的金属和下面的浓度组成或者包括它们:
第一金属Me1:0原子%,
第二金属Me2:13至22原子%,
第三金属Me3:3至10原子%,
第四金属Me4:71至83原子%。
代替地,另外的第一物相31可以由下面的金属和其浓度组成或者包括它们:
第一金属Me1:11至24原子%,
第二金属Me2:0至7原子%,
第三金属Me3:42至50原子%,
第四金属Me4:29至40原子%。
第一金属Me1可以是镍、铂或钯。第二金属Me2可以是铟。第三金属Me3可以是锡。第四金属Me4可以是金。
换句话说,连接元件3具有两个第一物相31和布置在这两个第一物相之间的第二物相32。这些物相布置在两个粘接层4之间,所述粘接层可以同时是扩散垒5。第一和第二物相31、32包括至少三种金属以及必要时包括另外的金属或者由其组成。在此,尤其是在相应粘接层4中的第一金属Me1的浓度大于在第一物相31中的第一金属Me1的浓度c11并且大于在第二物相32中的第一金属Me1的浓度c25。换句话说,第一金属Me的浓度从第一和/或第二组件1、2向第二物相32的方向降低。第一金属Me1的浓度在至第一和/或第二组件1、2的界面处最大。由此,相应的粘接层4可以具有对第一和/或第二组件1、2的良好的粘接性。在粘接层4和第一物相31之间保留的元素Me1用作扩散垒。
按照至少一种实施方式,粘接层4、第一物相31和/或第二物相32分别成型为层。尤其是,这些层彼此堆叠。在相邻层之间的界面可以是平坦的。代替地,如在图1B中所示,在第一物相31和第二物相32之间的界面312可以不平坦,而是可以具有波纹状形状。由此,第一物相31可以与第二物相32啮合。这导致在两个物相31、32之间的良好的粘接。
附加地,在第一物相31和相应粘接层4之间的界面可以是波纹状的。由此,第一物相31还可以与相应粘接层4啮合。由此,可以提供连接元件3,其具有在第一组件1和第二组件2之间的强连接。
图2A和2B分别示出了按照一种实施方式的器件100及其制造。图2A的器件示出了器件100,该器件可以在温度影响之前、即在方法步骤C)和D)之前予以构建。图2B示出了在至少方法步骤C)和/或D)之后制成的器件100。
图2A示出了第一组件1,其由层序列52至54构成。第一组件1具有衬底54,该衬底例如可以是发射光的发光二极管的蓝宝石衬底。在蓝宝石衬底54上,可以施加半导体层序列5。该半导体层序列5包括n型半导体层51、有源层52和p型半导体层53。代替地,n型半导体层51和p型半导体层53可以互换。有源层52在运行中被设立用于发射尤其是来自可见光波长范围的辐射。该半导体层序列例如可以用MOCVD工艺来生长。
第二组件2例如可以是由绝缘的陶瓷材料制成的晶圆、例如由氮化硅制成的晶圆。代替地,第二组件可以是石英玻璃。图2A的连接元件3示出了层序列,其具有由第一金属Me1制成的层、由第四金属Me4制成的层、由第二金属Me2制成的层和由第三金属Me3制成的层。尤其是,该层序列施加在双侧、也即施加在第一和第二组件1、2上。在温度影响之后,即至少在方法步骤C)和/或D)之后,各个金属的各个层被转化为第一和第二物相31、32。
代替地,也可以形成多个第一物相31和多个第二物相32、尤其是空间上通过第二物相32分开的多个第一物相。换句话说,由第四、第二和第三金属构成的层以及第一金属的层至少部分地或者完全地被转化为第一和/或第二物相31、32。第一和/或第二物相31、32至少包括这四种金属Me1、Me2、Me3和Me4。
图2B的器件100附加地示出了:第一金属Me1的层、也即尤其是粘接层4和/或扩散垒5不完全转化为第一和/或第二物相31、32。换句话说,粘接层4在方法步骤C)和D)的影响之后被成型为层。只是在图2B的器件100中的第一金属层Me1的层厚相比于图2A的器件100而言被减小。尤其是,图2B的器件100的粘接层4的层厚具有相应于图2A的器件100的金属层Me1的层厚的三分之一的值。
换句话说,在焊料的固化反应结束之后并且在由粘接层4形成粘性的中间层(例如硅化镍)之后,还存在其初始厚度的至少三分之一,以便维持阻断效应。但是多功能层的所需的剩余层厚强烈地取决于所用的焊接系统、焊接系统的厚度以及取决于所使用的多功能层的类型,也即取决于所使用的材料和其固有特性(如核结构和张力)。
至少在方法步骤C)或D)之后得到图2B的器件100。图2B的器件100具有以下层序列:第一组件1、粘接层4、第一物相31、第二物相32、第一物相31、另外的粘接层4和第二组件2。
图3A和3B分别示出了按照一种实施方式的器件的示意性侧视图及其制造。图3A的器件示出了第一和第二组件1、2,在其之间施加有由第一金属Me1制成的层、由第二金属Me2制成的层和由第三金属Me3制成的层构成的层序列。在温度影响之后,得到图3B的器件100,其中连接元件3具有粘接层4以及两个物相:第一物相31和第二物相32。在此,第一金属在粘接层4中的浓度大于第一金属在第一物相31中的浓度c11并且大于第一金属在第二物相32中的浓度c25。换句话说,在图3B的器件100中,浓度从第一组件1向第二组件2的方向降低。图3B的器件100与图2B的器件的不同之处在于,连接元件3除了粘接层4之外还仅仅具有两个物相:第一物相31和第二物相32。尤其是,图3B的连接元件3的构造与图2B的器件100相比是非对称的。在粘接层4和第一物相31之间的由Me1制成的未消散层被用作扩散垒5。
图4A和4B分别示出了按照一种实施方式的器件的示意性侧视图及其制造。图4A示出了器件100,带有第一或第二组件1、2。在第一或第二组件1、2上可以施加由第一金属Me1制成的层。由第二金属Me2制成的层可以布置在Me1层之后。由第三金属Me3制成的层可以布置在由第二金属Me2制成的层之后。在温度影响之后构成图4B的器件100。尤其是构成具有粘接层4的器件100。粘接层4直接布置在第一或第二组件1、2上。第一物相31和第二物相32布置在粘接层4之后。
图5A和5B示出了按照一种实施方式的用于制造器件的方法。图5A示出提供第一组件1和第二组件2。由第一金属Me1制成的层以层厚d1被施加到第一组件1上,第一组件例如具有由衬底54、p型半导体层53、n型半导体层51和有源层52构成的层序列。代替地,这里并且在后面,n型半导体层51和p型半导体层53可以交换。这些层尤其是可以用薄膜方法来制造。由第二金属Me2和第三金属Me3制成的另外的层布置在由第一金属Me1制成的层之后。在第二组件2那一侧,可以在其表面上以层厚d1施加由第一金属Me1制成的层,接着是由第二金属Me2制成的层,以及接着是由第三金属Me3制成的层。紧接着,可以将两者连接并且暴露于第一温度、尤其是在130℃至200℃之间的温度,以便构造出第一物相31和第二物相32。在此,第二金属和第三金属Me2、Me3的层可以转换为流体的聚合状态并且与第一金属Me1的层反应。形成器件100,该器件100具有第一物相31、第二物相32和第一物相31作为连接元件3的层序列。附加地,由第一金属Me1制成的粘接层4在两侧布置在第一组件1和第二组件2处。
图5B示出:第一层Me1在方法步骤C)或D)之后没有完全与第二金属Me2和/或第三金属Me3以及必要时与第四金属Me4反应。保留由第一金属Me1制成的“剩余层”,其构成具有层厚d2的粘接层4以及必要时的扩散垒。
在温度提高到例如在230℃和400℃之间的第二温度的情况下,该系统可消散并且构成热力学并且机械稳定的第一和第二物相31、32。在步骤D)之后形成器件,该器件具有带有层厚d2<d1的粘接层4,其中在步骤D)之后产生的粘接层4是粘性的并且对于其他物质来说是扩散不透的。尤其是,粘接层4具有由图5A的器件100的第一金属Me1制成的原始层的层厚的三分之一。尤其是,该层Me1在退火之后还存在并且用作扩散垒。
如果两个组件1,2(例如两个晶圆)相互连接,其中一个组件具有一个功能层,则这可以如下地来实现。
可以以425nm的层厚来淀积由第一金属Me1制成的层作为功能层。紧接着,可以在该层Me1上施加由第二金属Me2制成的层(例如带有150nm层厚的铟),以及由第三金属Me3制成的层(例如带有225nm层厚的锡)。在其他组件上可以以相同的顺序和厚度施加相同的材料。这两个组件的连接可以在142℃下进行。代替地或附加地,可以使用例如1Mpa的单轴压力。组件1、2可以被加热,尤其是可以从室温出发使用10K/分钟的加热速率。紧接着,可以施加压力,尤其是可以保持该压力120s的时间。至室温的冷却同样可以以10K/分钟的速率进行。紧接着,该器件或该布置暴露于第二温度,由此第一和第二物相31、32以相应的浓度构成并且由此在机械上以及在热学上是稳定的。尤其是,该布置被加热至在230℃至400℃之间的第二温度,以便构造出热力学和机械上稳定的第一物相31和第二物相32。尤其是,进行120分钟的退火。在此情况下,形成了第一物相31和第二物相32和由第一金属Me1制成的足够厚的粘接层4,该粘接层可以承担粘接和壁垒的功能。此外,第一金属Me1可以是第一和/或第二物相31、32的组成部分。
按照另外的实施例,结合附图描述的实施例和其特征也可以相互组合,即使这种组合没有明确在图中示出。此外,结合附图描述的实施例可以具有按照在发明内容中的描述的附加或者代替的特征。
本发明并不局限于借助实施例的描述。相反,本发明包括每种新特征以及特征的每种组合,这尤其是包含在专利权利要求中的特征的每种组合,即使所述特征或所述组合本身没有明确在专利权利要求或实施例中说明。
本专利申请请求德国专利申请10 2015 114 086.1的优先权,其公开内容在此通过引用结合于此。
附图标记列表
100 器件
1 第一组件
2 第二组件
3 连接元件
31 第一物相
32 第二物相
带有浓度(c11)的第一物相的第一金属(Me1),
带有浓度(c12)的第一物相的第二金属(Me2),
带有浓度(c13)的第一物相的第三金属(Me3),
带有浓度(c14)的第一物相的第四金属(Me4),
带有浓度(c25)的第二物相的第一金属(Me1),
带有浓度(c26)的第二物相的第二金属(Me2),
带有浓度(c27)的第二物相的第三金属(Me3),
带有浓度(c28)的第二物相的第四金属(Me4),
α1 第一热膨胀系数
α2 第二热膨胀系数,
4 粘接层
5 扩散垒
5 半导体层序列
51 n型半导体层
52 有源层
53 p型半导体层
54 衬底。
Claims (16)
1.一种器件(100),具有
第一组件(1),
第二组件(2),
连接元件(3),其直接布置在第一组件(1)和第二组件(2)之间,其中该连接元件(3)至少具有第一金属(Me1),
第一金属被成型为粘接层(4),该粘接层直接布置在第一组件(1)和/或第二组件(2)上,
第一金属被成型为扩散垒(5),
第一金属是所述连接元件(3)的第一物相(31)和/或第二物相(32)的组成部分,其中第一和/第二物相(31,32)除了第一金属(Me1)之外还分别具有与该第一金属不同的另外的金属,其中第一金属(Me1)在第一物相(31)中的浓度(c11)大于第一金属(Me1)在第二物相(32)中的浓度(c25),
其中所述连接元件(3)具有由第一金属(Me1)的硅化物制成的层,该层布置在所述粘接层(4)和第一和/或第二组件(1,2)之间。
2.如权利要求1所述的器件(100),其中,从如下组中选择第一金属(Me1),所述组包含镍、铂和钯,和/或其中在所述扩散垒(5)中的第一金属(Me1)的浓度大于在第一物相(31)中的第一金属(Me1)的浓度。
3.如前述权利要求至少之一所述的器件(100),其中,第一和/或第二物相(31,32)分别被成型为层,其中所述粘接层(4)具有层厚d2,所述层厚d2至多是第一和/或第二物相(31,32)的层厚之和的1/2。
4.如前述权利要求至少之一所述的器件(100),其中,在第一和第二组件(1,2)之间,除了由第一金属(Me1)制成的所述粘接层(4)之外不布置另外的粘接层和/或除了由第一金属(Me1)制成的所述扩散垒(5)之外不布置另外的扩散垒。
5.如前述权利要求至少之一所述的器件(100),其中,所述连接元件(3)没有游离形式或者键合形式的下述元素:钛、钽、钨和/或氮。
6.如前述权利要求至少之一所述的器件(100),其中,所述另外的金属至少包括第二金属(Me2)和/或第三金属(Me3),其中所述第二金属(Me2)是铟并且第三金属(Me3)是锡。
7.如前述权利要求至少之一所述的方法,其中所述另外的金属至少包括第四金属(Me4),其中该第四金属(Me4)是金。
8.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)中的第一金属(Me1)的浓度(c11)在40原子%至65原子%之间,和/或,在第二物相(32)中的第一金属(Me1)的浓度(c25)在20原子%至40原子%之间。
9.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)中的第一金属(Me1)的浓度(c11)在11原子%至25原子%之间,和/或,在第二物相(32)中的第一金属(Me1)的浓度(c25)为0原子%。
10.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)中的第二金属(Me2)的浓度(c12)在5原子%至25原子%之间,和/或,在第二物相(32)中的第二金属(Me2)的浓度(c26)在20原子%至40原子%之间。
11.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)中的第二金属(Me2)的浓度(c12)在0原子%至7原子%之间,和/或,在第二物相(32)中的第二金属(Me2)的浓度(c26)在13原子%至29原子%之间。
12.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)中的第三金属(Me3)的浓度(c13)在15原子%至40原子%之间,和/或,在第二物相(32)中的第三金属(Me3)的浓度(c27)在30原子%至50原子%之间。
13.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)中的第三金属(Me3)的浓度(c13)在41原子%至50原子%之间,和/或,在第二物相(32)中的第三金属(Me3)的浓度(c27)在0原子%至10原子%之间。
14.如前述权利要求至少之一所述的器件(100),其中,在第一物相(31)和/或第二物相(32)中的第四金属(Me4)的浓度(c14)在0原子%至5原子%之间,或者其中在第一物相(31)中的第四金属(Me4)的浓度(c14)在28原子%至40原子%之间,和/或,在第二物相(32)中的第四金属(Me4)的浓度(c28)在71原子%至83原子%之间。
15.一种用于制造根据权利要求1至14之一所述的器件(100)的方法,具有步骤:
A)提供第一组件(1)和第二组件(2),
B)将由第一金属(Me1)制成的至少一个粘接层(4)以d1的层厚施加到第一和/或第二组件(1,2)上,以及将由第二金属(Me2)制成的至少一个层和由第三金属(Me3)制成的至少一个层施加到所述粘接层(4)上,其中第一、第二和第三金属(Me1,Me2,Me3)彼此不同,
C)将在步骤B)中产生的装置加热到在130℃至260℃之间的第一温度,以便构造出第一物相(31)和第二物相(32),其中第一物相(31)和第二物相(32)由所述粘接层(4)的第一金属(Me1)、第二金属(Me2)和第三金属(Me3)构成,
D)将在步骤C)中产生的装置加热到在230℃至400℃之间的第二温度,用于构造出热力学上并且机械上稳定的第一和第二物相(31,32),
其中至少在步骤D)之前将第一和第二组件(1,2)相互连接,
其中所述器件在步骤D)之后具有带有第一层厚的粘接层(4),其中在步骤D)之后产生的粘接层(4)是粘性的并且是扩散不透的,
并且其中所述粘接层(4)布置在第一物相(31)和第一和/或第二组件(1,2)之间。
16.如权利要求15所述的方法,
其中在步骤B)中附加地施加由第四金属(Me4)制成的层,该第四金属至少在步骤C)中是第一和/或第二物相(31,32)的组成部分,
其中在步骤D)之后在该器件(100)的第一和/或第二组件(1,2)之后以层厚d2布置所述粘接层(4)并且然后布置第一物相(31)以及然后布置第二物相(32)。
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