CN108196953A - A kind of heterogeneous polynuclear parallel processing apparatus and method towards isomerous multi-source big data - Google Patents
A kind of heterogeneous polynuclear parallel processing apparatus and method towards isomerous multi-source big data Download PDFInfo
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- CN108196953A CN108196953A CN201711456225.8A CN201711456225A CN108196953A CN 108196953 A CN108196953 A CN 108196953A CN 201711456225 A CN201711456225 A CN 201711456225A CN 108196953 A CN108196953 A CN 108196953A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
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Abstract
The invention discloses a kind of heterogeneous polynuclear parallel processing apparatus and method towards isomerous multi-source big data, which is realized using the ZYNQ 7000SoC chips of Xilinx companies, including:The data of collected distinct device in a manner of DMA, and are passed through HP ports in piece and are buffered in respectively in the outer DDR of piece of different offset address and size by the isomerous multi-source big data parallel acquisition module based on FPGA, the module;DDR outside piece is mounted in piece in AXI buses by design point machine simultaneously.Parallel data processing module based on heterogeneous polynuclear builds multiple MicroBlaze cores in the module, and forms heterogeneous polynuclear framework with ARM cores;Different MicroBlaze cores are responsible for handling different device datas;ARM cores complete the performance monitoring to multiple MicroBlaze cores, operation of the different data processing algorithm of dynamic dispatching on multiple MicroBlaze cores, to ensure the load balancing of core.The present invention can realize the efficient parallel processing of the live distinct device big data of manufacture, can effectively support intelligence manufacture upper strata decision.
Description
Technical field
The invention belongs to electronic engineering and computer science, and in particular to a kind of towards the different of isomerous multi-source big data
Structure multi-core parallel concurrent processing unit and method.
Background technology
With the proposition of national strategy " made in China 2025 ", intelligence manufacture has become the hot spot noun of contemporary China.But
It is to realize that intelligence manufacture be unable to do without data, these data more specifically show as the data at manufacture scene, and miscellaneous set
It is standby to constitute manufacture scene, for example supporting industry Ethernet interfaces, RS232 interface, asynchronous RS422 interfaces, asynchronous RS485 connect
Mouth, the equipment for synchronizing RS485 interfaces, SPI interface, I2C interface, CAN interface, MTConnect interfaces and OPC UA interfaces.For
Realize the effective monitoring to manufacture scene, realizing just seems to the data parallel acquisition of the various equipment in scene with processing and particularly must
Will, and traditional method is acquired using multiple processor/embedded microprocessors mostly, is handled different number of devices respectively
According to then these processor/embedded microprocessors carry out data interaction by way of piece external bus again, and this traditional
Mode certainly will increase collection in worksite, processing unit quantity, increase cost, also increase field layout wiring difficulty, together
When the data interaction based on piece external bus also increase time delay, reduce data transmission, processing real-time.So it needs to seek
A kind of method for parallel processing and device that can realize the live heterogeneous device of manufacture, and this method and device can usage quantity very
The data acquisition and procession of numerous equipment can be completed in few processor/embedded microprocessor, while reduces data interaction
Time delay.
SoC (System on Chip, system on chip) is a kind of system-level microprocessor, be generally integrated with including
The processors such as FPGA, ARM, Microblaze, DSP, FPGA have the hardware concurrent characteristic of height, can realize plurality of devices number
According to parallel acquisition, by building multiple Microblaze cores, the data processing task of each core operation distinct device, in conjunction with
The dynamic dispatching of task, a kind of method for realizing heterogeneous device big data parallel processing of can yet be regarded as.Therefore, the present invention proposes a kind of
Towards the heterogeneous polynuclear parallel processing apparatus and method of isomerous multi-source big data, which can realize manufacture scene not
Efficient parallel with equipment big data is handled, and can effectively support intelligence manufacture upper strata decision.
Invention content
The technical problem to be solved in the present invention is:A kind of heterogeneous polynuclear parallel processing towards isomerous multi-source big data is provided
Device and method, the device and method can realize the efficient parallel processing to heterogeneous device big data.
The present invention solves its technical problem and following technical scheme is taken to realize:It is a kind of towards isomerous multi-source big data
Heterogeneous polynuclear parallel processing apparatus, including:
Isomerous multi-source big data parallel acquisition module based on FPGA,
1. being somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA has 10 kinds of data-interfaces, can realize to 10
The data acquisition of kind different agreement, and then realize and the data of distinct device are acquired, specific data-interface includes industrial
Ethernet interfaces, RS232 interface, asynchronous RS422 interfaces, asynchronous RS485 interfaces, synchronous RS485 interfaces, SPI interface, I2C
Interface, CAN interface, MTConnect interfaces and OPC UA Server interfaces;The isomerous multi-source big data based on FPGA is simultaneously
The data for the distinct device that row acquisition module arrives parallel acquisition are passed through HP ports in piece and are buffered in respectively in a manner of DMA
In different offset address and the outer DDR of the piece of size;
2. it is somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA to complete to DDR outside piece by design point machine
AXI interface encapsulations are realized and DDR outside piece are mounted in piece in AXI buses;
Parallel data processing module based on heterogeneous polynuclear,
1. 15 MicroBlaze cores are built in the parallel data processing module based on heterogeneous polynuclear, and with ARM cores
Heterogeneous polynuclear framework is formed, these cores are all mounted in piece in AXI buses, while are distinct device point in AXI buses in piece
With different memory address, the communication between core and core, between core and the outer DDR of piece is realized;
2. different MicroBlaze cores are responsible for handling different device datas, it is buffered in outside piece in DDR including reading
Data perform different Processing Algorithms, specially:MicroBlaze-1 cores are responsible for industrial Eternet data, MicroBlaze-
2 cores are responsible for RS232 data, MicroBlaze-3 cores are responsible for asynchronous RS422 data, MicroBlaze-4 cores are responsible for asynchronous RS485
Data, MicroBlaze-5 cores are responsible for synchronous RS485 data, MicroBlaze-6 cores are responsible for SPI data, MicroBlaze-7 cores
Be responsible for I2C data, MicroBlaze-8 cores are responsible for CAN data, MicroBlaze-9 cores are responsible for MTConnect data,
MicroBlaze-10 cores are responsible for OPC UA data;MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13
Core, MicroBlaze-14 cores, MicroBlaze-15 cores wouldn't perform any task as spare;
3. ARM cores complete the performance monitoring to multiple MicroBlaze cores, the different data processing algorithm of dynamic dispatching exists
Operation on multiple MicroBlaze cores, to ensure the load balancing of core, ARM cores are by monitoring each MicroBlaze cores and piece
The data exchange rate of interior AXI buses judges the processor resource utilization rate of each MicroBlaze cores, when any one
When the processor resource utilization rate of MicroBlaze cores is excessively high, the dynamic dispatching of ARM cores is temporarily not carried out any task
MicroBlaze cores share being performed on the MicroBlaze cores for task, are not carried out the MicroBlaze of any task here
Core not only include 2. in build MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13 cores,
MicroBlaze-14 cores, MicroBlaze-15 cores also include temporarily being not carried out remaining MicroBlaze core of any task.
A kind of heterogeneous polynuclear parallel processing apparatus towards isomerous multi-source big data that the present invention designs is public using Xilinx
ZYNQ-7000SoC chips are taken charge of to realize.
A kind of heterogeneous polynuclear method for parallel processing towards isomerous multi-source big data includes the following steps:
Step 1:Isomerous multi-source big data parallel acquisition module based on FPGA, is implemented as follows:
1. being somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA has 10 kinds of data-interfaces, can realize to 10
The data acquisition of kind different agreement, and then realize and the data of distinct device are acquired, specific data-interface includes industrial
Ethernet interfaces, RS232 interface, asynchronous RS422 interfaces, asynchronous RS485 interfaces, synchronous RS485 interfaces, SPI interface, I2C
Interface, CAN interface, MTConnect interfaces and OPC UA Server interfaces;The isomerous multi-source big data based on FPGA is simultaneously
The data for the distinct device that row acquisition module arrives parallel acquisition are passed through HP ports in piece and are buffered in respectively in a manner of DMA
In different offset address and the outer DDR of the piece of size;
2. it is somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA to complete to DDR outside piece by design point machine
AXI interface encapsulations are realized and DDR outside piece are mounted in piece in AXI buses;
Step 2:Parallel data processing module based on heterogeneous polynuclear, is implemented as follows:
1. 15 MicroBlaze cores are built in the parallel data processing module based on heterogeneous polynuclear, and with ARM cores
Heterogeneous polynuclear framework is formed, these cores are all mounted in piece in AXI buses, while are distinct device point in AXI buses in piece
With different memory address, the communication between core and core, between core and the outer DDR of piece is realized;
2. different MicroBlaze cores are responsible for handling different device datas, it is buffered in outside piece in DDR including reading
Data perform different Processing Algorithms, specially:MicroBlaze-1 cores are responsible for industrial Eternet data, MicroBlaze-
2 cores are responsible for RS232 data, MicroBlaze-3 cores are responsible for asynchronous RS422 data, MicroBlaze-4 cores are responsible for asynchronous RS485
Data, MicroBlaze-5 cores are responsible for synchronous RS485 data, MicroBlaze-6 cores are responsible for SPI data, MicroBlaze-7 cores
Be responsible for I2C data, MicroBlaze-8 cores are responsible for CAN data, MicroBlaze-9 cores are responsible for MTConnect data,
MicroBlaze-10 cores are responsible for OPC UA data;MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13
Core, MicroBlaze-14 cores, MicroBlaze-15 cores wouldn't perform any task as spare;
3. ARM cores complete the performance monitoring to multiple MicroBlaze cores, the different data processing algorithm of dynamic dispatching exists
Operation on multiple MicroBlaze cores, to ensure the load balancing of core, ARM cores are by monitoring each MicroBlaze cores and piece
The data exchange rate of interior AXI buses judges the processor resource utilization rate of each MicroBlaze cores, when any one
When the processor resource utilization rate of MicroBlaze cores is excessively high, the dynamic dispatching of ARM cores is temporarily not carried out any task
MicroBlaze cores share being performed on the MicroBlaze cores for task, are not carried out the MicroBlaze of any task here
Core not only include 2. in build MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13 cores,
MicroBlaze-14 cores, MicroBlaze-15 cores also include temporarily being not carried out remaining MicroBlaze core of any task.
A kind of heterogeneous polynuclear method for parallel processing towards isomerous multi-source big data that the present invention designs is public using Xilinx
ZYNQ-7000SoC chips are taken charge of to realize.
The advantages of the present invention over the prior art are that:
(1) it by the interconnection of AXI buses in piece, can reduce between each core and between each core and piece external equipment
Communication delay improves the real-time of isomeric data interaction;
(2) by building multiple MicroBlaze cores, each core performs different data processing tasks, can realize a variety of
The parallel processing of data, while the monitoring and dynamic dispatching to multiple MicroBlaze nuclearity energy based on ARM cores are different
Operation of the data processing algorithm on multiple MicroBlaze cores can realize data while each core load balancing is ensured
Process resource is distributed rationally, promotes the efficiency of isomerous multi-source big data parallel processing.
Description of the drawings
Fig. 1 is a kind of structure diagram of heterogeneous polynuclear parallel processing apparatus towards isomerous multi-source big data of the invention.
Specific embodiment
Further detailed description is done to the present invention below in conjunction with the accompanying drawings.
The present invention relates to a kind of heterogeneous polynuclear parallel processing apparatus and method towards isomerous multi-source big data, the device and
Method is realized using the ZYNQ-7000SoC chips of Xilinx companies, including the isomerous multi-source big data parallel acquisition based on FPGA
Module and the parallel data processing module based on heterogeneous polynuclear.Parallel acquisition, place for the live heterogeneous device big data of manufacture
Reason needs, and the present invention can promote the efficiency of isomerous multi-source big data parallel processing.
The structure diagram of the present invention is as shown in Figure 1, specific embodiment is as follows:
(1) 2 in Fig. 1 are the isomerous multi-source big data parallel acquisition modules based on FPGA, are implemented as follows:
1. being somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA has 10 kinds of data-interfaces, can realize to 10
The data acquisition of kind different agreement, and then realize and the data of distinct device are acquired, as shown in 1 in attached drawing 1:It can specifically adopt
The data-interface of collection includes industrial Eternet interface, RS232 interface, asynchronous RS422 interfaces, asynchronous RS485 interfaces, synchronization
RS485 interfaces, SPI interface, I2C interface, CAN interface, MTConnect interfaces and OPC UA Server interfaces;FPGA is called
DDR (attached drawings 1 outside the HP port transmissions to piece that collected isomeric data is passed through ZYNQ-7000SoC chip interiors by DMA IP kernels
In 4), these data are respectively stored in different offset address and size memory space;
2. since DDR device cannot be directly mounted in piece in AXI buses outside piece, so should the isomerous multi-source based on FPGA
Big data parallel acquisition module design state machine is packaged ddr interface outside piece, and the outer DDR of the piece after encapsulation can be assisted with AXI
View transmission data, also can serve as equipment and are mounted in piece in AXI buses;
(2) 3 in Fig. 1 are the parallel data processing modules based on heterogeneous polynuclear, are implemented as follows:
1. 15 MicroBlaze cores are built in the parallel data processing module based on heterogeneous polynuclear, and with ARM cores
Heterogeneous polynuclear framework is formed, these cores are all mounted in piece in AXI buses, while are distinct device point in AXI buses in piece
With different memory address, the communication between core and core, between core and the outer DDR of piece is realized;
2. different MicroBlaze cores are responsible for handling different device datas, it is buffered in outside piece in DDR including reading
Data perform different Processing Algorithms.Specially:MicroBlaze-1 cores are responsible for industrial Eternet data, MicroBlaze-
2 cores are responsible for RS232 data, MicroBlaze-3 cores are responsible for asynchronous RS422 data, MicroBlaze-4 cores are responsible for asynchronous RS485
Data, MicroBlaze-5 cores are responsible for synchronous RS485 data, MicroBlaze-6 cores are responsible for SPI data, MicroBlaze-7 cores
Be responsible for I2C data, MicroBlaze-8 cores are responsible for CAN data, MicroBlaze-9 cores are responsible for MTConnect data,
MicroBlaze-10 cores are responsible for OPC UA data;MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13
Core, MicroBlaze-14 cores, MicroBlaze-15 cores wouldn't perform any task as spare;
3. ARM cores complete the performance monitoring to multiple MicroBlaze cores, the different data processing algorithm of dynamic dispatching exists
Operation on multiple MicroBlaze cores, to ensure the load balancing of core.ARM cores are by monitoring each MicroBlaze cores and piece
The data exchange rate of interior AXI buses judges the processor resource utilization rate of each MicroBlaze cores:When one
MicroBlaze cores and the data exchange rate of AXI buses in piece are higher, illustrate the task that the MicroBlaze cores are carrying out
Data volume to be treated is bigger, then the processor resource utilization rate of the MicroBlaze cores will necessarily just increase, simultaneously
Using the maximum data exchange rate of AXI buses in piece as reference, it is possible to the processor money of the MicroBlaze cores be calculated
Source utilization rate.When the processor resource utilization rate of any one MicroBlaze core is excessively high, ARM core dynamic dispatchings do not have temporarily
The MicroBlaze cores of any task are performed to share being performed on the MicroBlaze cores for task.Here it is not carried out any
The MicroBlaze cores of business not only include 2. in build MicroBlaze-11 cores, MicroBlaze-12 cores,
MicroBlaze-13 cores, MicroBlaze-14 cores, MicroBlaze-15 cores also include temporarily being not carried out any task
Remaining MicroBlaze core:MicroBlaze-1 cores, MicroBlaze-2 cores, MicroBlaze-3 cores, MicroBlaze-4 cores,
MicroBlaze-5 cores, MicroBlaze-6 cores, MicroBlaze-7 cores, MicroBlaze-8 cores, MicroBlaze-9 cores,
MicroBlaze-10 cores.
In conclusion the invention discloses a kind of heterogeneous polynuclear parallel processing apparatus towards isomerous multi-source big data, packet
Include the isomerous multi-source big data parallel acquisition module based on FPGA and the parallel data processing module based on heterogeneous polynuclear.The present invention
The efficiency of isomerous multi-source big data parallel processing can be promoted, can effectively support intelligence manufacture upper strata decision.
The content not being described in detail in description of the invention belongs to the prior art well known to professional and technical personnel in the field.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should
It is considered as protection scope of the present invention.
Claims (4)
1. a kind of heterogeneous polynuclear parallel processing apparatus towards isomerous multi-source big data, it is characterised in that including:
Isomerous multi-source big data parallel acquisition module based on FPGA,
1. being somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA has 10 kinds of data-interfaces, can realize to 10 kinds not
Data with agreement acquire, and then realize and the data of distinct device are acquired, and specific data-interface connects including industrial Eternet
Mouth, RS232 interface, asynchronous RS422 interfaces, asynchronous RS485 interfaces, synchronous RS485 interfaces, SPI interface, I2C interface, CAN connect
Mouth, MTConnect interfaces and OPC UA Server interfaces;The isomerous multi-source big data parallel acquisition module based on FPGA
The data for the distinct device that parallel acquisition is arrived are passed through HP ports in piece and are buffered in different offset ground respectively in a manner of DMA
In the outer DDR of the piece of location and size;
2. it is somebody's turn to do AXI of the isomerous multi-source big data parallel acquisition module based on FPGA by the completion of design point machine to DDR outside piece
Interface encapsulation is realized and DDR outside piece is mounted in piece in AXI buses;
Parallel data processing module based on heterogeneous polynuclear,
1. building 15 MicroBlaze cores in the parallel data processing module based on heterogeneous polynuclear, and formed with ARM cores
Heterogeneous polynuclear framework, these cores are all mounted in piece in AXI buses, while for distinct device distribution in AXI buses in piece not
Same memory address realizes the communication between core and core, between core and the outer DDR of piece;
2. different MicroBlaze cores are responsible for handling different device datas, including reading the data being buffered in outside piece in DDR,
Different Processing Algorithms is performed, specially:MicroBlaze-1 cores are responsible for industrial Eternet data, MicroBlaze-2 cores are born
Blame RS232 data, MicroBlaze-3 cores are responsible for asynchronous RS422 data, MicroBlaze-4 cores are responsible for asynchronous RS485 data,
MicroBlaze-5 cores are responsible for that synchronous RS485 data, MicroBlaze-6 cores are responsible for SPI data, MicroBlaze-7 cores are responsible for
I2C data, MicroBlaze-8 cores are responsible for CAN data, MicroBlaze-9 cores are responsible for MTConnect data, MicroBlaze-
10 cores are responsible for OPC UA data;MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13 cores,
MicroBlaze-14 cores, MicroBlaze-15 cores wouldn't perform any task as spare;
3. ARM cores complete the performance monitoring to multiple MicroBlaze cores, the different data processing algorithm of dynamic dispatching is multiple
Operation on MicroBlaze cores, to ensure the load balancing of core, ARM cores are by monitoring in each MicroBlaze cores and piece
The data exchange rate of AXI buses judges the processor resource utilization rate of each MicroBlaze cores, when any one
When the processor resource utilization rate of MicroBlaze cores is excessively high, the dynamic dispatching of ARM cores is temporarily not carried out any task
MicroBlaze cores share being performed on the MicroBlaze cores for task, are not carried out the MicroBlaze of any task here
Core not only include 2. in build MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13 cores,
MicroBlaze-14 cores, MicroBlaze-15 cores also include temporarily being not carried out remaining MicroBlaze core of any task.
2. a kind of heterogeneous polynuclear parallel processing apparatus towards isomerous multi-source big data as described in claim 1, feature exist
In:The device is realized using the ZYNQ-7000SoC chips of Xilinx companies.
3. a kind of heterogeneous polynuclear method for parallel processing towards isomerous multi-source big data, it is characterised in that:Include the following steps:
Step 1:Isomerous multi-source big data parallel acquisition module based on FPGA, is implemented as follows:
1. being somebody's turn to do the isomerous multi-source big data parallel acquisition module based on FPGA has 10 kinds of data-interfaces, can realize to 10 kinds not
Data with agreement acquire, and then realize and the data of distinct device are acquired, and specific data-interface connects including industrial Eternet
Mouth, RS232 interface, asynchronous RS422 interfaces, asynchronous RS485 interfaces, synchronous RS485 interfaces, SPI interface, I2C interface, CAN connect
Mouth, MTConnect interfaces and OPC UA Server interfaces;The isomerous multi-source big data parallel acquisition module based on FPGA
The data for the distinct device that parallel acquisition is arrived are passed through HP ports in piece and are buffered in different offset ground respectively in a manner of DMA
In the outer DDR of the piece of location and size;
2. it is somebody's turn to do AXI of the isomerous multi-source big data parallel acquisition module based on FPGA by the completion of design point machine to DDR outside piece
Interface encapsulation is realized and DDR outside piece is mounted in piece in AXI buses;
Step 2:Parallel data processing module based on heterogeneous polynuclear, is implemented as follows:
1. building 15 MicroBlaze cores in the parallel data processing module based on heterogeneous polynuclear, and formed with ARM cores
Heterogeneous polynuclear framework, these cores are all mounted in piece in AXI buses, while for distinct device distribution in AXI buses in piece not
Same memory address realizes the communication between core and core, between core and the outer DDR of piece;
2. different MicroBlaze cores are responsible for handling different device datas, including reading the data being buffered in outside piece in DDR,
Different Processing Algorithms is performed, specially:MicroBlaze-1 cores are responsible for industrial Eternet data, MicroBlaze-2 cores are born
Blame RS232 data, MicroBlaze-3 cores are responsible for asynchronous RS422 data, MicroBlaze-4 cores are responsible for asynchronous RS485 data,
MicroBlaze-5 cores are responsible for that synchronous RS485 data, MicroBlaze-6 cores are responsible for SPI data, MicroBlaze-7 cores are responsible for
I2C data, MicroBlaze-8 cores are responsible for CAN data, MicroBlaze-9 cores are responsible for MTConnect data, MicroBlaze-
10 cores are responsible for OPC UA data;MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13 cores,
MicroBlaze-14 cores, MicroBlaze-15 cores wouldn't perform any task as spare;
3. ARM cores complete the performance monitoring to multiple MicroBlaze cores, the different data processing algorithm of dynamic dispatching is multiple
Operation on MicroBlaze cores, to ensure the load balancing of core, ARM cores are by monitoring in each MicroBlaze cores and piece
The data exchange rate of AXI buses judges the processor resource utilization rate of each MicroBlaze cores, when any one
When the processor resource utilization rate of MicroBlaze cores is excessively high, the dynamic dispatching of ARM cores is temporarily not carried out any task
MicroBlaze cores share being performed on the MicroBlaze cores for task, are not carried out the MicroBlaze of any task here
Core not only include 2. in build MicroBlaze-11 cores, MicroBlaze-12 cores, MicroBlaze-13 cores,
MicroBlaze-14 cores, MicroBlaze-15 cores also include temporarily being not carried out remaining MicroBlaze core of any task.
4. a kind of heterogeneous polynuclear method for parallel processing towards isomerous multi-source big data as claimed in claim 3, feature exist
In:The method is realized using the ZYNQ-7000SoC chips of Xilinx companies.
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