CN108110058A - 一种非对称mosfet器件及其制备方法 - Google Patents
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Abstract
本发明涉及一种非对称MOSFET器件及其制备方法,其包括半导体基板和位于半导体基板中心区的元胞区;所述元胞区的元胞沟槽位于相邻第二导电类型柱之间,所述第二导电类型柱从所述第一导电类型外延层的顶部垂直向下延伸,所述元胞沟槽内设置有绝缘氧化层,所述绝缘氧化层覆盖元胞沟槽的侧壁和底壁,还覆盖在元胞沟槽槽口外侧的第一导电类型外延层上;所述元胞沟槽内填充有导电多晶硅,所述导电多晶硅覆盖在元胞沟槽槽口外的绝缘氧化层上。采用这种非对称结构后,左边元胞结构可以改变雪崩时电流的流经通道,使得MOSFET器件关断时规避第一导电类型外延层的电阻,避免NPN管开启,从而提高雪崩耐量;而右边的元胞结构又可以保证导通电阻不会太小。
Description
技术领域
本发明涉及一种MOSFET器件,尤其是一种非对称MOSFET器件及其制备方法,属于半导体器件的技术领域。
背景技术
目前,现有的普通N型MOSFET器件包括N+型衬底、N-型外延层(N-epi)、栅氧化层、多晶硅栅极(Poly Gate)、P型体区(Pbody);要想降低MOSFET器件的导通电阻,必须将元胞密度做大,但是元胞密度越大,电流密度越大,雪崩耐量能力就越弱。这两个参数是互相影响的。
发明内容
本发明的目的是克服现有技术中存在的不足,提供一种非对称MOSFET器件及其制备方法,其结构紧凑,能有效降低通道电阻,提高雪崩耐量,安全可靠。
本发明提供采用的技术方案是:一种非对称MOSFET器件,包括半导体基板和位于半导体基板中心区的元胞区,所述半导体基板包括第一导电类型衬底和位于第一导电类型衬底上方的第一导电类型外延层;其特征在于:所述元胞区的元胞沟槽位于相邻第二导电类型柱之间,所述第二导电类型柱从所述第一导电类型外延层的顶部垂直向下延伸;所述元胞沟槽的深度小于第二导电类型柱在第一导电类型外延层内的深度;所述元胞沟槽的侧壁外上方设置第二导电类型基区,所述第二导电类型基区与元胞沟槽的侧壁以及相应的第二导电类型柱接触;在第二导电类型基区内设置第一导电类型源区;所述元胞沟槽内设置有绝缘氧化层,所述绝缘氧化层覆盖元胞沟槽的侧壁和底壁,还覆盖在元胞沟槽槽口外侧的第一导电类型外延层上;所述元胞沟槽内填充有导电多晶硅,所述导电多晶硅覆盖在元胞沟槽槽口外的绝缘氧化层上;所述第一导电类型外延层上设置有金属层,所述金属层包括源极金属和栅极金属,所述源极金属与第一导电类型源区、第二导电类型基区和第二导电类型柱欧姆接触,通过绝缘介质层与导电多晶硅绝缘隔离,并填充在接触孔内;所述栅极金属与导电多晶硅欧姆接触;所述绝缘介质层覆盖在第一导电类型外延层以及导电多晶硅上;所述接触孔贯通所述绝缘介质层,对准第二导电类型柱、第二导电类型基区和第一导电类型源区。
进一步地,所述绝缘氧化层与第二导电类型基区内的第一导电类型源区部分交叠。
进一步地,左边的元胞多晶硅延伸到硅表面,右边的元胞多晶硅没有到硅表面。
进一步地,所述半导体基板的材料包括硅。
进一步地,所述第一导电类型衬底的背面设置有漏电极结构。
进一步地,所述元胞沟槽的宽度小于相邻第二导电类型柱间的距离。
进一步地,所述的一种非对称MOSFET器件的制备方法,主要步骤如下:
步骤1,对第一导电类型外延层进行选择性地掩蔽和刻蚀;
步骤2,在元胞沟槽内生长绝缘氧化层;
步骤3,在元胞沟槽内进行导电多晶硅材料的淀积;
步骤4,在元胞沟槽内进行导电多晶硅材料的选择性刻蚀;
步骤5,在所述第一导电类型外延层上方进行第二导电类型杂质离子的注入,扩散后得到第二导电类型基区;
步骤6,在所述第一导电类型外延层上方进行第一导电类型杂质离子的注入,扩散后在第二导电类型基区内形成第一导电类型源区;
步骤7,在所述第一导电类型外延层上设置绝缘介质层,并对绝缘介质层进行刻蚀,得到贯通绝缘介质层的接触孔和绝缘氧化层;
步骤8,在所述第一导电类型外延层上方淀积金属层。
本发明具有以下有益效果:第二导电类型柱与第一导电类型外延层能形成超结结构,在相邻的第二导电类型柱间设置元胞沟槽,元胞沟槽内设置绝缘氧化层以及导电多晶硅,利用超级结构以及沟槽栅结构能有效降低导通电阻;绝缘氧化层覆盖元胞沟槽槽口外的第一导电类型外延层,导电多晶硅同时覆盖在元胞沟槽槽口外的绝缘氧化层上,利用元胞沟槽槽口外的绝缘氧化层以及导电多晶硅可以提高雪崩耐量,结构紧凑,安全可靠。
附图说明
附图为N型功率MOSFET器件,所述“第一导电类型”和“第二导电类型”两者中,对于N型功率MOSFET器件,第一导电类型指N型,第二导电类型为P型;对于P型功率MOSFET器件,第一导电类型与第二导电类型所指的类型与N型半导体器件正好相反。
图1为本发明的结构示意图。
图2-图9为本发明具体实施工艺步骤剖视图;其中:图2为本发明得到元胞沟槽的剖视图;图3为本发明得到元胞沟槽内绝缘氧化材料层后的剖视图;图4为本发明得到元胞沟槽内导电多晶硅材料的淀积后的剖视图;图5为本发明得到多晶硅材料的刻蚀后的剖视图;图6为本发明得到第二导电类型基区的剖视图;图7为本发明得到第一导电类型源区后的剖视图;图8为本发明对绝缘介质层刻蚀得到接触孔后的剖视图;图9为本发明得到源极金属后的剖视图。
图中:1第一导电类型衬底、2第一导电类型外延层、3绝缘氧化层、4导电多晶硅、5第二导电类型基区、6第一导电类型源区、7绝缘介质层、8源极金属。
具体实施方式
下面结合具体附图和实施例对本发明作进一步说明。
如图1所示,本发明提出的一种非对称MOSFET器件,包括半导体基板和位于半导体基板中心区的元胞区,所述半导体基板包括第一导电类型衬底和位于第一导电类型衬底上方的第一导电类型外延层;其特征在于:所述元胞区的元胞沟槽位于相邻第二导电类型柱之间,所述第二导电类型柱从所述第一导电类型外延层的顶部垂直向下延伸;所述元胞沟槽的深度小于第二导电类型柱在第一导电类型外延层内的深度;所述元胞沟槽的侧壁外上方设置第二导电类型基区,所述第二导电类型基区与元胞沟槽的侧壁以及相应的第二导电类型柱接触;在第二导电类型基区内设置第一导电类型源区;所述元胞沟槽内设置有绝缘氧化层,所述绝缘氧化层覆盖元胞沟槽的侧壁和底壁,还覆盖在元胞沟槽槽口外侧的第一导电类型外延层上;所述元胞沟槽内填充有导电多晶硅,所述导电多晶硅覆盖在元胞沟槽槽口外的绝缘氧化层上;所述第一导电类型外延层上设置有金属层,所述金属层包括源极金属和栅极金属,所述源极金属与第一导电类型源区、第二导电类型基区和第二导电类型柱欧姆接触,通过绝缘介质层与导电多晶硅绝缘隔离,并填充在接触孔内;所述栅极金属与导电多晶硅欧姆接触;所述绝缘介质层覆盖在第一导电类型外延层以及导电多晶硅上;所述接触孔贯通所述绝缘介质层,对准第二导电类型柱、第二导电类型基区和第一导电类型源区。
所述绝缘氧化层与第二导电类型基区内的第一导电类型源区部分交叠。
左边的元胞多晶硅延伸到硅表面,右边的元胞多晶硅没有到硅表面。
所述半导体基板的材料包括硅。
所述第一导电类型衬底的背面设置有漏电极结构。
所述元胞沟槽的宽度小于相邻第二导电类型柱间的距离。
所述的一种非对称MOSFET器件的制备方法,主要步骤如下:
步骤1,对第一导电类型外延层进行选择性地掩蔽和刻蚀,以在相邻的第二导电类型柱间得到所需的元胞沟槽,如图2;
步骤2,在元胞沟槽内生长绝缘氧化层,如图3;
步骤3,在元胞沟槽内进行导电多晶硅材料的淀积,以得到填满元胞沟槽及表面一层的导电多晶硅,如图4;
步骤4,在元胞沟槽内进行导电多晶硅材料的选择性刻蚀,以得到如图5所示的形貌;
步骤5,在所述第一导电类型外延层上方进行第二导电类型杂质离子的注入,扩散后得到第二导电类型基区,如图6;
步骤6,在所述第一导电类型外延层上方进行第一导电类型杂质离子的注入,扩散后在第二导电类型基区内形成第一导电类型源区,如图7;
步骤7,在所述第一导电类型外延层上设置绝缘介质层,并对绝缘介质层进行刻蚀,得到贯通绝缘介质层的接触孔和绝缘氧化层,如图8;
步骤8,在所述第一导电类型外延层上方淀积金属层,如图9。
采用这种非对称结构后,左边元胞结构可以改变雪崩时电流的流经通道,使得MOSFET器件关断时规避第一导电类型外延层的电阻,避免NPN管开启,从而提高雪崩耐量;而右边的元胞结构又可以保证导通电阻不会太小。
此外,在所述第一导电类型衬底的背面设置的漏电极结构的具体形式以及栅极金属与导电多晶硅间的具体配合等均为本技术领域人员所熟知,此处不再赘述。
本发明还可有其它实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员当可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。比如,参照本实施例,将各区或部位的材料导电类型做N<—>P的互换所形成之MOSFET器件,应该理解为本发明所附权利要求的等同技术方案。
Claims (7)
1.一种非对称MOSFET器件,包括半导体基板和位于半导体基板中心区的元胞区,所述半导体基板包括第一导电类型衬底和位于第一导电类型衬底上方的第一导电类型外延层;其特征在于:所述元胞区的元胞沟槽位于相邻第二导电类型柱之间,所述第二导电类型柱从所述第一导电类型外延层的顶部垂直向下延伸;所述元胞沟槽的深度小于第二导电类型柱在第一导电类型外延层内的深度;所述元胞沟槽的侧壁外上方设置第二导电类型基区,所述第二导电类型基区与元胞沟槽的侧壁以及相应的第二导电类型柱接触;在第二导电类型基区内设置第一导电类型源区;所述元胞沟槽内设置有绝缘氧化层,所述绝缘氧化层覆盖元胞沟槽的侧壁和底壁,还覆盖在元胞沟槽槽口外侧的第一导电类型外延层上;所述元胞沟槽内填充有导电多晶硅,所述导电多晶硅覆盖在元胞沟槽槽口外的绝缘氧化层上;所述第一导电类型外延层上设置有金属层,所述金属层包括源极金属和栅极金属,所述源极金属与第一导电类型源区、第二导电类型基区和第二导电类型柱欧姆接触,通过绝缘介质层与导电多晶硅绝缘隔离,并填充在接触孔内;所述栅极金属与导电多晶硅欧姆接触;所述绝缘介质层覆盖在第一导电类型外延层以及导电多晶硅上;所述接触孔贯通所述绝缘介质层,对准第二导电类型柱、第二导电类型基区和第一导电类型源区。
2.根据权利要求1所述的一种非对称MOSFET器件,其特征在于:所述绝缘氧化层与第二导电类型基区内的第一导电类型源区部分交叠。
3.根据权利要求1所述的一种非对称MOSFET器件,其特征在于:左边的元胞多晶硅延伸到硅表面,右边的元胞多晶硅没有到硅表面。
4.根据权利要求1所述的一种非对称MOSFET器件,其特征在于:所述半导体基板的材料包括硅。
5.根据权利要求1所述的一种非对称MOSFET器件,其特征在于:所述第一导电类型衬底的背面设置有漏电极结构。
6.根据权利要求1所述的一种非对称MOSFET器件,其特征在于:所述元胞沟槽的宽度小于相邻第二导电类型柱间的距离。
7.根据权利要求1至7所述的一种非对称MOSFET器件的制备方法,主要步骤如下:
步骤1,对第一导电类型外延层进行选择性地掩蔽和刻蚀;
步骤2,在元胞沟槽内生长绝缘氧化层;
步骤3,在元胞沟槽内进行导电多晶硅材料的淀积;
步骤4,在元胞沟槽内进行导电多晶硅材料的选择性刻蚀;
步骤5,在所述第一导电类型外延层上方进行第二导电类型杂质离子的注入,扩散后得到第二导电类型基区;
步骤6,在所述第一导电类型外延层上方进行第一导电类型杂质离子的注入,扩散后在第二导电类型基区内形成第一导电类型源区;
步骤7,在所述第一导电类型外延层上设置绝缘介质层,并对绝缘介质层进行刻蚀,得到贯通绝缘介质层的接触孔和绝缘氧化层;
步骤8,在所述第一导电类型外延层上方淀积金属层。
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