CN108110057A - Super-junction metal oxide field effect transistor - Google Patents

Super-junction metal oxide field effect transistor Download PDF

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Publication number
CN108110057A
CN108110057A CN201711328190.XA CN201711328190A CN108110057A CN 108110057 A CN108110057 A CN 108110057A CN 201711328190 A CN201711328190 A CN 201711328190A CN 108110057 A CN108110057 A CN 108110057A
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type
doped zone
super
metal oxide
doped
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CN201711328190.XA
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CN108110057B (en
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不公告发明人
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Shenzhen Hongguang Shengye Electronics Co ltd
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Shenzhen City Tezhi Made Crystal Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures

Abstract

The present invention provides a kind of super-junction metal oxide field effect transistor.The transistor is divided into active region and the resistance to intermediate pressure section positioned at active region periphery, the pressure-resistant region division is adjacent to the transitional region of the active region and positioned at the terminal area of transitional region periphery, the transistor further includes N-type substrate, N-type epitaxy layer in the N-type substrate, p-type positioned at the N-type epitaxy layer surface of the resistance to intermediate pressure section adulterates knot, the connection p-type doping knot bottom and the first P-doped zone extended towards the N-type substrate in the N-type epitaxy layer of the transitional region, the second P-doped zone along the direction extension parallel to the N-type substrate in the N-type epitaxy layer of the p-type doping side of forging of the terminal area.

Description

Super-junction metal oxide field effect transistor
【Technical field】
The present invention relates to technical field of semiconductor device, particularly, are related to a kind of super-junction metal oxide field effect crystal Pipe.
【Background technology】
Super-junction metal oxide field effect transistor is a kind of insulated gate knot with metal oxide semiconductor transistor Structure advantage has the advantages that the new device of high current density low on-resistance simultaneously, it is a kind of to be used to effectively reduce tradition The power semiconductor of the conduction loss of power metal oxide semiconductor field-effect transistor.It is former based on charge balance The charge compensation device of reason.
The basic characteristics of super-junction metal oxide field effect transistor are that it is made of the region for being spaced N- and P- doping Drift region is pressure-resistant to realize.Conventional high-tension MOS memory device is main when bearing high back voltage It exhausts to realize by the longitudinal direction of PN junction pressure-resistant, is present with maximum field strength in the PN junction intersection of entire device.And superjunction MOS memory due to introducing charge compensation mechanism, inside when exhausting pressure-resistant, electric field be distributed more Uniformly, compared with the triangle peak electric field distribution of conventional high-tension MOS memory device, superjunction metal oxygen Compound field-effect transistor internal electric field is distributed rectangular in the pressure-resistant direction in longitudinal direction.Its entire device is made to exhaust pressure-resistant process In, do not occur respective electrical fields peak value.Since Vertical Square is inserted upwardly into p type island region, excessive current lead-through charge can be compensated.It is floating It moves layer and adds reverse bias voltage, a transverse electric field will be generated, exhaust PN junction.When voltage reaches certain value, drift layer is complete Fully- depleted will play the role of voltage support layer.Device can be made high in the pressure-resistant of vertical direction.However, device breakdown Terminal is usually happened at, for traditional power device terminal, can be come in the drift layer of body silicon inner utilization low concentration Ensure resistance to voltage levels, but due to the special active region structure of superjunction devices (also referred to as structure cell), the concentration of drift region compared with Height, the thickness of drift layer is also smaller, and the terminal structure of common high voltage power device is not suitable for super-junction structure device, therefore, such as The performance (such as pressure-resistant performance) what improves the terminal area of super-junction structure device becomes a major issue.
【The content of the invention】
One of purpose of the present invention is to provide a kind of super-junction metal oxide field effect in order to solve the above problem Transistor.
A kind of super-junction metal oxide transistor is divided into active region and the resistance to pressure area positioned at active region periphery Domain, the pressure-resistant region division is adjacent to the transitional region of the active region and positioned at the termination environment of transitional region periphery Domain, the transistor further include N-type substrate, the N-type epitaxy layer in the N-type substrate, the N-type positioned at the resistance to intermediate pressure section The p-type doping knot of epi-layer surface, the p-type of the connection in the N-type epitaxy layer of transitional region doping knot bottom and The first P-doped zone, the N-type epitaxy layer positioned at the p-type doping side of forging of the terminal area extended towards the N-type substrate In along parallel to the N-type substrate direction extension the second P-doped zone.
In one embodiment, the quantity of first P-doped zone is multiple, the multiple first P-doped zone It is all connected with the p-type doping knot.
In one embodiment, the p-type ion concentration of the multiple first P-doped zone is along away from the active area The direction in domain is gradually reduced.
In one embodiment, in the multiple first P-doped zone, the spacing of two neighboring first P-doped zone Gradually increase along the direction away from the active region.
In one embodiment, the active region includes the 3rd P-doped zone, adjacent to the first of the active region The p-type ion concentration of P-doped zone is more than the p-type ion concentration of the 3rd P-doped zone.
In one embodiment, the quantity of second P-doped zone is multiple, the multiple second P-doped zone Extend along the direction parallel to the P type substrate, and the development length of the multiple second P-doped zone is along away from described The direction of p-type doping knot is gradually reduced.
In one embodiment, longest second P-doped zone of development length in the multiple second P-doped zone The concentration of p-type ion is less than the p-type of the first P-doped zone of the p-type ion concentration minimum in the multiple first P-doped zone Ion concentration.
In one embodiment, the p-type ion concentration of the multiple second P-doped zone is equal, and the multiple In two P-doped zones, the spacing of two the second P-doped zones of arbitrary neighborhood is equal.
In one embodiment, the p-type ion concentration of the multiple second P-doped zone is mixed along away from the p-type The direction of miscellaneous knot continuously decreases, and in the multiple second P-doped zone, the spacing of two neighboring second P-doped zone along Direction away from p-type doping knot gradually increases.
In one embodiment, the transistor further includes the heavy oxygen layer for being arranged at the p-type doping side of tying, described Heavy oxygen layer extends to the neighbouring active area of the transitional region from the edge of the resistance to intermediate pressure section away from the active region The one side edge close to the terminal area in the first P-doped zone domain in domain.
Compared to the prior art, super-junction metal oxide field effect transistor of the present invention, will be resistance on the basis of traditional structure Intermediate pressure section is divided into two parts:Transitional region and resistance to intermediate pressure section, be respectively provided with longitudinal direction it is pressure-resistant and laterally it is pressure-resistant, specifically, transition Region is longitudinal pressure-resistance structure, the transverse P-type column of terminal area, and N-type column is alternately arranged, and constitutes horizontal pressure-resistance structure, so as to Improve the pressure-resistant performance of the super-junction metal oxide field effect transistor.
【Description of the drawings】
To describe the technical solutions in the embodiments of the present invention more clearly, used in being described below to embodiment Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, for ability For the those of ordinary skill of domain, without creative efforts, it can also be obtained according to these attached drawings other attached Figure, wherein:
Fig. 1 is the cross-section structure signal of the super-junction metal oxide field effect transistor of a better embodiment of the invention Figure.
【Specific embodiment】
The technical solution in the embodiment of the present invention will be clearly and completely described below, it is clear that described implementation Example is only the part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, this field is common All other embodiment that technical staff is obtained without making creative work belongs to the model that the present invention protects It encloses.
Referring to Fig. 1, Fig. 1 is the section of the super-junction metal oxide field effect transistor of a better embodiment of the invention Structure diagram.The super-junction metal oxide field effect transistor is divided into active region and positioned at the resistance to of active region periphery Intermediate pressure section, transitional region of the pressure-resistant region division adjacent to the active region and the terminal positioned at transitional region periphery Region, the transistor further include N-type substrate, the N-type epitaxy layer in the N-type substrate, the N positioned at the resistance to intermediate pressure section The p-type doping knot of type epi-layer surface, the p-type doping knot bottom of the connection in the N-type epitaxy layer of the transitional region And the first P-doped zone, the N-type extension positioned at the p-type doping side of forging of the terminal area extended towards the N-type substrate In layer along the direction extension parallel to the N-type substrate the second P-doped zone, be arranged at the p-type and adulterate the side of tying Heavy oxygen layer, positioned at the PXing Ti areas of the active region, polysilicon and the silicon oxide layer being stacked with the polysilicon.
Wherein, first P-doped zone, second P-doped zone and the 3rd P-doped zone can be P Type highly doped regions.The p-type doping knot and the PXing Ti areas can be p-type low doped region.The p-type body surface may be used also With with N-doped zone.
Further, in present embodiment, the quantity of first P-doped zone is multiple, and the multiple first p-type is mixed Miscellaneous area is all connected with the p-type doping knot.The p-type ion concentration of the multiple first P-doped zone is along away from the active area The direction in domain is gradually reduced.The spacing of two neighboring first P-doped zone gradually increases along the direction away from the active region. The active region can include the 3rd P-doped zone, and the p-type ion of the first P-doped zone of the neighbouring active region is dense Degree is more than the p-type ion concentration of the 3rd P-doped zone.
Further, the quantity of second P-doped zone is multiple that the multiple second P-doped zone is along flat Row extends in the direction of the P type substrate, and the development length of the multiple second P-doped zone is mixed along away from the p-type The direction of miscellaneous knot is gradually reduced.
In one embodiment, in the multiple second P-doped zone longest second P-doped zone of development length P The concentration of type ion is less than the p-type of the first P-doped zone of the p-type ion concentration minimum in the multiple first P-doped zone Ion concentration.
In one embodiment, the p-type ion concentration of the multiple second P-doped zone is equal, and the multiple 2nd P In type doped region, the spacing of two the second P-doped zones of arbitrary neighborhood is equal.
In one embodiment, the p-type ion concentration of the multiple second P-doped zone is adulterated along away from the p-type The direction of knot continuously decreases, and in the multiple second P-doped zone, and the spacing of two neighboring second P-doped zone is along remote Direction from p-type doping knot gradually increases.
In addition, the heavy oxygen layer extends to the transitional region from the edge of the resistance to intermediate pressure section away from the active region The neighbouring active region the first P-doped zone domain the one side edge close to the terminal area.
Super-junction metal oxide field effect transistor of the present invention is divided into two portions on the basis of traditional structure, by resistance to intermediate pressure section Point:Transitional region and resistance to intermediate pressure section, are respectively provided with that longitudinal direction is pressure-resistant and laterally pressure-resistant, and specifically, transitional region is the pressure-resistant knot in longitudinal direction Structure, the transverse P-type column of terminal area, N-type column are alternately arranged, and constitute horizontal pressure-resistance structure, so as to improve the superjunction metal The pressure-resistant performance of oxide field-effect transistor.Meanwhile such structure has taken into account the manufacturing process of traditional superjunction devices, Ke Yitong The mode crossed multiple extension and injected forms the pressure-resistant and horizontal pressure-resistance structure in the longitudinal direction, will not increase additional manufacture cost.
Specifically, for the transitional region, using the first P-doped zone being vertically arranged, the first p-type doping The pressure-resistant demand of the visual device of number in area determines that pressure-resistant demand is higher, and the first P-doped zone number is more described in P.Optionally, (left side is device active region domain direction to the concentration of the p-type ion of first P-doped zone, and right side is whole for device from left to right End regions direction) it can continuously decrease.The p-type ion concentration of the first P-doped zone of the leftmost side is higher than in the domain of device active region The concentration of three P-doped zones.Further, the spacing of the first P-doped zone can gradually increase from left to right in transitional region, more Good mitigation longitudinal electric field reduces electric field strength in the body of terminal area.
For the terminal area, using the second transversely arranged P-doped zone, the second P-doped zone is grown from the top down Degree gradually shortens, and the pressure-resistant demand of the second P-doped zone length visual organ part of the top determines that pressure-resistant demand is higher, the second p-type Adulterating section length should be longer.Meanwhile the concentration of the p-type ion of the second P-doped zone of the top, it is most right to be less than transitional region The p-type ion concentration of the first P-doped zone of side.Internal voltage point caused by preventing transitional region and terminal area concentration mismatch Peak.Further, transversely arranged multiple the second P-doped zones of p-type column, the concentration of p-type ion can be consistent, if p-type The concentration of ion is consistent, then the spacing of the second horizontal P-doped zone also must be consistent, prevents charge mismatch.Optionally, laterally Multiple second P-doped zones of arrangement, the concentration of p-type ion can continuously decrease from up to down, then spacing is gradual from up to down Increase.
In addition, knot covering is adulterated in entire terminal (including transitional region and terminal area) surface by p-type, substantially reduce Surface leakage when device is reverse-biased, improves device performance.The p-type doping side of tying is provided with heavy oxygen layer, prevents extraneous electricity Influence of the lotus to terminal end surface, at the same also can the influence of blocking device other technical process to terminal, improve the stability of terminal.
In addition, super-junction metal oxide field effect transistor using the above structure, the terminal of device can be substantially reduced Size reduces device cost.Meanwhile terminal steady can be improved, it is pressure-resistant to promote device.
Above-described is only embodiments of the present invention, it should be noted here that for those of ordinary skill in the art For, without departing from the concept of the premise of the invention, improvement can also be made, but these belong to the protection model of the present invention It encloses.

Claims (10)

1. a kind of super-junction metal oxide transistor, it is characterised in that:The transistor is divided into active region and positioned at active The resistance to intermediate pressure section of area periphery, the pressure-resistant region division is adjacent to the transitional region of the active region and positioned at the transition region The overseas terminal area enclosed, the transistor further include N-type substrate, the N-type epitaxy layer in the N-type substrate, positioned at institute State p-type doping knot, the P of the connection in the N-type epitaxy layer of the transitional region on the N-type epitaxy layer surface of resistance to intermediate pressure section Type doping knot bottom and the first P-doped zone towards N-type substrate extension, the p-type doping knot positioned at the terminal area The second P-doped zone along the direction extension parallel to the N-type substrate in the N-type epitaxy layer of lower section.
2. super-junction metal oxide transistor as described in claim 1, it is characterised in that:The number of first P-doped zone It measures to be multiple, the multiple first P-doped zone is all connected with the p-type doping knot.
3. super-junction metal oxide transistor as claimed in claim 2, it is characterised in that:The multiple first P-doped zone P-type ion concentration be gradually reduced along away from the direction of the active region.
4. super-junction metal oxide transistor as claimed in claim 2, it is characterised in that:The multiple first P-doped zone In, the spacing of two neighboring first P-doped zone gradually increases along the direction away from the active region.
5. super-junction metal oxide transistor as claimed in claim 2, it is characterised in that:The active region includes the 3rd P Type doped region, the p-type ion concentration of the first P-doped zone of the neighbouring active region are more than the P of the 3rd P-doped zone Type ion concentration.
6. super-junction metal oxide transistor as claimed in claim 2, it is characterised in that:The number of second P-doped zone It measures to be multiple, the multiple second P-doped zone extends along the direction parallel to the P type substrate, and the multiple 2nd P The development length of type doped region is gradually reduced along the direction away from p-type doping knot.
7. super-junction metal oxide transistor as claimed in claim 6, it is characterised in that:The multiple second P-doped zone The concentration of the p-type ion of middle longest second P-doped zone of development length is less than the p-type in the multiple first P-doped zone The p-type ion concentration of first P-doped zone of ion concentration minimum.
8. super-junction metal oxide transistor as claimed in claim 6, it is characterised in that:The multiple second P-doped zone P-type ion concentration it is equal, and in the multiple second P-doped zone, the spacing phase of two the second P-doped zones of arbitrary neighborhood Deng.
9. super-junction metal oxide transistor as claimed in claim 6, it is characterised in that:The multiple second P-doped zone P-type ion concentration continuously decreased along the direction away from p-type doping knot, and in the multiple second P-doped zone, phase The spacing of adjacent two the second P-doped zones gradually increases along the direction away from p-type doping knot.
10. super-junction metal oxide transistor as described in claim 1, it is characterised in that:The transistor further includes setting Heavy oxygen layer in the p-type doping side of tying, the heavy oxygen layer prolong from the edge of the resistance to intermediate pressure section away from the active region Extend a side close to the terminal area in the first P-doped zone domain of the neighbouring active region of the transitional region Edge.
CN201711328190.XA 2017-12-13 2017-12-13 Super junction metal oxide field effect transistor Active CN108110057B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112687729A (en) * 2021-03-17 2021-04-20 中芯集成电路制造(绍兴)有限公司 Terminal structure of power device
CN113078206A (en) * 2021-03-30 2021-07-06 电子科技大学 Power semiconductor device
CN114050182A (en) * 2022-01-17 2022-02-15 深圳市创芯微微电子有限公司 Super junction power device and terminal structure and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002076017A (en) * 2000-08-28 2002-03-15 Fuji Electric Co Ltd Semiconductor device
CN101510561A (en) * 2009-03-30 2009-08-19 东南大学 Ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube
CN104009072A (en) * 2013-02-25 2014-08-27 中国科学院微电子研究所 Insulated gate bipolar transistor and manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002076017A (en) * 2000-08-28 2002-03-15 Fuji Electric Co Ltd Semiconductor device
CN101510561A (en) * 2009-03-30 2009-08-19 东南大学 Ultra-junction longitudinal bilateral diffusion metal oxide semiconductor tube
CN104009072A (en) * 2013-02-25 2014-08-27 中国科学院微电子研究所 Insulated gate bipolar transistor and manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112687729A (en) * 2021-03-17 2021-04-20 中芯集成电路制造(绍兴)有限公司 Terminal structure of power device
CN113078206A (en) * 2021-03-30 2021-07-06 电子科技大学 Power semiconductor device
CN114050182A (en) * 2022-01-17 2022-02-15 深圳市创芯微微电子有限公司 Super junction power device and terminal structure and manufacturing method thereof

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