CN108081118B - Method for processing wafer - Google Patents

Method for processing wafer Download PDF

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Publication number
CN108081118B
CN108081118B CN201711121579.7A CN201711121579A CN108081118B CN 108081118 B CN108081118 B CN 108081118B CN 201711121579 A CN201711121579 A CN 201711121579A CN 108081118 B CN108081118 B CN 108081118B
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China
Prior art keywords
wafer
polishing
chuck table
rotation speed
grinding
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CN201711121579.7A
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Chinese (zh)
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CN108081118A (en
Inventor
早川晋
饭岛悠
宫城有佑
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Disco Corp
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Disco Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/30—Work carriers for single side lapping of plane surfaces
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B27/00—Other grinding machines or devices
    • B24B27/0023—Other grinding machines or devices grinding machines with a plurality of working posts
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B27/00—Other grinding machines or devices
    • B24B27/0076—Other grinding machines or devices grinding machines comprising two or more grinding tools
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/10—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping
    • B24B37/105—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping the workpieces or work carriers being actively moved by a drive, e.g. in a combined rotary and translatory movement
    • B24B37/107—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping the workpieces or work carriers being actively moved by a drive, e.g. in a combined rotary and translatory movement in a rotary movement only, about an axis being stationary during lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/34—Accessories
    • B24B37/345—Feeding, loading or unloading work specially adapted to lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B57/00—Devices for feeding, applying, grading or recovering grinding, polishing or lapping agents
    • B24B57/02—Devices for feeding, applying, grading or recovering grinding, polishing or lapping agents for feeding of fluid, sprayed, pulverised, or liquefied grinding, polishing or lapping agents
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel

Abstract

Provided is a wafer processing method which can form a defect removal layer efficiently with good processability. The wafer processing method is a wafer processing method using a polishing pad containing two kinds of abrasive grains, i.e., abrasive grains for polishing and abrasive grains for removing defects. The wafer processing method comprises the following steps: a polishing step (ST4) of polishing a wafer held on a chuck table rotating at a 1 ST rotation speed by bringing a polishing pad rotating at a predetermined speed into contact with the wafer while supplying an alkaline polishing liquid thereto; and a defect removal layer forming step (ST5) of forming a defect removal layer on the wafer while supplying a liquid that does not react with the wafer, while continuously rotating the chuck table at a 2 nd rotation speed that is lower than a 1 ST rotation speed, after the polishing step (ST4), while maintaining a state in which the polishing pad rotating at a predetermined speed in the polishing step (ST4) is in contact with the wafer held on the rotating chuck table.

Description

Method for processing wafer
Technical Field
The present invention relates to a method for processing a wafer.
Background
The wafer processing method performs the following operations: a wafer is polished while being held by a chuck table and rotated and a polishing pad is rotated and pressed, and then a rinse liquid is supplied while the chuck table and the polishing pad are rotated to form a defect removal layer on the wafer (see, for example, patent documents 1 and 2).
Patent document 1: japanese patent laid-open publication No. 2013-247132
Patent document 2: japanese patent laid-open publication No. 2013-244537
The inventions of patent documents 1 and 2 use a polishing pad to continuously perform polishing and subsequent defect removal layer formation. However, the inventions of patent documents 1 and 2 do not focus on a preferred rotation speed of the chuck table for efficiently forming the desmear layer on the wafer in each process. It is desirable to efficiently form a defect removal layer in wafer processing.
Disclosure of Invention
The invention aims to provide a wafer processing method, which can effectively form a defect removing layer.
In order to solve the above-mentioned problems and achieve the object, a method for processing a wafer according to the present invention uses a polishing pad including two types of abrasive grains, i.e., abrasive grains for polishing and abrasive grains for removing defects, and includes: a polishing step of polishing a wafer held on a chuck table rotating at a 1 st rotation speed by bringing a polishing pad rotating at a predetermined speed into contact with the wafer while supplying an alkaline polishing liquid to the wafer; and a defect removal layer forming step of forming a defect removal layer on the wafer while supplying a liquid that does not react with the wafer, by continuously rotating the chuck table at a 2 nd rotation speed that is lower than the 1 st rotation speed, while maintaining a state in which the polishing pad rotating at the predetermined speed in the polishing step is in contact with the wafer held on the rotating chuck table.
The 2 nd rotation speed may be gradually reduced.
According to the present invention, since the rotation speed of the chuck table in the defect layer formation step is lower than that in the polishing step, the relative speed between the polishing pad and the wafer in the defect layer formation step can be made higher than that in the polishing step, and the defect layer can be efficiently formed.
Drawings
Fig. 1 is a perspective view of a device wafer to be processed, which illustrates a wafer processing method according to embodiment 1.
Fig. 2 is a perspective view of a configuration example of a grinding and polishing apparatus used in the wafer processing method according to embodiment 1.
Fig. 3 is a perspective view showing a configuration example of a polishing unit of the grinding and polishing apparatus shown in fig. 2.
Fig. 4 is a flowchart showing a flow of a wafer processing method according to embodiment 1.
Fig. 5 is a diagram illustrating a polishing step in the wafer processing method according to embodiment 1.
Fig. 6 is a diagram illustrating a defect removal layer forming step in the wafer processing method according to embodiment 1.
Fig. 7 is a view showing the rotational speed and the load in the polishing step and the defect removal layer forming step in the wafer processing method according to embodiment 1.
Fig. 8 is a diagram illustrating a singulation step in the wafer processing method according to embodiment 1.
Fig. 9 is a diagram illustrating a polishing step in the wafer processing method according to embodiment 2.
Fig. 10 is a diagram illustrating a defect removal layer forming step in the wafer processing method according to embodiment 2.
Fig. 11 is a view showing the rotation speed in the polishing step and the defect removal layer forming step in the wafer processing method according to embodiment 3.
Fig. 12 is a view showing the rotational speed and the load in the polishing step and the defect removal layer forming step in the wafer processing method according to embodiment 4.
Description of the reference symbols
7: a chuck table; 51: a polishing pad; w: a wafer; WS: a front side; WR: a back side; DV: a device; g: removing a defect layer; r0: a prescribed speed; r1: 1 st rotation speed; r2, R2A: 2 nd rotation speed; ST 4: a grinding process; ST 5: and a defect removal layer forming step.
Detailed Description
A mode (embodiment) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. The components described below include substantially the same components as those easily conceived by those skilled in the art. Further, the following configurations can be appropriately combined. Various omissions, substitutions, and changes in the structure can be made without departing from the spirit of the invention.
[ embodiment 1 ]
A method for processing a wafer according to embodiment 1 of the present invention will be described with reference to the drawings. Fig. 1 is a perspective view of a device wafer to be processed, which illustrates a wafer processing method according to embodiment 1. Fig. 2 is a perspective view showing a configuration example of a grinding and polishing apparatus used in the wafer processing method according to embodiment 1. Fig. 3 is a perspective view showing a configuration example of a polishing unit of the grinding and polishing apparatus shown in fig. 2.
The processing method of a wafer of embodiment 1 is a method of forming the defect removal layer G on the back surface WR of the wafer W shown in fig. 1 and dividing the wafer W into device chips DT (shown by broken lines in fig. 1). As shown in fig. 1, the wafer W is a disc-shaped semiconductor wafer or optical device wafer made of silicon. On the front surface WS of the wafer W, devices DV are formed in regions defined by the plurality of planned dividing lines S formed in a lattice shape. That is, a plurality of devices DV are formed on the front surface WS of the wafer W. The wafer W is thinned to a predetermined thickness by grinding or the like on the back surface WR of the front surface WS, and then the defect removal layer G is formed on the back surface WR side. The defect removal layer G is a layer in which crystal defects, strain, and the like (referred to as defect removal sites) are formed on the back surface WR of the wafer W (that is, the back surface WR of each device DV), and is a layer in which impurities causing metal contamination are captured and fixed at the defect removal sites. In embodiment 1, after the defect removal layer G is formed on the back surface WR side, the wafer W is divided into device chips DT including the devices DV. In embodiment 1, the outer diameter of the wafer W is 300 mm.
In the method for processing a wafer according to embodiment 1, at least the grinding/polishing apparatus 1 as a processing apparatus shown in fig. 2 is used. The grinding and polishing apparatus 1 performs grinding for thinning the back surface WR of the wafer W, and performs polishing for flattening the back surface WR of the wafer W after the grinding with high accuracy and forming a defect removal layer G on the back surface WR side of the wafer W. As shown in fig. 2, the grinding and polishing apparatus 1 mainly includes: a device main body 2; 1 st grinding unit 3; a 2 nd grinding unit 4; a grinding unit 5; 4 chuck tables 7 provided on the rotary table 6, for example; the cassettes 8, 9; a contraposition unit 10; a carry-in unit 11; a cleaning unit 13; a carry-in/out unit 14; and a control unit 100.
The 1 st grinding unit 3 is used to perform the following processes: the grinding wheel 31 having a grinding wheel attached to the lower end of the spindle is rotated, and the back surface WR of the wafer W held on the chuck table 7 at the rough grinding position B is pressed along the Z-axis direction parallel to the vertical direction, thereby performing rough grinding on the back surface WR of the wafer W. Likewise, the 2 nd grinding unit 4 is used to perform the following processes: the back surface WR of the rough-ground wafer W held on the chuck table 7 located at the finish grinding position C is pressed in the Z-axis direction while rotating a grinding wheel 41 having a grinding wheel attached to the lower end of the spindle, thereby performing finish grinding of the back surface WR of the wafer W.
In embodiment 1, as shown in fig. 3, the polishing unit 5 is arranged such that a polishing pad 51 attached to the lower end of the spindle faces the holding surface of the chuck table 7. The polishing unit 5 presses the back surface WR of the wafer W finish-ground held on the holding surface of the chuck table 7 located at the polishing position D in the Z-axis direction while rotating the polishing pad 51. The grinding unit 5 is used for performing the following processes: the polishing pad 51 is pressed against the back surface WR of the wafer W along the Z-axis direction, thereby polishing the back surface WR of the wafer W. The polishing pad 51 of the polishing unit 5 includes two kinds of abrasive grains, i.e., abrasive grains for polishing and abrasive grains for removing defects. The abrasive grains for polishing are suitable for polishing, and are made of, for example, Silica (SiO)2) Zirconium oxide (ZrO)2) And cerium oxide (CeO)2) At least one kind of abrasive grains. The defect removal abrasive grains are suitable for forming the defect removal layer G, and are, for example, abrasive grains composed of at least one of GC (green silicon carbide), WA (white alumina), and diamond.
The Polishing unit 5 applies a process called CMP (Chemical Mechanical Polishing) to the back surface WR of the wafer W by using the Polishing pad 51 while supplying the alkaline Polishing liquid from the Polishing liquid supply source 15 to the back surface WR of the wafer W through the switching valve 12 from the nozzle 16 provided separately from the Polishing pad 51, and then forms the desmear layer G on the back surface WR side of the wafer W by using the Polishing pad 51 while supplying the liquid (pure water in embodiment 1) that does not react with the wafer W from the rinse liquid supply source 17 to the back surface WR of the wafer W through the switching valve 12. As shown in fig. 3, the polishing unit 5 includes an X-axis moving unit 52, and the X-axis moving unit 52 moves the polishing pad 51 together with the main spindle in an X-axis direction perpendicular to the Z-axis direction and parallel to the width direction of the apparatus main body 2. In embodiment 1, the outer diameter of the polishing pad 51 is 450 mm.
The rotary table 6 is a disk-shaped table provided on the upper surface of the apparatus main body 2, and the rotary table 6 is provided so as to be rotatable in a horizontal plane and is rotationally driven at a predetermined timing. On the rotary table 6, for example, 4 chuck tables 7 are arranged at equal intervals, for example, at a phase angle of 90 degrees. The 4 chuck tables 7 have a chuck table structure having a vacuum chuck on the upper surface, and hold the mounted wafer W by vacuum suction. These chuck tables 7 are rotationally driven in the horizontal plane by a rotational driving mechanism with a rotation axis parallel to the vertical direction during the grinding process and the polishing process. In this way, the chuck table 7 has a holding surface capable of holding the wafer W as a workpiece in rotation. The chuck table 7 is moved to the carrying in and out position a, the rough grinding position B, the finish grinding position C, the grinding position D, and the carrying in and out position a in this order by the rotation of the rotary table 6.
The cassettes 8 and 9 are containers having a plurality of grooves for storing the wafers W. One cassette 8 accommodates the wafer W with the protective member P (shown in fig. 5) attached to the front face WS before the grinding and polishing, and the other cassette 9 accommodates the wafer W after the grinding and polishing. The aligning unit 10 is a table on which the wafer W taken out of the cassette 8 is temporarily placed and center-aligned.
The carry-in unit 11 has a suction pad for sucking and holding the wafer W before grinding and polishing aligned by the alignment unit 10 and carrying it into the chuck table 7 located at the carry-in and carry-out position a. The carry-in unit 11 sucks and holds the wafer W after the grinding and polishing process held on the chuck table 7 located at the carry-in and carry-out position a, and carries the wafer W out to the cleaning unit 13.
The carry-in and out unit 14 is, for example, a robot picker having a U-shaped hand 14a, and carries the wafer W by sucking and holding the wafer W by the U-shaped hand 14 a. Specifically, the carry-in and carry-out unit 14 carries the wafer W before grinding and polishing out of the cassette 8 to the alignment unit 10, and carries the wafer W after grinding and polishing out of the cleaning unit 13 to the cassette 9. The cleaning unit 13 cleans the wafer W after the grinding and polishing process, and removes contaminants such as grinding chips and polishing chips adhering to the processing surface subjected to the grinding and polishing.
The control unit 100 controls the above-described components constituting the grinding and polishing apparatus 1. That is, the control unit 100 causes the grinding and polishing apparatus 1 to execute the processing operation on the wafer W. The control unit 100 is a computer capable of executing a computer program. The control unit 100 has: an arithmetic processing device having a microprocessor such as a Central Processing Unit (CPU); a storage device having a memory such as a ROM (read only memory) or a RAM (random access memory); and an input/output interface device. The CPU of the control unit 100 executes a computer program stored in the ROM on the RAM and generates a control signal for controlling the grinding and polishing apparatus 1. The CPU of the control unit 100 outputs the generated control signals to the respective components of the grinding and polishing apparatus 1 via the input/output interface device. The control unit 100 is connected to a display unit, not shown, which is constituted by a liquid crystal display device or the like that displays the state of the machining operation, an image, and the like, and an input unit, not shown, which is used when the operator registers the machining content information and the like. The input unit is configured by at least one of a touch panel and a keyboard provided in the display unit.
Next, a method for processing a wafer according to embodiment 1 will be described. Fig. 4 is a flowchart showing a flow of a wafer processing method according to embodiment 1. Fig. 5 is a diagram illustrating a polishing step in the wafer processing method according to embodiment 1. Fig. 6 is a diagram illustrating a defect removal layer forming step in the wafer processing method according to embodiment 1. Fig. 7 is a view showing the rotational speed and the load in the polishing step and the defect removal layer forming step in the wafer processing method according to embodiment 1. Fig. 8 is a diagram illustrating a singulation step in the wafer processing method according to embodiment 1. The horizontal axis of fig. 7 represents the time from the start of the polishing step ST4, and the vertical axis of fig. 7 represents the rotation speeds of the chuck table 7 and the polishing pad 51, and the value of the load pressing the polishing pad 51 against the wafer W. In fig. 7, the rotation speed of the chuck table 7 is indicated by a thin solid line, and the rotation speed of the polishing pad 51 and the load with which the polishing pad 51 is pressed against the wafer W are indicated by a thick broken line.
As shown in fig. 4, the wafer processing method (hereinafter, simply referred to as a processing method) includes a holding step ST1, a rough grinding step ST2, a finish grinding step ST3, a polishing step ST4, a defect removal layer forming step ST5, and a singulation step ST 6. In the holding step ST1, first, the operator attaches the cassette 8 and the cassette 9, in which the wafer W with the protective member P attached to the front surface WS before the grinding and polishing process is stored, to the apparatus main body 2 and registers the process information in the control unit 100, and the operator does not store the wafer W in the cassette 9. The operator inputs a start instruction of the machining operation to the grinding and polishing apparatus 1, and the control unit 100 starts the machining operation of the grinding and polishing apparatus 1.
In the holding step ST1, the carry-in/out unit 14 of the grinding and polishing apparatus 1 takes out the wafer W from the cassette 8 and carries it out to the alignment unit 10, the alignment unit 10 performs center alignment of the wafer W, and the carry-in unit 11 carries the front side WS of the aligned wafer W into the chuck table 7 located at the carry-in/out position a. In the holding step ST1, the grinding and polishing apparatus 1 holds the front surface WS side of the wafer W via the protective member P by the chuck table 7, exposes the rear surface WR, and sequentially conveys the wafer W to the rough grinding position B, the finish grinding position C, the polishing position D, and the carry-in and carry-out position a by the rotary table 6. In the grinding and polishing apparatus 1, each time the turn table 6 rotates by 90 degrees, the wafer W before grinding and polishing is carried into the chuck table 7 at the carrying-in and carrying-out position a.
In the rough grinding process ST2, the grinding/polishing apparatus 1 performs the rough grinding process on the back surface WR of the wafer W at the rough grinding position B using the 1 ST grinding unit 3, and in the finish grinding process ST3 performs the finish grinding process on the back surface WR of the wafer W at the finish grinding position C using the 2 nd grinding unit 4.
The polishing step ST4 is a step of: the wafer W is held on the chuck table 7, and the chuck table 7 is rotated at a 1 st rotation speed R1 (as shown in fig. 7), and the wafer W held on the chuck table 7 is polished by bringing the polishing pad 51 rotated at a predetermined speed R0 into contact with the wafer W while supplying an alkaline polishing liquid thereto. In the polishing step ST4, the grinding and polishing apparatus 1 holds the wafer W held on the chuck table 7 in the holding step ST1 on the chuck table 7. In the polishing step ST4, the grinding and polishing apparatus 1 rotates the chuck table 7 at the polishing position D at the 1 ST rotation speed R1 and rotates the polishing pad 51 at the predetermined speed R0, and as shown in fig. 5, while supplying the polishing liquid from the polishing liquid supply source 15 to the back surface WR of the wafer W via the switching valve 12, presses the polishing pad 51 against the wafer W held by the chuck table 7 at the 1 ST load F1, and performs CMP polishing on the back surface WR of the wafer W. The polishing liquid referred to herein may be a liquid containing no particles for polishing, or may be a polishing liquid containing solid-phase reaction fine particles such as silica particles having improved polishing properties with respect to silicon constituting the wafer W.
In embodiment 1, the predetermined speed R0 of the polishing pad 51 in the polishing step ST4 is 500rpm, the 1 ST rotation speed R1 of the chuck table 7 is 505rpm, the 1 ST load F1 of the polishing pad 51 has a value of 25kPa, and the supply amount of the polishing liquid is 1 liter/min.
The defect removal layer forming step ST5 is a step of: after the polishing step ST4, the wafer W held on the rotating chuck table 7 is continuously rotated at the 2 nd rotation speed R2 which is lower than the 1 ST rotation speed R1 while maintaining the state in which the wafer W held on the rotating chuck table 7 is brought into contact with the polishing pad 51 rotating at the predetermined speed R0 in the polishing step ST4, and the polishing pad 51 rotating at the predetermined speed R0 is brought into contact with the wafer W while supplying pure water which is a liquid not reacting with the wafer W, thereby forming the desmear layer G. In the defect layer removing step ST5, when time T0 has elapsed since the start of the polishing step ST4, the grinding/polishing apparatus 1 switches the switching valve 12 to supply pure water, which is a liquid that does not react with the wafer W, from the rinse liquid supply source 17, and when time T1 longer than time T0 has elapsed since the start of the polishing step ST4, the rotational speed of the chuck table 7 is reduced from the 1 ST rotational speed R1 to the 2 nd rotational speed R2 smaller than the 1 ST rotational speed R1 without changing the state in which the polishing pad 51 is rotated at the predetermined speed R0 until time T2 longer than time T1 has elapsed since the start of the polishing step ST 4.
In the defect-removing layer-forming step ST5, when T1 passes from the start of the polishing step ST4, the grinding/polishing apparatus 1 reduces the load on the polishing pad 51 pressing the wafer W to the 2 nd load F2 smaller than the 1 ST load F1 until the time T2 passes from the start of the polishing step ST 4. In this way, the defect removal layer forming step ST5 is continuously performed after the polishing step ST4 while the wafer W is kept in contact with the polishing pad 51 in the polishing step ST 4. The processing method according to embodiment 1 performs the defect removal layer forming step ST5 while maintaining the rotational speed of the polishing pad 51 in the defect removal layer forming step ST5 at the rotational speed of the polishing pad 51 in the polishing step ST 4. In the defect removal layer forming step ST5, the grinding/polishing apparatus 1 rotates the chuck table 7 at the polishing position D at the 2 nd rotation speed R2 and rotates the polishing pad 51 at the predetermined speed R0, and as shown in fig. 6, presses the polishing pad 51 against the wafer W held by the chuck table 7 with the 2 nd load F2 while supplying pure water, which is a liquid that does not react with the wafer W, from the rinse liquid supply source 17 to the back surface WR of the wafer W via the switching valve 12, thereby forming the defect removal layer G on the back surface WR side of the wafer W.
In embodiment 1, the predetermined speed R0 of the polishing pad 51 in the defect-removal-layer forming step ST5 is 500rpm, the 2 nd rotation speed R2 of the chuck table 7 is 60rpm, the 2 nd load F2 of the polishing pad 51 has a value of 5kPa, and the supply amount of pure water, which is a liquid that does not react with the wafer W, is 1 liter/min.
In embodiment 1, in the polishing step ST4 and the defect removal layer forming step ST5, the processing method positions the polishing pad 51 so that the outer periphery of the polishing pad 51 covers the center of the wafer W and protrudes from the outer edge of the wafer W. When a time T3 longer than the time T2 has elapsed from the start of the polishing step ST4, the processing method ends the defect layer formation step ST 5.
After the defect removal layer forming step ST5, the grinding and polishing apparatus 1 positions the wafer W subjected to the defect removal layer forming step ST5 at the carry-in and carry-out position a, carries the wafer W into the cleaning unit 13 by the carry-in unit 11, cleans the wafer W by the cleaning unit 13, and carries the cleaned wafer W into the cassette 9 by the carry-in and carry-out unit 14.
In the singulation step ST6, after the wafer W is taken out of the cassette 9 and the protective member P is peeled off from the front surface WS, a protective film (not shown) made of a water-soluble resin such as polyvinyl alcohol (PVA) or polyvinyl pyrrolidone (PVP) is formed on the front surface WS of the wafer W, and the back surface WR side of the wafer W is sucked and held on the chuck table 21 of the laser processing machine 20 shown in fig. 8. As shown in fig. 8, in the singulation step ST6, while the laser irradiation unit 22 of the laser processing machine 20 is relatively moved along the lines S, the laser beam LR is irradiated from the laser irradiation unit 22 onto the lines S to perform ablation processing on the lines S to perform half-dicing, and then an external force is applied to singulate the wafer W into the device chips DT along the lines S. When the full dicing is performed by irradiating the laser beam LR, the wafer W is diced into the device chips DT in the dicing step ST6, and then the protective film, not shown, is removed, and the front surface WS of the wafer W is cleaned and the protective film is removed together with the chips.
In embodiment 1, the singulation step ST6 singulates the wafer W into the device chips DT by ablation processing using the laser beam LR, but in the present invention, the singulation step ST6 may singulate the wafer W into the device chips DT by irradiating the wafer W with the laser beam to form a modified layer therein, or may singulate the wafer W into the device chips DT by cutting processing using a cutting tool.
As described above, in the processing method according to embodiment 1, since the rotational speed of the chuck table 7 in the defect layer forming step ST5 is set to be smaller than the rotational speed in the polishing step ST4, the relative speed between the chuck table 7 and the polishing pad 51 in the defect layer forming step ST5 is set to be larger than the relative speed in the polishing step ST 4. Therefore, the processing method of embodiment 1 can reduce the time required for forming the defect removal layer G. As a result, the processing method of embodiment 1 can efficiently form the defect removal layer G.
In the processing method according to embodiment 1, the rotational speed of the polishing pad 51 in the defect removal layer forming step ST5 is maintained at the same rotational speed as the polishing pad 51 in the polishing step ST4, and the rotational speed of the chuck table 7 is reduced from the polishing step ST4 to the defect removal layer forming step ST 5. In this way, in the processing method of embodiment 1, since the rotation speed of the chuck table 7 having a smaller diameter than the polishing pad 51 is changed from the polishing step ST4 to the defect removal layer forming step ST5, the time required for changing the rotation speed can be reduced as compared with the case where the rotation speed of the polishing pad 51 is changed. As a result, the processing method of embodiment 1 can reduce the time required for the transition from the polishing step ST4 to the defect layer forming step ST5, and can efficiently form the defect removal layer G.
[ embodiment 2 ]
A method for processing a wafer according to embodiment 2 of the present invention will be described with reference to the drawings. Fig. 9 is a diagram illustrating a polishing step in the wafer processing method according to embodiment 2. Fig. 10 is a diagram illustrating a defect removal layer forming step in the wafer processing method according to embodiment 2. In fig. 9 and 10, the same portions as those in embodiment 1 are assigned the same reference numerals, and the description thereof is omitted.
A wafer processing method according to embodiment 2 (hereinafter, simply referred to as a processing method) is the same as that of embodiment 1 except that the configuration of the polishing unit 5 that performs the polishing step ST4 and the defect removal layer forming step ST5 is different from that of embodiment 1.
As shown in fig. 9 and 10, in the processing method according to embodiment 2, the polishing unit 5 that performs the polishing step ST4 and the defect removal layer forming step ST5 is provided with a supply passage 18 at the center, and the supply passage 18 supplies the polishing liquid from the polishing liquid supply source 15 or the liquid from the rinse liquid supply source 17 to the center of the polishing surface of the polishing pad 51 that is in contact with the back surface WR of the wafer W. In the polishing step ST4 and the defect removal layer forming step ST5 of the processing method of embodiment 2, the polishing pad 51 is positioned so that the entire back surface WR of the wafer W is covered with the entire polishing pad 51. In embodiment 2, the outer diameter of the polishing pad 51 is equal to the outer diameter of the wafer W, and both are 300 mm.
In the processing method according to embodiment 2, the rotation speed of the chuck table 7 in the defect layer forming step ST5 is set to be lower than the rotation speed in the polishing step ST4, as in embodiment 1, so that the formation of the defect layer G can be efficiently performed with good workability.
[ embodiment 3 ]
A method for processing a wafer according to embodiment 3 of the present invention will be described with reference to the drawings. Fig. 11 is a view showing the rotation speed in the polishing step and the defect removal layer forming step in the wafer processing method according to embodiment 3. In fig. 11, the same portions as those in embodiment 1 are assigned the same reference numerals, and description thereof is omitted. The horizontal axis of fig. 11 represents the time from the start of the polishing step ST4, and the vertical axis of fig. 11 represents the rotation speed of the chuck table 7 and the polishing pad 51. In fig. 11, the rotation speed of the chuck table 7 is indicated by a thin solid line, and the rotation speed of the polishing pad 51 is indicated by a thick broken line.
A wafer processing method according to embodiment 3 (hereinafter, simply referred to as a processing method) is the same as embodiment 1 except that the rotation speed of the chuck table 7 in the polishing step ST4 and the defect removal layer forming step ST5 is different from that in embodiment 1.
In the defect-removal-layer forming step ST5 of the processing method according to embodiment 3, when a time T1 longer than the time T0 has elapsed from the start of the polishing step ST4, the grinding/polishing apparatus 1 reduces the rotation speed of the chuck table 7 from the 1 ST rotation speed R1 to the 2 nd rotation speed R2A smaller than the 1 ST rotation speed R1 and larger than the 2 nd rotation speed R2 without changing the state in which the polishing pad 51 is rotated at the predetermined speed R0 until a time T2A longer than the time T1 and shorter than the time T2 has elapsed from the start of the polishing step ST 4. In the defect-removal-layer forming step ST5 of the processing method according to embodiment 3, when time T2A elapses from the start of the polishing step ST4, the rotational speed of the chuck table 7 is reduced from the 2 nd rotational speed R2A to the 2 nd rotational speed R2 which is smaller than the 1 ST rotational speed R1 without changing the state where the polishing pad 51 is rotated at the predetermined speed R0 by the grinding/polishing apparatus 1 until time T2 elapses from the start of the polishing step ST 4. In this way, in the defect-removing layer forming step ST5 of the processing method according to embodiment 3, the rotation speed of the chuck table 7 of the grinding and polishing apparatus 1 is gradually reduced in stages, but may be continuously reduced.
In the processing method according to embodiment 3, the rotation speed of the chuck table 7 in the defect layer forming step ST5 is set to be lower than the rotation speed in the polishing step ST4, as in embodiment 1, and therefore the defect layer G can be formed efficiently.
In the processing method according to embodiment 3, the rotational speed of the chuck table 7 in the defect layer forming step ST5 is gradually reduced in stages as in embodiment 1, so that the load on the polishing unit 5 when the process proceeds from the polishing step ST4 to the defect layer forming step ST5 can be reduced.
[ embodiment 4 ]
A method for processing a wafer according to embodiment 4 of the present invention will be described with reference to the drawings. Fig. 12 is a view showing the rotational speed and the load in the polishing step and the defect removal layer forming step in the wafer processing method according to embodiment 4. In fig. 12, the same portions as those in embodiment 3 are assigned the same reference numerals, and description thereof is omitted. The horizontal axis of fig. 12 represents the time from the start of the polishing step ST4, and the vertical axis of fig. 12 represents the rotation speeds of the chuck table 7 and the polishing pad 51, and the value of the load pressing the polishing pad 51 against the wafer W. In fig. 12, the rotation speed of the chuck table 7 is indicated by a thin solid line, and the rotation speed of the polishing pad 51 and the load with which the polishing pad 51 is pressed against the wafer W are indicated by a thick broken line.
The method of processing a wafer according to embodiment 4 (hereinafter simply referred to as "processing method") is the same as that of embodiment 3 except that the load of pressing the polishing pad 51 against the wafer W in the polishing step ST4 and the defect removal layer forming step ST5 is different from that of embodiment 3.
In the defect-removing layer forming step ST5 of the processing method according to embodiment 4, the grinding/polishing apparatus 1 gradually reduces the rotation speed of the chuck table 7 as in embodiment 3, and when a time T1 longer than the time T0 has elapsed from the start of the polishing step ST4, the load with which the polishing pad 51 is pressed against the wafer W is reduced from the 1 ST load F1 to the 2 nd load F2A smaller than the 1 ST load F1 and larger than the 2 nd load F2 until a time T2A longer than the time T1 and shorter than the time T2 has elapsed from the start of the polishing step ST 4. In the defect-removing layer forming step ST5 of the processing method according to embodiment 4, when time T2A elapses from the start of the polishing step ST4, the load of the grinding/polishing apparatus 1 pressing the polishing pad 51 against the wafer W is reduced from the 2 nd load F2A to the 2 nd load F2 smaller than the 1 ST load F1 until time T2 elapses from the start of the polishing step ST 4. As described above, in the defect-removing layer forming step ST5 of the processing method according to embodiment 4, the load applied to the wafer W by the polishing pad 51 may be gradually reduced by the grinding/polishing apparatus 1, but the load may be continuously and gradually reduced.
In the processing method according to embodiment 4, the rotation speed of the chuck table 7 in the defect layer forming step ST5 is set to be lower than the rotation speed in the polishing step ST4, as in embodiment 1, so that the formation of the defect layer G can be efficiently performed with good workability.
In the processing method according to embodiment 4, similarly to embodiment 1, the rotational speed of the chuck table 7 in the defect-removing layer forming step ST5 is removed, and the load applied by the polishing pad 51 to the wafer W is reduced in stages, so that the load on the polishing unit 5 when the process proceeds from the polishing step ST4 to the defect-removing layer forming step ST5 can be reduced.
According to the embodiments, the following method for manufacturing a device chip can be obtained.
(attached note 1)
A method for manufacturing a device chip, the method using a polishing pad containing abrasive grains for polishing and abrasive grains for defect removal, the method comprising the steps of:
a polishing step of polishing a wafer held on a chuck table rotating at a 1 st rotation speed by bringing a polishing pad rotating at a predetermined speed into contact with the wafer while supplying an alkaline polishing liquid to the wafer; and
and a defect removal layer forming step of forming a defect removal layer on the wafer while supplying a liquid that does not react with the wafer, while continuously rotating the chuck table at a 2 nd rotation speed that is lower than the 1 st rotation speed, while maintaining a state in which the polishing pad rotating at the predetermined speed in the polishing step is in contact with the wafer held on the rotating chuck table.
The present invention is not limited to the above embodiments. That is, various modifications can be made within the scope not departing from the gist of the present invention.

Claims (2)

1. A method for processing a wafer, which uses a polishing pad containing abrasive grains for polishing and abrasive grains for removing defects, the method comprising the steps of:
a polishing step of polishing a wafer held on a chuck table rotating in a 1 st direction at a 1 st rotation speed by bringing a polishing pad rotating in the 1 st direction at a predetermined speed into contact with the wafer while supplying an alkaline polishing liquid to the wafer; and
and a defect removal layer forming step of continuously rotating the chuck table in the 1 st direction at a 2 nd rotation speed lower than the 1 st rotation speed while maintaining a state in which the polishing pad rotating at the predetermined speed in the polishing step is brought into contact with the wafer held on the rotating chuck table, and forming a defect removal layer on the wafer while supplying a liquid that does not react with the wafer, wherein the 2 nd rotation speed is lower than the 1 st rotation speed, so that a relative speed between the chuck table and the polishing pad in the defect removal layer forming step is higher than a relative speed in the polishing step, and a time required for forming the defect removal layer is reduced.
2. The method of processing a wafer according to claim 1,
the 2 nd rotation speed becomes gradually smaller.
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