CN108063175B - A kind of high brightness LED chip and preparation method thereof - Google Patents
A kind of high brightness LED chip and preparation method thereof Download PDFInfo
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- CN108063175B CN108063175B CN201711362323.5A CN201711362323A CN108063175B CN 108063175 B CN108063175 B CN 108063175B CN 201711362323 A CN201711362323 A CN 201711362323A CN 108063175 B CN108063175 B CN 108063175B
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- 238000002360 preparation method Methods 0.000 title description 4
- 238000004519 manufacturing process Methods 0.000 claims abstract description 27
- 239000010410 layer Substances 0.000 claims description 250
- 239000004065 semiconductor Substances 0.000 claims description 62
- 239000000758 substrate Substances 0.000 claims description 38
- 238000005530 etching Methods 0.000 claims description 31
- 238000007740 vapor deposition Methods 0.000 claims description 19
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 13
- 229910052760 oxygen Inorganic materials 0.000 claims description 13
- 239000001301 oxygen Substances 0.000 claims description 13
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 9
- 238000005566 electron beam evaporation Methods 0.000 claims description 9
- 229910021578 Iron(III) chloride Inorganic materials 0.000 claims description 8
- 230000008020 evaporation Effects 0.000 claims description 8
- 238000001704 evaporation Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 229910052718 tin Inorganic materials 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052745 lead Inorganic materials 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 229910052703 rhodium Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 239000002344 surface layer Substances 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 230000007797 corrosion Effects 0.000 abstract description 15
- 238000005260 corrosion Methods 0.000 abstract description 15
- 238000001039 wet etching Methods 0.000 abstract description 13
- 238000000605 extraction Methods 0.000 abstract description 7
- 229910002601 GaN Inorganic materials 0.000 description 17
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 17
- 238000000034 method Methods 0.000 description 17
- 229910052594 sapphire Inorganic materials 0.000 description 17
- 239000010980 sapphire Substances 0.000 description 17
- 230000006872 improvement Effects 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000011259 mixed solution Substances 0.000 description 6
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical class [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- AFCARXCZXQIEQB-UHFFFAOYSA-N N-[3-oxo-3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)propyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CCNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 AFCARXCZXQIEQB-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000032683 aging Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of production methods of high brightness LED chip, by reducing the thickness of ITO layer, reducing the time of wet etching and reducing the diameter of the second exposed region, to prevent the side wall excessive corrosion of chip, destroy the overall structure of LED chip, and then improve the light extraction efficiency of LED chip, the production time is reduced, production efficiency is improved.
Description
Technical field
The present invention relates to LED technology fields more particularly to a kind of high brightness LED chip and preparation method thereof.
Background technique
LED (Light Emitting Diode, light emitting diode) be it is a kind of using Carrier recombination when release energy shape
At luminous semiconductor devices, LED chip is with power consumption is low, coloration is pure, the service life is long, small in size, the response time is fast, energy conservation and environmental protection
Equal many advantages.Wherein, the performance of LED chip directly affects the performance of entire LED light, the production method and material of LED chip
The performance of chip is played to Guan Zuoyong.
Currently, the material of the ITO layer of LED chip is generally ITO (Indium Tin Oxides, indium tin oxide), ITO
Current thickness is generallyWherein mainly it is performed etching using chemical corrosion method, still, using wet chemical
The problems such as rotten method be easy to cause excessive corrosion influences the photoelectric properties of LED chip.
Summary of the invention
Technical problem to be solved by the present invention lies in provide a kind of high brightness LDE chip and preparation method thereof, by subtracting
The thickness of thin ITO shortens the time of chemical attack, to prevent excessive corrosion, that is, improves the brightness of chip, and improve production
Efficiency.
In order to solve the above-mentioned technical problems, the present invention provides a kind of production methods of high brightness LED chip, comprising:
One substrate is provided；
Epitaxial layer is formed in the substrate surface, the epitaxial layer includes being sequentially arranged in the first the half of the substrate surface to lead
Body layer, active layer and the second semiconductor layer；
The epitaxial layer is performed etching, the first exposed region is formed, first exposed region is etched to the first half and leads
Body layer；
Form ITO layer on said epitaxial layer there, the ITO layer with a thickness of
The ITO layer is performed etching using wet corrosion technique, forms the second exposed region, and exposed by described first
Region exposes, and second exposed region is etched to second semiconductor layer, and the diameter of second exposed region is
0.5-8μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
As an improvement of the above scheme, one layer of ITO layer is deposited in the epi-layer surface using electron beam evaporation process,
In, vapor deposition temperature is 200-350 DEG C, oxygen flow 5-20sccm, and vapor deposition chamber vacuum degree is 3.0-10.0E-5, when vapor deposition
Between be 50-300min.
As an improvement of the above scheme, the wet corrosion technique includes: using FeCl3It is lost with the ITO layer of HCl
It carves, etching period is 100-1000 seconds.
As an improvement of the above scheme, the width of first exposed region is 10-30 μm.
As an improvement of the above scheme, the first electrode or the second electrode by Cr, Ni,Ti、Pt、W、
Pb、Rh、Sn、Cu、One or more of be made.
As an improvement of the above scheme, further comprising the steps of after forming first electrode and second electrode:
Insulating layer is formed on the ITO layer surface and exposed first semiconductor layer surface, and to the insulating layer
It performs etching, first electrode and second electrode is exposed.
As an improvement of the above scheme, the insulating layer with a thickness of
As an improvement of the above scheme, the insulating layer is made by one or more of silica, silicon nitride and aluminium oxide
At.
As an improvement of the above scheme, the ITO layer with a thickness of
Correspondingly, the present invention also provides a kind of high brightness LED chips, comprising:
Substrate；
Set on the epitaxial layer of the substrate surface, wherein the epitaxial layer includes the first semiconductor set on substrate surface
Layer, set on the active layer of first semiconductor layer surface, set on the second semiconductor layer of the active layer surface；
First electrode on the first semiconductor layer；
Second electrode and ITO layer on the second semiconductor layer, the ITO layer with a thickness of
Insulating layer set on ITO layer surface and the first semiconductor layer surface.
The invention has the following beneficial effects:
1, the present invention provides a kind of production methods of high brightness LED chip, wet by the thickness, the reduction that reduce ITO layer
The time of method corrosion and the diameter for reducing by the second exposed region, to prevent the side wall excessive corrosion of chip, destroy LED chip
Overall structure, and then the light extraction efficiency of LED chip is improved, the production time is reduced, production efficiency is improved.
Detailed description of the invention
Fig. 1 is the production method flow chart of high brightness LED chip of the present invention；
Fig. 2 a is the structural schematic diagram after forming epitaxial layer；
Fig. 2 b is the structural schematic diagram to be formed after the first exposed region；
Fig. 2 c is the structural schematic diagram after forming ITO layer；
Fig. 2 d is the structural schematic diagram to be formed after the second exposed region；
Fig. 2 e is the structural schematic diagram to be formed after first electrode and the second motor；
Fig. 2 f is the structural schematic diagram of high brightness LED chip of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, the present invention is made into one below in conjunction with attached drawing
Step ground detailed description.
The production method for present embodiments providing a kind of high brightness LED chip, flow chart is as shown in Figure 1, include following
Step:
S1: a substrate is provided；
The material of substrate can be sapphire, silicon carbide or silicon, or other semiconductor materials, it is excellent in the present embodiment
Selecting substrate is Sapphire Substrate.
S2: epitaxial layer is formed in the substrate surface；
As shown in Figure 2 a, epitaxial layer 20 is formed on any one surface of substrate 10, wherein the epitaxial layer 20 includes being set to institute
The first semiconductor layer 21 for stating 10 surface of substrate, the active layer 22 set on 21 surface of the first semiconductor layer are set to 22 table of active layer
Second semiconductor layer 23 in face.
Specifically, the first semiconductor layer provided by the embodiments of the present application and the second semiconductor layer are gallium nitride-based semiconductor
Layer, active layer are gallium nitride base active layer；In addition, the first semiconductor layer provided by the embodiments of the present application, the second semiconductor layer and
The material of active layer can also be other materials, be not particularly limited to this application.
Wherein, the first semiconductor layer can be n type semiconductor layer, then the second semiconductor layer is p type semiconductor layer；Alternatively,
First semiconductor layer is p type semiconductor layer, and the second semiconductor layer is n type semiconductor layer, for the first semiconductor layer and second
The conduction type of semiconductor layer needs to be designed according to practical application, is not particularly limited to this application.
It should be noted that in order to improve the yield of subsequent etching technics, the epitaxial layer with a thickness of 4-10 μm.When
The thickness of epitaxial layer is lower than 4 μm, and the brightness of LED chip can reduce, and in subsequent etching, LED chip is easy to appear the feelings of sliver
Condition.But the thickness of epitaxial layer is greater than 10 μm, and the brightness of LED chip can reduce, and increase difficulty and the time of etching.In the present embodiment
In, the epitaxial layer with a thickness of 6 μm.
It should be noted that being equipped between the substrate 10 and the epitaxial layer 20 in the other embodiments of the application
Caching rushes layer (not shown).
S3: being etched the epitaxial layer, forms the first exposed region；
As shown in 2b, the epitaxial layer 20 is etched, be etched to the first semiconductor layer 21 and forms the first exposed area
Domain 24 exposes first semiconductor layer 21.Specifically, being lost using ICP etching apparatus to the epitaxial layer 20
It carves, etching depth is 1-2 μm.In order to which the width for forming first electrode and do not reduce the first exposed region described in light-emitting area is
10-30μm。
S4: ITO layer is formed on said epitaxial layer there；
As shown in Figure 2 c, ITO layer 30 is formed on the epitaxial layer 20.Specifically, using electron beam evaporation process in institute
It states 20 surface of epitaxial layer and one layer of ITO layer 30 is deposited.Wherein, the ITO layer 30 is covered on second semiconductor layer 23 and exposed
21 surface of the first semiconductor layer out.
It should be noted that vapor deposition temperature is 200-350 DEG C, oxygen flow 5-20sccm, vapor deposition chamber vacuum degree is
3.0-10.0E-5 evaporation time 50-300min.When temperature is deposited lower than 200 DEG C, ITO layer 30 can not obtain enough energy
Amount is migrated, and the ITO layer 30 of formation is second-rate, and defect is more；When temperature is deposited higher than 350 DEG C, temperature is excessively high, film energy
Measure it is excessive be not easy to deposit on epitaxial layer, deposition rate is slack-off, efficiency reduce.When oxygen flow is less than 5sccm, oxygen flow
Too low, ITO layer 30 aoxidizes insufficient, and film quality is bad, and when oxygen flow is greater than 20sccm, oxygen flow is too big, ITO layer 30
Excessive oxidation, film layer defect concentration increase.When evaporation time is less than 50min, film needs higher deposition rate can be only achieved
Required thickness, deposition rate is too fast, and atom has little time to migrate, therefore film growth quality is poor, and defect is more.
Preferably, vapor deposition temperature is 290 DEG C, oxygen flow 10sccm, and vapor deposition chamber vacuum degree is 3.0*10-5-10.0*
10-5。
Specifically, the ITO layer 30 with a thickness ofPreferably, the ITO layer 30 with a thickness ofWhen the thickness of ITO layer 30 is less thanWhen, the adhesion strength of ITO layer 30 Yu electrode can be reduced, ITO layer is worked as
30 thickness is greater thanWhen, not only increase the formation time of ITO layer 30, the light extraction efficiency of LED chip is also reduced, into one
Step ground, can also reduce the adhesion strength of ITO layer 30 Yu electrode.
In addition, the thickness when ITO layer 30 is greater thanWhen, it is unfavorable for the control of subsequent wet etching, be easy to cause
Corrosion is excessive, the phenomenon that LED chip side wall excessive erosion occurs, influences the side wall light extraction efficiency of LED chip.Due to ITO layer 30
It is covered on the second semiconductor layer 23 and exposed first semiconductor layer, 21 surface, and the side wall of chip and the first exposed region
24 sidewall surfaces do not have ITO layer 30, therefore, in subsequent corrosion, are easy the side wall excessive corrosion of LED chip.
Wherein, the material of the ITO layer 30 is indium tin oxide, but not limited to this.The ratio of indium and tin in indium tin oxide
Example is 70-99:1-30.Preferably, the ratio of indium and tin is 95:5 in indium tin oxide.Leading for ITO layer 30 is favorably improved in this way
Electric energy power, prevents carrier from flocking together, and also improves the light extraction efficiency of LED chip.
S5: performing etching the ITO layer using wet corrosion technique, forms the second exposed region；
As shown in Figure 2 d, the ITO layer 30 is performed etching using wet corrosion technique, forms the second exposed region 31,
And first exposed area 24 being exposed, wherein second exposed region 31 is etched to second semiconductor layer 23,
The diameter of second exposed region 31 is 0.5-8 μm.
Specifically, the wet corrosion technique includes: using FeCl3ITO layer 30 is lost with the mixed solution of HCl
It carves, etching period is 100-1000 seconds.Less than 100 seconds between when etched, etching is insufficient, cannot form the second exposed region 31
With first exposed region 24 cannot be exposed.It is greater than 1000 seconds between when etched, etching is excessive, by LED chip
Side wall excessive corrosion destroys the structure of LED chip, reduces light extraction efficiency.Preferably, etching period is 170 seconds.It needs to illustrate
It is, in order not to excessively reduce the area of ITO layer 30, to guarantee the current expansion of LED chip, guarantees that second electrode has enough again
Formation space, prevent electrode from falling in subsequent test, the diameter of second exposed region 31 is 0.5-8 μm.
Preferably, the diameter of second exposed region 31 is 1 μm.It is difficult when the diameter of second exposed region 31 is less than 0.5 μm
To form second electrode, and the electric conductivity of electrode is influenced, the current distribution of chip is not uniform enough.When second exposed region
When 31 diameter is greater than 8 μm, the etching area of ITO layer 30 is larger, influences the performance of ITO layer 30, makes the current distribution of chip not
It is enough uniform.
It should be noted that the diameter of the time of the thickness of ITO layer 30, wet etching and the second exposed region 31, three
Between there are certain connections.Wherein, the thickness effect of ITO layer 30 time of wet etching, and the time of wet etching
Affect the diameter of the second exposed region 31.Specifically, the thickness of ITO layer 30 is big, in order to go unwanted ITO layer 30
It removes, the time of wet etching is just grown, so that the diameter of the second exposed region 31 is with regard to big；The thickness of ITO layer 30 is small, wet etching
Time with regard to short, so that the diameter of the second exposed region 31 is with regard to small.
S6: forming first electrode in first exposed region, forms second electrode in second exposed region；
As shown in Figure 2 e, first electrode 41 is formed in first exposed region 24, in 31 shape of the second exposed region
At second electrode 42.Specifically, using electron beam evaporation plating, magnetron sputtering, plating or chemical plating process, in first exposed area
First semiconductor layer, the 21 surface deposition filling metal layer in domain 24 forms first electrode 41, the of second exposed region 31
Two semiconductor layers, 23 surface deposition filling metal layer forms second electrode 42.
It should be noted that in order to increase the contact area of first electrode 41 and the first semiconductor layer 21, second electrode 42
With the contact area of the second semiconductor layer 23, the thickness of the first electrode 41 and second electrode 42 is 1-4 μm.Wherein, institute
The thickness for stating second electrode 42 is greater than the depth of the second exposed region 31, and the second electrode 42 is covered on the ITO layer 30
Surface.In this way, increasing the contact area of second electrode 42 and ITO layer 30, to strengthen gluing for second electrode 42 and ITO layer 30
Attached power mentions the reliability of chip.Preferably, the first electrode or the second electrode by Cr, Ni,Ti、Pt、
W、Pb、Rh、Sn、Cu、One or more of be made.
It needs, further includes following step after forming first electrode 41 and second electrode 42 as shown in figure 2f
It is rapid:
Insulating layer 40 is formed on 30 surface of ITO layer and exposed first semiconductor layer, 21 surface；To described exhausted
Edge layer 400 performs etching, and first electrode 41 and second electrode 42 are exposed.
Specifically, the insulating layer 40 is made of one or more of silica, silicon nitride and aluminium oxide.
With specific embodiment, the present invention is further explained below
Embodiment 1
A kind of production method of high brightness LED chip, comprising:
One Sapphire Substrate is provided；
Epitaxial layer is formed in the Sapphire Substrate, the epitaxial layer includes being sequentially arranged in the sapphire substrate surface
N type gallium nitride layer, active layer and p-type gallium nitride layer, the epitaxial layer with a thickness of 6 μm；
The epitaxial layer is etched using ICP etching apparatus, forms the first exposed region, first exposed region
It is etched to the first semiconductor layer；
Using electron beam evaporation process p-type gallium nitride layer surface be deposited one layer of ITO layer, the ITO layer with a thickness ofWherein, vapor deposition temperature is 290 DEG C, oxygen flow 10sccm, and vapor deposition chamber vacuum degree is 5.0E-5, evaporation time
For 150min；
Using FeCl3Wet etching is carried out to ITO layer with the mixed solution of HCl, forms the second exposed region, and will be described
First exposed area exposes, and etching period is 500 seconds, and the diameter of second exposed region is 5 μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
Embodiment 2
A kind of production method of high brightness LED chip, comprising:
One Sapphire Substrate is provided；
Epitaxial layer is formed in the Sapphire Substrate, the epitaxial layer includes being sequentially arranged in the sapphire substrate surface
N type gallium nitride layer, active layer and p-type gallium nitride layer, the epitaxial layer with a thickness of 6 μm；
The epitaxial layer is etched using ICP etching apparatus, forms the first exposed region, first exposed region
It is etched to the first semiconductor layer；
Using electron beam evaporation process p-type gallium nitride layer surface be deposited one layer of ITO layer, the ITO layer with a thickness ofWherein, vapor deposition temperature is 290 DEG C, oxygen flow 10sccm, and vapor deposition chamber vacuum degree is 5.0E-5, evaporation time
For 100min；
Using FeCl3Wet etching is carried out to ITO layer with the mixed solution of HCl, forms the second exposed region, and will be described
First exposed area exposes, and etching period is 320 seconds, and the diameter of second exposed region is 3 μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
Embodiment 3
A kind of production method of high brightness LED chip, comprising:
One Sapphire Substrate is provided；
Epitaxial layer is formed in the Sapphire Substrate, the epitaxial layer includes being sequentially arranged in the sapphire substrate surface
N type gallium nitride layer, active layer and p-type gallium nitride layer, the epitaxial layer with a thickness of 6 μm；
The epitaxial layer is etched using ICP etching apparatus, forms the first exposed region, first exposed region
It is etched to the first semiconductor layer；
Using electron beam evaporation process p-type gallium nitride layer surface be deposited one layer of ITO layer, the ITO layer with a thickness ofWherein, vapor deposition temperature is 290 DEG C, oxygen flow 10sccm, and vapor deposition chamber vacuum degree is 5.0E-5, evaporation time is
80min；
Using FeCl3Wet etching is carried out to ITO layer with the mixed solution of HCl, forms the second exposed region, and will be described
First exposed area exposes, and etching period is 170 seconds, and the diameter of second exposed region is 1 μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
Comparative example 1
A kind of production method of LED chip, comprising:
One Sapphire Substrate is provided；
Epitaxial layer is formed in the Sapphire Substrate, the epitaxial layer includes being sequentially arranged in the sapphire substrate surface
N type gallium nitride layer, active layer and p-type gallium nitride layer, the epitaxial layer with a thickness of 6 μm；
The epitaxial layer is etched using ICP etching apparatus, forms the first exposed region, first exposed region
It is etched to the first semiconductor layer；
Using electron beam evaporation process p-type gallium nitride layer surface be deposited one layer of ITO layer, the ITO layer with a thickness ofWherein, vapor deposition temperature is 290 DEG C, oxygen flow 10sccm, and vapor deposition chamber vacuum degree is 5.0E-5, evaporation time
For 200min；
Using FeCl3Wet etching is carried out to ITO layer with the mixed solution of HCl, forms the second exposed region, and will be described
First exposed area exposes, and etching period is 600 seconds, and the diameter of second exposed region is 7 μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
Comparative example 2
A kind of production method of high brightness LED chip, comprising:
One Sapphire Substrate is provided；
Epitaxial layer is formed in the Sapphire Substrate, the epitaxial layer includes being sequentially arranged in the sapphire substrate surface
N type gallium nitride layer, active layer and p-type gallium nitride layer, the epitaxial layer with a thickness of 6 μm；
The epitaxial layer is etched using ICP etching apparatus, forms the first exposed region, first exposed region
It is etched to the first semiconductor layer；
Using electron beam evaporation process p-type gallium nitride layer surface be deposited one layer of ITO layer, the ITO layer with a thickness ofWherein, vapor deposition temperature is 290 DEG C, oxygen flow 10sccm, and vapor deposition chamber vacuum degree is 5.0E-5, evaporation time is
70min；
Using FeCl3Wet etching is carried out to ITO layer with the mixed solution of HCl, forms the second exposed region, and will be described
First exposed area exposes, and etching period is 100 seconds, and the diameter of second exposed region is 0.5 μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
Above-described embodiment 1-3 is the specific embodiment of the production method of the application high brightness LED chip, comparative example 1-
2 be the embodiment of the production method of existing LED chip.Wherein, the size of said chip is consistent, will be in above-described embodiment 1-3
The LED chip that is made in the high brightness LED chip and comparative example 1-2 being made carries out bonding wire aging process and bright
Degree test, as a result as follows:
| Group | Ageing results | Brightness (lm) |
| Embodiment 1 | 10% there is bonding wire power down pole phenomenon | 15 |
| Embodiment 2 | 8% there is bonding wire power down pole phenomenon | 15 |
| Embodiment 3 | 3% there is bonding wire power down pole phenomenon | 16 |
| Embodiment 4 | 12% there is bonding wire power down pole phenomenon | 12 |
| Embodiment 5 | 11% there is bonding wire power down pole phenomenon | 13 |
It can be seen that the appearance that LED chip is made using the production method of existing LED chip from above-mentioned test result
Easily there is bonding wire power down pole phenomenon, and brightness is lower.Wherein, the diameter and etch period of the thickness of ITO layer, the second exposed region
There is important influence to the photoelectric properties of LED chip.Specifically, the thickness when ITO layer is less thanWhen, electrode can be reduced
With the adhesion strength of bonding wire, the brightness of chip is reduced.When the thickness of ITO layer is greater thanWhen, not only increase the formation of ITO layer
Time increases the time of wet etching, increases the area of the second exposed region, also reduces the light extraction efficiency of LED chip, further
Ground can also reduce the adhesion strength of conductive electrode and bonding wire.
Correspondingly, as shown in figure 2f, this application provides a kind of high brightness LED chips, comprising:
Substrate 10；
Epitaxial layer 20 set on 10 surface of substrate, wherein the epitaxial layer 20 includes set on the first of 10 surface of substrate
Semiconductor layer 21, the active layer 22 set on 21 surface of the first semiconductor layer, set on the second the half of 22 surface of active layer
Conductor layer 23；
First electrode 41 on the first semiconductor layer 21；
Second electrode 42 and ITO layer 30 on the second semiconductor layer 23, the ITO layer with a thickness of
Insulating layer 40 set on 30 surface of ITO layer and the first semiconductor layer surface.
Above disclosed is only a preferred embodiment of the present invention, cannot limit the power of the present invention with this certainly
Sharp range, therefore equivalent changes made in accordance with the claims of the present invention, are still within the scope of the present invention.
Claims (8)
1. a kind of production method of high brightness LED chip, comprising:
One substrate is provided；
Epitaxial layer is formed in the substrate surface, the epitaxial layer includes the first semiconductor for being sequentially arranged in the substrate surface
Layer, active layer and the second semiconductor layer；
The epitaxial layer is performed etching, the first exposed region is formed, first exposed region is etched to the first semiconductor layer；
Form ITO layer on said epitaxial layer there, the ITO layer with a thickness of
Using FeCl3ITO layer is etched with HCl, etching period is 100-170 second, the second exposed region of formation, and by institute
It states the first exposed region to expose, second exposed region is etched to second semiconductor layer, second exposed area
The diameter in domain is 0.5-1 μm；
First electrode is formed in first exposed region, forms second electrode in second exposed region.
2. the production method of high brightness LED chip according to claim 1, which is characterized in that use electron beam evaporation work
One layer of ITO layer is deposited in the epi-layer surface in skill, wherein and vapor deposition temperature is 200-350 DEG C, oxygen flow 5-20sccm,
Vapor deposition chamber vacuum degree is 3.0-10.0E-5, evaporation time 50-300min.
3. the production method of high brightness LED chip according to claim 1, which is characterized in that first exposed region
Width be 10-30 μm.
4. the production method of high brightness LED chip according to claim 1, which is characterized in that the first electrode or institute
State second electrode by Cr, Ni,Ti、Pt、W、Pb、Rh、Sn、Cu、One or more of be made.
5. the production method of high brightness LED chip according to claim 1, which is characterized in that formed first electrode and
It is further comprising the steps of after second electrode:
Insulating layer is formed on the ITO layer surface and exposed first semiconductor layer surface, and the insulating layer is carried out
Etching, first electrode and second electrode are exposed.
6. the production method of high brightness LED chip according to claim 5, which is characterized in that the thickness of the insulating layer
For
7. the production method of high brightness LED chip according to claim 6, which is characterized in that the insulating layer is by aoxidizing
One or more of silicon, silicon nitride and aluminium oxide are made.
8. a kind of high brightness LED chip, using the production method of such as described in any item high brightness LED chips of claim 1-7
It is made, comprising:
Substrate；
Set on the epitaxial layer of the substrate surface, wherein the epitaxial layer includes the first semiconductor layer set on substrate surface, if
In the active layer of first semiconductor layer surface, set on the second semiconductor layer of the active layer surface；
First electrode on the first semiconductor layer；
Second electrode and ITO layer on the second semiconductor layer, the ITO layer with a thickness of
Insulating layer set on ITO layer surface and the first semiconductor layer surface.
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| CN103094442A (en) * | 2013-01-31 | 2013-05-08 | 马鞍山圆融光电科技有限公司 | Nitride light emitting diode (LED) and preparation method thereof |
| CN104269477A (en) * | 2014-09-25 | 2015-01-07 | 西安神光皓瑞光电科技有限公司 | Method for manufacturing P-type ohmic contact layer with high ultraviolet transmittance |
| CN105070799A (en) * | 2015-09-01 | 2015-11-18 | 湘能华磊光电股份有限公司 | An LED chip manufacture method |
| CN106549087A (en) * | 2016-10-28 | 2017-03-29 | 湘能华磊光电股份有限公司 | A kind of preparation method of high brightness LED chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103094442A (en) * | 2013-01-31 | 2013-05-08 | 马鞍山圆融光电科技有限公司 | Nitride light emitting diode (LED) and preparation method thereof |
| CN104269477A (en) * | 2014-09-25 | 2015-01-07 | 西安神光皓瑞光电科技有限公司 | Method for manufacturing P-type ohmic contact layer with high ultraviolet transmittance |
| CN105070799A (en) * | 2015-09-01 | 2015-11-18 | 湘能华磊光电股份有限公司 | An LED chip manufacture method |
| CN106549087A (en) * | 2016-10-28 | 2017-03-29 | 湘能华磊光电股份有限公司 | A kind of preparation method of high brightness LED chip |
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