CN107980177A - Thin film transistor (TFT) and the equipment with thin film transistor (TFT) - Google Patents

Thin film transistor (TFT) and the equipment with thin film transistor (TFT) Download PDF

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Publication number
CN107980177A
CN107980177A CN201680042736.2A CN201680042736A CN107980177A CN 107980177 A CN107980177 A CN 107980177A CN 201680042736 A CN201680042736 A CN 201680042736A CN 107980177 A CN107980177 A CN 107980177A
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CN
China
Prior art keywords
film transistor
tft
thin film
auxiliary electrode
grid
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Granted
Application number
CN201680042736.2A
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Chinese (zh)
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CN107980177B (en
Inventor
陈小明
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Shenzhen Royole Technologies Co Ltd
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Shenzhen Royole Technologies Co Ltd
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Publication of CN107980177A publication Critical patent/CN107980177A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

A kind of thin film transistor (TFT),Including substrate (10),Grid (11),At least one auxiliary electrode (12),Insulating layer (13),Semiconductor layer (14),Source electrode (15) and drain electrode (16),The grid (11) and at least one auxiliary electrode (12) are arranged at intervals arranged on the substrate (10) surface,The insulating layer (13) covers the substrate (10),Grid (11) and at least one auxiliary electrode (12),The semiconductor layer (14) is located on the insulating layer (13),And orthographic projection covers the grid (11) and at least one auxiliary electrode (12),The source electrode (15) is connected the semiconductor layer (14) opposite sides with drain electrode (16) and forms channel region,And at least one auxiliary electrode (12) is connected with the drain electrode (16).There is provided a kind of equipment with the thin film transistor (TFT) at the same time.

Description

Thin film transistor (TFT) and the equipment with thin film transistor (TFT)
Technical field
The present invention relates to thin-film transistor technologies field, more particularly to a kind of thin film transistor (TFT) of high-pressure type and there is film The equipment of transistor.
Background technology
High-pressure type thin film transistor (TFT) can be applied in printing, scanning device, and in MEMS, plane x-ray source In have application prospect.It is a kind of basic high voltage thin film transistor structure to deviate drain electrode structure, wherein, have between grid and drain electrode Certain deviation amount so that the high voltage in drain electrode mainly falls on off-set construction, so as to improve the breakdown voltage of thin film transistor (TFT). Deflected length has a significant impact the breakdown voltage for deviating drain electrode structure thin film transistor (TFT).But the problem of structure is, partially It is very high to move the resistance of the semiconductor layer in area, seriously affects its current driving ability.
The content of the invention
The embodiment of the present invention provides a thin film transistor (TFT), can improve electric current drive at the same time not seriously affecting breakdown voltage It is dynamic.
A kind of thin film transistor (TFT) described herein, including substrate, grid, at least one auxiliary electrode, insulating layer, partly lead Body layer, source electrode and drain electrode, the grid and at least one auxiliary electrode are arranged at intervals arranged on the substrate surface, described exhausted Edge layer covers substrate, grid and at least one auxiliary electrode, and the semiconductor layer is located on the insulating layer, and orthographic projection The grid and at least one auxiliary electrode are covered, the source electrode connects the semiconductor layer opposite sides with drain electrode and formed Channel region, and at least one auxiliary electrode is connected with the drain electrode.
Wherein, the size of the spacing between at least one auxiliary electrode and the grid and output current are negatively correlated.
Wherein, the auxiliary electrode is one, and the spacing distance between the auxiliary electrode and the grid is more than Zero.
Wherein, the auxiliary electrode is multiple and interval setting and the grid side.
Wherein, the width dimensions of the auxiliary electrode adjacent with the grid and output current positive correlation.
Wherein, at least one auxiliary electrode is formed with the grid for same processing step.
Wherein, at least one auxiliary electrode is connected with the drain electrode by via.
Wherein, the film crystal is equipped with the circuit at least one auxiliary electrode power supply.
Equipment described herein with thin film transistor (TFT), including the thin film transistor (TFT).
Thin film transistor (TFT) described herein sets auxiliary electrode in offset area and is connected with drain electrode, and auxiliary electrode is half Free charge is induced in conductor layer, so as to reduce the resistance of the semiconductor in drain bias area and optimize electric field distribution, Jin Erzeng Current driving ability is added.
Brief description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, below will be to needed in the embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ability For the those of ordinary skill of domain, without creative efforts, it can also be obtained according to these attached drawings other attached Figure.
Fig. 1 is a kind of structure diagram for the thin film transistor (TFT) that the application provides.
Fig. 2 is another structure diagram for the thin film transistor (TFT) that the application provides.
Fig. 3 is the electric current transfer curve figure of the thin film transistor (TFT) shown in Fig. 2.
Fig. 4 is electric field scatter chart of the gate surface of the thin film transistor (TFT) shown in Fig. 2 in source and drain extreme direction.
Embodiment
Below in conjunction with the attached drawing in embodiment of the present invention, the technical solution in embodiment of the present invention is carried out clear Chu, be fully described by.
The application provides a kind of thin film transistor (TFT) and the equipment with thin film transistor (TFT).The thin film transistor (TFT) is high swaging Offset drain electrode structure.The equipment with thin film transistor (TFT) include but not limited to printing, scanning device, MEMS, Plane x-ray source etc..
Referring to Fig. 1, thin film transistor (TFT) described herein include substrate 10, grid 11, it is at least one auxiliary electricity 12, absolutely Edge layer 13, semiconductor layer 14, source electrode 15 and drain electrode 16, the grid 11 and at least one auxiliary electrode 12 are arranged on the lining 10 surface of bottom is arranged at intervals, and the insulating layer 13 covers the substrate 10, grid 11 and at least one auxiliary electrode 12, and described half Conductor layer 14 is located on the insulating layer 13, and orthographic projection covers the grid 11 and at least one auxiliary electrode 12, institute State source electrode 15 and 14 opposite sides of the semiconductor layer formation channel region, and at least one auxiliary electricity are connected with drain electrode 16 Pole 12 is connected with the drain electrode 16.
Specifically, the thin film transistor (TFT) of the application is offset drain electrode structure, positioned at the lower section of semiconductor layer 14, the grid 11 It is partial to 15 present position of source electrode positioned at channel region, grid 11 is longer to drain electrode the distance between 16;Auxiliary electrode 12 In close drain electrode 16 in the offset area.Grid 11 is located at same layer with least one auxiliary electrode 12.It is described at least one Auxiliary electrode is connected with the drain electrode 16 by via, and the via is arranged on channel region periphery.According to the design needs, institute State the circuit (not shown) that can be equipped with film crystal as auxiliary electrode power supply.
Further, the size and output current of the spacing between at least one auxiliary electrode 12 and the grid 11 It is negatively correlated.In the present embodiment, the auxiliary electrode 12 be one, and between the auxiliary electrode 12 and the grid 11 between It is more than zero every S distances.Also just say, spacing is needed between the auxiliary electrode 12 and the grid 11, after powered up, the spacing S is smaller, and channel region electric field is bigger, and electric current also just increase, but breakdown voltage reduces, can determine most preferably according to specific application S values.
The resistance of high-pressure type thin film transistor (TFT) offset area's semiconductor layer of the prior art is very big, the high voltage master in drain electrode Fall on off-set construction, degree is larger between deviating area's grid and draining, and the resistance of semiconductor layer is very high;And the application's is thin Film transistor is provided with auxiliary electrode 12 in offset area, and in normal work, auxiliary electrode 12 induces in semiconductor layer 14 Free charge, so as to reduce the resistance of the semiconductor in the offset of drain electrode 16 area and optimize electric field distribution, and then adds electric current, then The current driving ability of thin film transistor (TFT) gets a promotion.Simultaneously as auxiliary electrode 12 is connected with drain electrode 16, therefore between the two Not parasitic capacitance.
Referring to Fig. 2, in another embodiment, the auxiliary electrode is multiple and interval setting and the grid 11 1 Side.Specifically, the auxiliary electrode includes the first auxiliary electrode 121, the second auxiliary electrode 122 and the 3rd auxiliary electrode 123.Partially The High Output Current and breakdown voltage for setting multiple auxiliary electrodes to be conducive to carry thin film transistor (TFT) are moved in area.
Further, the width dimensions of the auxiliary electrode 121 adjacent with the grid 11 and output current positive correlation.This In embodiment, the width close to the first auxiliary electrode 121 of grid 11 is bigger, and output current is bigger.
First auxiliary electrode 121, the second auxiliary electrode 122 and the 3rd auxiliary electrode 123 be arranged at intervals and with interval S 1, S2, the vertical interval between the 3rd auxiliary electrode 123 and drain electrode be S3, close to grid 11 the first auxiliary electrode 121 and The distance of grid 11 is smaller, and electric current is bigger;And first area opposite between auxiliary electrode 121 and grid 11 it is smaller, therefore post Raw capacitance is very small.
Refer to Fig. 3 and Fig. 4, be in the case of above-mentioned multiple auxiliary electrodes electric current transfer curve figure and gate surface in source and drain Electric field scatter chart in extreme direction, wherein, new structure 1-5 described in figure be different embodiment of the present invention with And the embodiment simply changed according to the present invention, such as the change of the number of auxiliary electrode.It can be seen from figure 3 that employ this Shen It please deviate drain current ID two quantity smaller than the ID of the thin film transistor (TFT) of ordinary construction of the thin film transistor (TFT) of drain electrode structure It is more than level;As seen from Figure 4, the maximum electric field for deviating the thin film transistor (TFT) of drain electrode structure (near grid right edge, determines The breakdown voltage of high voltage thin film transistor) smaller than general thin transistor arrangement thin film transistor (TFT) nearly an order of magnitude.From figure 3rd, it 4 can be seen that, the introducing of auxiliary electrode, make the I of high voltage thin film transistorDGreatly increase, and corresponding maximum electric field does not have It substantially change, this explanation, the breakdown voltage of the thin film transistor (TFT) of the application is with deviating drain electrode structure high voltage thin film transistor almost Unanimously, and current driving ability really greatly increases, so ensure that the current driving ability of thin film transistor (TFT), and maintain higher Breakdown voltage.
Further, at least one auxiliary electrode 12 is formed with the grid 11 for same processing step.Due to auxiliary Help electrode 12 and grid 11 while prepare, therefore, the signal wire and preparation process of thin film transistor (TFT) do not increase.
The above is the preferred embodiment of the present invention, it is noted that for those skilled in the art For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as Protection scope of the present invention.

Claims (9)

1. a kind of thin film transistor (TFT), it is characterised in that including substrate, grid, at least one auxiliary electrode, insulating layer, semiconductor Layer, source electrode and drain electrode, the grid and at least one auxiliary electrode are arranged at intervals arranged on the substrate surface, the insulation Layer covers substrate, grid and at least one auxiliary electrode, and the semiconductor layer is located on the insulating layer, and orthographic projection is covered The grid and at least one auxiliary electrode are covered, the source electrode connects the semiconductor layer opposite sides with drain electrode and forms ditch Road region, and at least one auxiliary electrode is connected with the drain electrode.
2. thin film transistor (TFT) as claimed in claim 1, it is characterised in that at least one auxiliary electrode and the grid it Between spacing size and output current it is negatively correlated.
3. thin film transistor (TFT) as claimed in claim 2, it is characterised in that the auxiliary electrode is one, and the auxiliary Spacing distance between electrode and the grid is more than zero.
4. thin film transistor (TFT) as claimed in claim 2, it is characterised in that the auxiliary electrode is multiple and be arranged at intervals at institute State grid side.
5. thin film transistor (TFT) as claimed in claim 2, it is characterised in that the broad-ruler of the auxiliary electrode adjacent with the grid Very little and output current positive correlation positive correlation.
6. thin film transistor (TFT) as claimed in claim 1, it is characterised in that at least one auxiliary electrode is with the grid Same processing step is formed.
7. thin film transistor (TFT) as claimed in claim 1, it is characterised in that at least one auxiliary electrode and the drain electrode are logical Via connects.
8. thin film transistor (TFT) as claimed in claim 7, it is characterised in that the film crystal is equipped with to be described at least one The circuit of auxiliary electrode power supply.
9. a kind of equipment with thin film transistor (TFT), it is characterised in that it is thin that the equipment includes claim 1-8 any one of them Film transistor.
CN201680042736.2A 2016-12-27 2016-12-27 Thin film transistor and device having the same Active CN107980177B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/112348 WO2018119654A1 (en) 2016-12-27 2016-12-27 Thin film transistor and device provided with thin film transistor

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CN107980177A true CN107980177A (en) 2018-05-01
CN107980177B CN107980177B (en) 2021-10-22

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5952677A (en) * 1997-12-27 1999-09-14 Lg Semicon Co., Ltd. Thin film transistor and method for manufacturing the same
US20100276686A1 (en) * 2009-04-29 2010-11-04 Samsung Electronics Co., Ltd. Thin film transistor substrate and method of fabricating the same
CN102280489A (en) * 2010-06-08 2011-12-14 三星移动显示器株式会社 Thin film transistor with offset structure

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3111985B2 (en) * 1998-06-16 2000-11-27 日本電気株式会社 Field-effect transistor
JP6208971B2 (en) * 2012-09-14 2017-10-04 ルネサスエレクトロニクス株式会社 Semiconductor device and manufacturing method of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5952677A (en) * 1997-12-27 1999-09-14 Lg Semicon Co., Ltd. Thin film transistor and method for manufacturing the same
US20100276686A1 (en) * 2009-04-29 2010-11-04 Samsung Electronics Co., Ltd. Thin film transistor substrate and method of fabricating the same
CN102280489A (en) * 2010-06-08 2011-12-14 三星移动显示器株式会社 Thin film transistor with offset structure

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WO2018119654A1 (en) 2018-07-05

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Address after: A4-1501, Kexing Science Park, 15 Keyuan Road, Science Park, Nanshan District, Shenzhen City, Guangdong Province

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