CN107980177B - Thin film transistor and device having thin film transistor - Google Patents
Thin film transistor and device having thin film transistor Download PDFInfo
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- CN107980177B CN107980177B CN201680042736.2A CN201680042736A CN107980177B CN 107980177 B CN107980177 B CN 107980177B CN 201680042736 A CN201680042736 A CN 201680042736A CN 107980177 B CN107980177 B CN 107980177B
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- 239000010409 thin film Substances 0.000 title claims abstract description 51
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 230000002596 correlated effect Effects 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 230000015556 catabolic process Effects 0.000 description 8
- 230000005684 electric field Effects 0.000 description 6
- 230000003071 parasitic effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
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- Thin Film Transistor (AREA)
Abstract
一种薄膜晶体管，包括衬底(10)、栅极(11)、至少一个辅助电极(12)、绝缘层(13)、半导体层(14)、源极(15)及漏极(16)，所述栅极(11)和所述至少一个辅助电极(12)设于所述衬底(10)表面间隔设置，所述绝缘层(13)覆盖所述衬底(10)、栅极(11)及至少一个辅助电极(12)，所述半导体层(14)位于所述绝缘层(13)上，且正投影覆盖所述栅极(11)和所述至少一个辅助电极(12)，所述源极(15)与漏极(16)连接所述半导体层(14)相对两侧形成沟道区域，并且所述至少一个辅助电极(12)与所述漏极(16)连接。同时提供一种具有所述薄膜晶体管的设备。
A thin film transistor, comprising a substrate (10), a gate electrode (11), at least one auxiliary electrode (12), an insulating layer (13), a semiconductor layer (14), a source electrode (15) and a drain electrode (16), The gate electrode (11) and the at least one auxiliary electrode (12) are arranged at intervals on the surface of the substrate (10), and the insulating layer (13) covers the substrate (10) and the gate electrode (11). ) and at least one auxiliary electrode (12), the semiconductor layer (14) is located on the insulating layer (13), and the orthographic projection covers the gate (11) and the at least one auxiliary electrode (12), so The source electrode (15) is connected with the drain electrode (16) to form a channel region on opposite sides of the semiconductor layer (14), and the at least one auxiliary electrode (12) is connected with the drain electrode (16). At the same time, a device having the thin film transistor is provided.
Description
Technical Field
The invention relates to the technical field of thin film transistors, in particular to a high-voltage thin film transistor and equipment with the thin film transistor.
Background
The high-voltage thin film transistor can be applied to printing and scanning equipment, and has application prospect in micro-electro-mechanical systems and planar X-ray sources. The offset drain structure is a basic high-voltage thin film transistor structure, wherein a certain offset exists between a grid electrode and a drain electrode, so that high voltage on the drain electrode mainly falls on the offset structure, and the breakdown voltage of the thin film transistor is improved. The offset length has a significant effect on the breakdown voltage of the offset drain structure thin film transistor. However, this structure has a problem in that the resistance of the semiconductor layer in the offset region is high, which seriously affects the current driving capability thereof.
Disclosure of Invention
The embodiment of the invention provides a thin film transistor which can improve current drive without seriously influencing breakdown voltage.
The application discloses a thin film transistor, including substrate, grid, at least one auxiliary electrode, insulating layer, semiconductor layer, source electrode and drain electrode, the grid with at least one auxiliary electrode locates the interval of substrate surface sets up, the insulating layer covers substrate, grid and at least one auxiliary electrode, semiconductor layer is located on the insulating layer, and orthographic projection covers the grid with at least one auxiliary electrode, the source electrode is connected with the drain electrode the relative both sides of semiconductor layer form the channel region, and at least one auxiliary electrode with the drain electrode is connected.
Wherein a size of a spacing between the at least one auxiliary electrode and the gate electrode is inversely related to an output current.
Wherein the auxiliary electrode is one, and a separation distance between the auxiliary electrode and the gate electrode is greater than zero.
The auxiliary electrodes are arranged on one side of the grid at intervals.
Wherein a width dimension of the auxiliary electrode adjacent to the gate electrode is positively correlated with an amount of output current.
Wherein the at least one auxiliary electrode and the gate electrode are formed in the same process step.
Wherein the at least one auxiliary electrode is connected with the drain electrode through a via hole.
And a circuit for supplying power to the at least one auxiliary electrode is arranged on the thin film crystal.
The device with the thin film transistor comprises the thin film transistor.
The thin film transistor is provided with the auxiliary electrode in the offset area and connected with the drain electrode, the auxiliary electrode induces free charges in the semiconductor layer, and therefore resistance of a semiconductor in the offset area of the drain electrode is reduced, electric field distribution is optimized, and current driving capacity is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a thin film transistor provided in the present application.
Fig. 2 is a schematic view of another structure of the thin film transistor provided in the present application.
Fig. 3 is a graph of current transfer for the thin film transistor shown in fig. 2.
Fig. 4 is a graph showing an electric field distribution in the source and drain directions of the gate surface of the thin film transistor shown in fig. 2.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
The application provides a thin film transistor and a device having the same. The thin film transistor is of a high-voltage offset drain structure. Such devices with thin film transistors include, but are not limited to, printing, scanning devices, micro-electro-mechanical systems, planar X-ray sources, and the like.
Referring to fig. 1, the thin film transistor described herein includes a substrate 10, a gate 11, at least one auxiliary electrode 12, an insulating layer 13, a semiconductor layer 14, a source 15, and a drain 16, where the gate 11 and the at least one auxiliary electrode 12 are disposed on a surface of the substrate 10 at intervals, the insulating layer 13 covers the substrate 10, the gate 11, and the at least one auxiliary electrode 12, the semiconductor layer 14 is disposed on the insulating layer 13, and covers the gate 11 and the at least one auxiliary electrode 12 in an orthographic projection manner, the source 15 and the drain 16 are connected to opposite sides of the semiconductor layer 14 to form a channel region, and the at least one auxiliary electrode 12 is connected to the drain 16.
Specifically, the thin film transistor of the present application is an offset drain structure, and is located below the semiconductor layer 14, the gate 11 is located at a position where the channel region is offset from the source 15, and a distance between the gate 11 and the drain 16 is long; the auxiliary electrode 12 is located within the offset region near the drain 16. The gate electrode 11 is located at the same layer as the at least one auxiliary electrode 12. The at least one auxiliary electrode is connected to the drain 16 by a via hole, which is provided in the periphery of the channel region. According to the design requirement, a circuit (not shown) for supplying power to the auxiliary electrode can be arranged on the thin film crystal.
Further, the size of the space between the at least one auxiliary electrode 12 and the gate electrode 11 is inversely related to the output current. In this embodiment, the number of the auxiliary electrodes 12 is one, and the distance S between the auxiliary electrodes 12 and the gate 11 is greater than zero. That is, a space is required between the auxiliary electrode 12 and the gate electrode 11, and after power is applied, the smaller the space S, the larger the electric field in the channel region, the larger the current, but the smaller the breakdown voltage, and the optimal value of S can be determined according to the specific application.
In the prior art, the resistance of a semiconductor layer in an offset region of a high-voltage thin film transistor is very high, the high voltage on a drain electrode mainly falls on an offset structure, the degree between a grid electrode and the drain electrode in the offset region is relatively large, and the resistance of the semiconductor layer is very high; the thin film transistor is provided with the auxiliary electrode 12 in the offset region, and when the thin film transistor works normally, the auxiliary electrode 12 induces free charges in the semiconductor layer 14, so that the resistance of the semiconductor in the offset region of the drain electrode 16 is reduced, the electric field distribution is optimized, the current is increased, and the current driving capability of the thin film transistor is improved. Meanwhile, since the auxiliary electrode 12 is connected to the drain electrode 16, there is no parasitic capacitance therebetween.
Referring to fig. 2, in another embodiment, the plurality of auxiliary electrodes are disposed at an interval at one side of the gate 11. Specifically, the auxiliary electrodes include a first auxiliary electrode 121, a second auxiliary electrode 122, and a third auxiliary electrode 123. The arrangement of the plurality of auxiliary electrodes in the offset region is beneficial to improving the high output current and breakdown voltage of the thin film transistor.
Further, the width dimension of the auxiliary electrode 121 adjacent to the gate electrode 11 is positively correlated with the amount of output current. In this embodiment, the larger the width of the first auxiliary electrode 121 near the gate electrode 11, the larger the output current.
The first auxiliary electrode 121, the second auxiliary electrode 122 and the third auxiliary electrode 123 are disposed at intervals and have spacings S1 and S2, the vertical spacing between the third auxiliary electrode 123 and the drain is S3, and the smaller the distance between the first auxiliary electrode 121 close to the gate 11 and the gate 11 is, the larger the current is; in addition, the area between the first auxiliary electrode 121 and the gate electrode 11 is small, so that the parasitic capacitance is very small.
Please refer toFig. 3 and fig. 4 are graphs of current transfer curves and graphs of electric field distribution curves of the gate surface in the source-drain direction under the condition of the plurality of auxiliary electrodes, where the novel structures 1 to 5 in the graphs are different embodiments of the present invention and implementation manners that are simply changed according to the present invention, such as changes in the number of auxiliary electrodes. As can be seen from fig. 3, the drain current ID of the thin film transistor adopting the offset drain structure of the present application is smaller than the ID of the thin film transistor of the conventional structure by more than two orders of magnitude; as can be seen from fig. 4, the highest electric field (located near the right edge of the gate, which determines the breakdown voltage of the high voltage tft) of the tft with the offset drain structure is approximately an order of magnitude smaller than that of the tft with the conventional tft structure. As can be seen from FIGS. 3 and 4, the introduction of the auxiliary electrode enables the I of the high voltage thin film transistorDThe breakdown voltage of the thin film transistor is almost consistent with that of a high-voltage thin film transistor with an offset drain structure, and the current driving capability is greatly increased, so that the current driving capability of the thin film transistor is ensured, and higher breakdown voltage is maintained.
Further, the at least one auxiliary electrode 12 and the gate 11 are formed in the same process step. Since the auxiliary electrode 12 is formed simultaneously with the gate electrode 11, signal lines and manufacturing steps of the thin film transistor are not increased.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.
Claims (9)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2016/112348 WO2018119654A1 (en) | 2016-12-27 | 2016-12-27 | Thin film transistor and device provided with thin film transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107980177A CN107980177A (en) | 2018-05-01 |
| CN107980177B true CN107980177B (en) | 2021-10-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680042736.2A Expired - Fee Related CN107980177B (en) | 2016-12-27 | 2016-12-27 | Thin film transistor and device having thin film transistor |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN107980177B (en) |
| WO (1) | WO2018119654A1 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5952677A (en) * | 1997-12-27 | 1999-09-14 | Lg Semicon Co., Ltd. | Thin film transistor and method for manufacturing the same |
| CN102280489A (en) * | 2010-06-08 | 2011-12-14 | 三星移动显示器株式会社 | Thin film transistor with offset structure |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3111985B2 (en) * | 1998-06-16 | 2000-11-27 | 日本電気株式会社 | Field-effect transistor |
| KR101579453B1 (en) * | 2009-04-29 | 2015-12-24 | 삼성디스플레이 주식회사 | Thin film transistor substrate and method of fabricating thereof |
| JP6208971B2 (en) * | 2012-09-14 | 2017-10-04 | ルネサスエレクトロニクス株式会社 | Semiconductor device and manufacturing method of semiconductor device |
-
2016
- 2016-12-27 CN CN201680042736.2A patent/CN107980177B/en not_active Expired - Fee Related
- 2016-12-27 WO PCT/CN2016/112348 patent/WO2018119654A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5952677A (en) * | 1997-12-27 | 1999-09-14 | Lg Semicon Co., Ltd. | Thin film transistor and method for manufacturing the same |
| CN102280489A (en) * | 2010-06-08 | 2011-12-14 | 三星移动显示器株式会社 | Thin film transistor with offset structure |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107980177A (en) | 2018-05-01 |
| WO2018119654A1 (en) | 2018-07-05 |
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Address after: A4-1501, Kexing Science Park, 15 Keyuan Road, Science Park, Nanshan District, Shenzhen City, Guangdong Province Applicant after: Shenzhen Ruoyu Technology Co.,Ltd. Address before: A4-1501, Kexing Science Park, 15 Keyuan Road, Science Park, Nanshan District, Shenzhen City, Guangdong Province Applicant before: SHENZHEN ROYOLE TECHNOLOGIES Co.,Ltd. |
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Granted publication date: 20211022 |