CN107887435A - Enhanced GaN HEMT preparation method - Google Patents
Enhanced GaN HEMT preparation method Download PDFInfo
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- CN107887435A CN107887435A CN201711220165.XA CN201711220165A CN107887435A CN 107887435 A CN107887435 A CN 107887435A CN 201711220165 A CN201711220165 A CN 201711220165A CN 107887435 A CN107887435 A CN 107887435A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 18
- 238000002161 passivation Methods 0.000 claims abstract description 16
- 230000004888 barrier function Effects 0.000 claims abstract description 14
- 238000000137 annealing Methods 0.000 claims abstract description 10
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000000407 epitaxy Methods 0.000 claims abstract description 8
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 230000000873 masking effect Effects 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims description 33
- 229910002704 AlGaN Inorganic materials 0.000 claims description 19
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052681 coesite Inorganic materials 0.000 claims description 7
- 229910052906 cristobalite Inorganic materials 0.000 claims description 7
- 239000000377 silicon dioxide Substances 0.000 claims description 7
- 229910052682 stishovite Inorganic materials 0.000 claims description 7
- 229910052905 tridymite Inorganic materials 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- 230000008859 change Effects 0.000 claims description 5
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 4
- 238000000231 atomic layer deposition Methods 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 229910052593 corundum Inorganic materials 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 3
- -1 InAlN Inorganic materials 0.000 claims description 2
- 238000005566 electron beam evaporation Methods 0.000 claims description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims 1
- 238000001947 vapour-phase growth Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 6
- 229910052749 magnesium Inorganic materials 0.000 description 6
- 239000011777 magnesium Substances 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 241000209094 Oryza Species 0.000 description 2
- 235000007164 Oryza sativa Nutrition 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 235000009566 rice Nutrition 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000000277 atomic layer chemical vapour deposition Methods 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000003306 harvesting Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000002073 nanorod Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
A kind of enhanced GaN HEMT preparation method, comprises the following steps：With the method for Metalorganic chemical vapor deposition successively epitaxial buffer layer, channel layer, barrier layer and p-type cap layers on substrate；Mask layer is prepared in the p-type cap layers；Patterned masking layer, expose the p-type cap layers of grid region part, form sample；The epitaxial p-type layer in the p-type cap layers that sample exposes, form p-type grid, i.e. constituency secondary epitaxy p-type grid；Remove mask layer；Etched downwards in the both sides of p-type cap layers, etching depth is reached in channel layer, is formed table top in the both sides of channel layer, is formed mesa-isolated；Source electrode and drain electrode, annealing are prepared in the p-type cap layers of the both sides of p-type grid；Gate electrode is prepared on the p-type grid, forms device；Prepare passivation layer on device, the thickness of the passivation layer is higher than p-type grid, and by the passivation layer opening of source electrode, drain electrode and gate electrode region, that is, exposes source electrode, drain electrode and gate electrode, complete to prepare.
Description
Technical field
The invention belongs to technical field of semiconductors, particularly relates to a kind of preparation side of enhancement type high electron mobility transistor
Method, and the semiconductor devices comprising the transistor.
Background technology
GaN base power electronic devices had attracted the attention of many people in the last few years.GaN material can be with AlGaN, InGaN etc.
Material forms heterojunction structure.Because piezoelectricity and spontaneous polarization effect be present in abarrier layer material, therefore in heterojunction boundary
Place can form the two-dimensional electron gas (2DEG) of high concentration.Because GaN material has big energy gap, high electron mobility, high electricity
The advantages that sub- saturated velocity and big disruptive field intensity, GaN HEMT microwave power field and circuit field in nearest more than ten year's harvest
Study hotspot.
Although GaN HEMT have many advantages, many problems are also encountered, one of them is exactly that common process makes
GaN HEMT be depletion type (threshold voltage vt h ＜ 0V).Because shut-off voltage is negative pressure, depletion type HEMT is than enhanced
(Vth ＞ 0V) HEMT circuit designs are more complex, and which increase the cost of HEMT circuits.Enhanced HEMT be speed-sensitive switch,
One important component of high temperature GaN integrated circuits (RFIC) and microwave monolithic integrated circuit (MMIC).From the angle of application
For, enhanced HEMT has the incomparable advantages of depletion type HEMT.In microwave power amplifier and low noise power amplification
Device field, enhanced HEMT do not need negative voltage, reduce the complexity, size and cost of circuit；In high-power switchgear field,
Enhanced HEMT can improve the security of circuit.It is therefore desirable to carry out the research of enhanced GaN HEMT devices.
The method for realizing the enhanced HEMT of GaN base currently with p-type grid mainly has three kinds, the method master of the first p-type grid
If using first full wafer epitaxial p-type layer on barrier layer, then perform etching and to retain grid lower p-type layer enhanced to realize, second
Kind and first full wafer epitaxial p-type layer, then retain grid lower p-type layer, and region etch major part p-type layer under non-grid is etched, it is left
The nano rod/p-shaped layers of 5-20.For both approaches in etching process is etched, plasma can damage interface, influence the stability of device；
The method of the third p-type grid is that gate region does constituency secondary epitaxy on barrier layer, grows p-type grid, The method avoids quarter
The lattice damage brought is lost, but due to lattice mismatch and interfacial state between barrier layer and p-type grid be present, is caused serious
Electrical leakage problems.
The content of the invention
It is an object of the present invention to propose a kind of enhanced GaN HEMT preparation method, this method advantage is：It is first
First, p-type cap layers grow with barrier layer with stove, reduce interfacial state, and then reduce electric leakage of the grid；Secondly, the constituency in p-type cap layers
Secondary epitaxy p-type grid, this is advantageous to the p-type grid for growing high quality；Finally, the p-type cap layers obtained by an extension can protect
Barrier layer is protected, and then reduces current collapse
The present invention provides a kind of enhanced GaN HEMT preparation method, comprises the following steps：
Step 1：With the method for Metalorganic chemical vapor deposition successively epitaxial buffer layer, channel layer, potential barrier on substrate
Layer and p-type cap layers；
Step 2：Mask layer is prepared in the p-type cap layers；
Step 3：Patterned masking layer, expose the p-type cap layers of grid region part, form sample；
Step 4：The epitaxial p-type layer in the p-type cap layers that sample exposes, form p-type grid, i.e. constituency secondary epitaxy p-type grid；
Step 5：Remove mask layer；
Step 6：Etched downwards in the both sides of p-type cap layers, etching depth is reached in channel layer, is formed in the both sides of channel layer
Table top, form mesa-isolated；
Step 7：Source electrode and drain electrode, annealing are prepared in the p-type cap layers of the both sides of p-type grid；
Step 8：Gate electrode is prepared on the p-type grid, forms device；
Step 9：Preparing passivation layer on device, the thickness of the passivation layer is higher than p-type grid, and by source electrode, drain electrode
With the passivation layer opening in gate electrode region, that is, source electrode, drain electrode and gate electrode are exposed, complete to prepare.
The invention has the advantages that PN junction can be once epitaxially formed, on the one hand reduce interfacial state, and then reduce grid
Leak electricity pole；On the other hand the damage for the two-dimensional electron gas that p-type grid can avoid etching from bringing is prepared using the method for constituency secondary epitaxy
Wound.
Brief description of the drawings
To further illustrate the technology contents of the present invention, with reference to embodiments and accompanying drawing is described in detail as after, wherein：
Fig. 1 is the process flow diagram of the enhanced GaNHEMT preparation methods of the present invention；
Fig. 2 is the schematic diagram of growth in situ p-type layer on the epitaxial wafer of a specific embodiment of the invention；
Fig. 3 is that specific embodiment of the invention PECVD prepares SiO2The schematic diagram of the preparation of mask；
Fig. 4 is the schematic diagram of etching gate region mask；
Fig. 5 is the schematic diagram of constituency secondary epitaxy p-type grid；
Fig. 6 is that wet etching removes SiO2Mask layer and ICP carry out the schematic diagram of mesa-isolated；
Fig. 7 is the schematic diagram of evaporation Ti/Al/Ni/Au source-drain electrodes；
Fig. 8 is the schematic diagram of evaporation Ni/Au gate electrodes；
Fig. 9 to prepare passivation layer, and to source, leakage, gate electrode opening schematic diagram.
Embodiment
With reference to the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Ground describes, it is clear that described embodiment is only the part of the embodiment of the present invention, rather than whole embodiments.This area
Technical staff similar popularization can be done in the case of without prejudice to intension of the present invention, therefore the present invention is not by following public tool
The limitation of body embodiment.
Refer to shown in Fig. 1, Fig. 2-Fig. 9, according to overall inventive concept of the invention, there is provided a kind of enhanced GaN HEMT
Preparation method, comprise the following steps：
Step 1：On substrate 1 with the method for Metalorganic chemical vapor deposition successively epitaxial buffer layer 2, channel layer 3, gesture
Barrier layer 4 and p-type cap layers 5, the material of the substrate 1 is Si, sapphire, SiC or GaN, and the material of the cushion 2 is low temperature
AlN or low temperature GaN, thickness are 1 nanometer -5 microns, and the material of the channel layer 3 is GaN or AlGaN, and thickness is received for 50
- 10 microns of rice, when the channel layer 3 is GaN, thickness is 100 nanometers, and when the channel layer 3 is AlGaN, Al components can be
0.2, thickness is 100 nanometers, and the material of the barrier layer 4 be AlGaN, InAlN, AlN, InN or InGaN, thickness for 5 nanometers-
50 nanometers, when the barrier layer 4 is AlGaN, Al components are 0.8, and thickness is 10 nanometers；When the barrier layer 4 is AlN, thickness
For 15 nanometers；When the barrier layer 4 is InN, thickness is 15 nanometers；When the barrier layer 4 is InGaN, In components are 0.17, thick
Spend for 12 nanometers.The material of the p-type cap layers 5 is p-GaN, p-InGaN, p-AlGaN, the p-AlGaN of content gradually variational or group
When dividing the material of p-type cap layers 5 described in the p-InGaN of gradual change to be p-GaN, the doping concentration of magnesium is 1018Per cubic centimeter, thickness is
100 nanometers；When the material of the p-type cap layers 5 is p-InGaN, In components are 0.17, and the doping concentration of magnesium is 1019Every cube li
Rice, thickness are 5 nanometers；When the material of the p-type cap layers 5 is p-AlGaN, Al components are 0.3, and the doping concentration of magnesium is 1018Often
Cubic centimetre, thickness are 5 nanometers；When the material of the p-type cap layers 5 is the p-AlGaN of content gradually variational, Al components are from 0.3 gradual change
To 0.7, thickness is that thickness is 5 nanometers；The material of the p-type cap layers 5 is the p-InGaN of content gradually variational, and In components are 0.01 gradually
0.6 is changed to, thickness is 5 nanometers.
Step 2：Mask layer 6 is prepared in the p-type cap layers 5, the material of the mask layer 6 is Al2Oa、SiNO、SiO2Or
Si3N4, it is by electron beam evaporation equipment, plasma chemical vapor deposition, atomic layer deposition, chemical vapor deposition or low pressure
Prepared by the method for chemical vapor deposition, the thickness of mask layer 6 is 10 nanometers -200 nanometers；The mask layer 6 is SiO2When, use
Plasma chemical vapor chemical deposition, thickness are 100 nanometers.
Step 3：Patterned masking layer 6, using wet etching, sense coupling, reactive ion etching or
Person's sense coupling association reaction ion etching performs etching the p-type cap layers 5 for exposing grid region part, forms sample
Product.When the mask layer 6 is, wet etching is carried out with HF, spills the p-type cap layers 5 of area of grid.
Step 4：The epitaxial p-type layer in the p-type cap layers 5 that sample exposes, form p-type grid 7, i.e. constituency secondary epitaxy p-type grid
7；The doping concentration of the p-type grid 7 is 1016-1022Per cubic centimeter, the material of the p-type grid 7 is p-GaN, p-InGaN,
P-AlGaN, the p-AlGaN of content gradually variational or content gradually variational p-InGaN, when the material of the p-type grid 7 is p-GaN, magnesium
Doping concentration is 1022Per cubic centimeter, thickness is 100 nanometers；When the material of the p-type grid 7 is p-InGaN, In components are
0.17, the doping concentration of magnesium is 1019Per cubic centimeter, thickness is 20 nanometers；When the material of the p-type grid 7 is p-AlGaN, Al
Component is 0.4, and the doping concentration of magnesium is 1022Per cubic centimeter, thickness is 100 nanometers；The material of the p-type grid 7 be component gradually
During the p-AlGaN of change, Al components are gradient to 0.7 from 0.3, and thickness is that thickness is 100 nanometers；The material of the p-type grid 7 is component
The p-InGaN of gradual change, In component are gradient to 0.6 for 0.01, and thickness is 100 nanometers.
Step 5：Mask layer 6 is removed using wet etching or dry etching；
Step 6：Etched downwards using the both sides for being dry-etched in p-type cap layers 5, etching depth is reached in channel layer 3, in ditch
The both sides of channel layer 3 form table top, form mesa-isolated；
Step 7：Source electrode 8 and drain electrode 9, annealing, source electrode 8 and leakage are prepared in the p-type cap layers 5 of the both sides of p-type grid 7
The material of electrode 9 is Ti/Al/Ni/Au, Ti/Al/Ti/Au or Ti/Al/Mo/Au multiple layer metal；The temperature of annealing is 800-
900 degrees Celsius, annealing time is the 30-60 seconds；When the material of the source electrode 8 and drain electrode 9 is Ti/Al/Ni/Au, thickness is
200/600/500/700 angstrom, annealing temperature is 870 degrees Celsius, and annealing time is 30 seconds.
Step 8：Gate electrode 10 is prepared on the p-type grid 7, gate electrode is 10 W metals/Au, and thickness is 50/300 angstrom,
Then peeled off；
Step 9：Prepare passivation layer 11 on device, the thickness of the passivation layer 11 is higher than p-type grid 7, and by source electrode 8,
Drain electrode 9 and the passivation layer opening in the region of gate electrode 10, that is, source electrode 8, drain electrode 9 and gate electrode 10 are exposed, complete to prepare.
The material of the passivation layer 11 is Al2O3、SiO2、HfO2、HfTiO、ZrO2、Si3N4, SiNO or MgO, be by PECVD, ALD,
Prepared by CVD or LPCVD method, its thickness is 0-10 microns, and is opened source electrode 8, drain electrode 9, the region of grid 10 with dry etching
Mouthful, the passivation layer 11 is, Si3N4When, with inductively coupled plasma by source electrode 8, drain electrode 9, the region openings of grid 10, complete
Prepare.
Above-described specific implementation, further detailed description is carried out to the object of the invention, technical scheme and effect,
It should be understood that the specific implementation case described above for the present invention, is not intended to limit the invention, it is all in the present invention
Spirit and principle in, any modification, equivalents, the improvement made, should be included in the scope of the protection.
Claims (10)
1. a kind of enhanced GaN HEMT preparation method, comprises the following steps：
Step 1：With the method for Metalorganic chemical vapor deposition successively epitaxial buffer layer, channel layer, barrier layer and p on substrate
Type cap layers；
Step 2：Mask layer is prepared in the p-type cap layers；
Step 3：Patterned masking layer, expose the p-type cap layers of grid region part, form sample；
Step 4：The epitaxial p-type layer in the p-type cap layers that sample exposes, form p-type grid, i.e. constituency secondary epitaxy p-type grid；
Step 5：Remove mask layer；
Step 6：Etched downwards in the both sides of p-type cap layers, etching depth is reached in channel layer, and platform is formed in the both sides of channel layer
Face, form mesa-isolated；
Step 7：Source electrode and drain electrode, annealing are prepared in the p-type cap layers of the both sides of p-type grid；
Step 8：Gate electrode is prepared on the p-type grid, forms device；
Step 9：Preparing passivation layer on device, the thickness of the passivation layer is higher than p-type grid, and by source electrode, drain electrode and grid
The passivation layer opening of electrode zone, that is, source electrode, drain electrode and gate electrode are exposed, complete to prepare.
2. enhanced GaN HEMT as claimed in claim 1 preparation method, the material of substrate is wherein described in step 1
Si, sapphire, SiC or GaN.
3. enhanced GaN HEMT as claimed in claim 1 preparation method, the material of cushion is wherein described in step 1
Low temperature AI N or low temperature GaN, thickness are 1 nanometer -5 microns.
4. enhanced GaN HEMT as claimed in claim 1 preparation method, the material of channel layer is wherein described in step 1
GaN or AlGaN, thickness are 50 nanometers -10 microns.
5. enhanced GaN HEMT as claimed in claim 1 preparation method, wherein the material of the barrier layer be AlGaN,
InAlN, AlN, InN or InGaN, thickness are 5 nanometers -50 nanometers.
6. enhanced GaN HEMT as claimed in claim 1 preparation method, wherein p-type cap layers described in the step 1
Material is the p-InGaN of p-GaN, p-InGaN, p-AlGaN, the p-AlGaN of content gradually variational or content gradually variational, the p-type cap
The thickness of layer is 5 nanometers -50 nanometers.
7. enhanced GaN HEMT as claimed in claim 1 preparation method, the doping of p-type grid is dense wherein described in step 1
Spend for 1016-1022Per cubic centimeter, the material of the p-type grid is p-GaN, p-InGaN, p-AlGaN, the p- of content gradually variational
AlGaN or content gradually variational p-InGaN, the thickness of p-type grid is 10 nanometers -300 nanometers.
8. enhanced GaN HEMT as claimed in claim 1 preparation method, the material of mask layer is wherein described in step 2
Al2O3、SiNO、SiO2Or Si3N4, it is by electron beam evaporation equipment, plasma chemical vapor deposition, atomic layer deposition, change
Prepared by the method for learning vapor deposition or low-pressure chemical vapor phase deposition, the thickness of mask layer is 10 nanometers -200 nanometers.
9. enhanced GaN HEMT as claimed in claim 1 preparation method, the material of passivation layer is wherein described in step 9
Al2O3、SiO2、HfO2、HfTiO、ZrO2、Si3N4, SiNO or MgO, be the method system by PECVD, ALD, CVD or LPCVD
Standby, its thickness is 0-10 microns.
10. enhanced GaN HEMT as claimed in claim 1 preparation method, source electrode and drain electrode wherein in step 7
Material is Ti/Al/Ni/Au, Ti/Al/Ti/Au or Ti/Al/Mo/Au multiple layer metal；The temperature of annealing is that 800-900 is Celsius
Degree, annealing time is the 30-60 seconds.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109037326A (en) * | 2018-07-18 | 2018-12-18 | 大连理工大学 | A kind of enhanced HEMT device and preparation method thereof with p type buried layer structure |
| CN110459472A (en) * | 2019-08-05 | 2019-11-15 | 中国电子科技集团公司第十三研究所 | Enhanced GaN field effect transistor and its manufacturing method |
| CN110620042A (en) * | 2019-09-25 | 2019-12-27 | 南京大学 | Regrowth method for reducing interface state of HEMT device by utilizing InN protective layer and HEMT device |
| CN111446296A (en) * | 2020-04-03 | 2020-07-24 | 中国科学院半导体研究所 | P-type gate enhanced gallium nitride-based high-mobility transistor structure and manufacturing method thereof |
| CN113838931A (en) * | 2021-08-23 | 2021-12-24 | 华灿光电（浙江）有限公司 | High electron mobility transistor chip and preparation method thereof |
| CN115579392A (en) * | 2022-12-09 | 2023-01-06 | 泉州市三安集成电路有限公司 | P-HEMT semiconductor structure and manufacturing method thereof |
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| CN109037326B (en) * | 2018-07-18 | 2021-09-14 | 大连理工大学 | Enhanced HEMT device with P-type buried layer structure and preparation method thereof |
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| CN110620042A (en) * | 2019-09-25 | 2019-12-27 | 南京大学 | Regrowth method for reducing interface state of HEMT device by utilizing InN protective layer and HEMT device |
| CN110620042B (en) * | 2019-09-25 | 2020-10-30 | 南京大学 | Regrowth method for reducing interface state of HEMT device by utilizing InN protective layer and HEMT device |
| CN111446296A (en) * | 2020-04-03 | 2020-07-24 | 中国科学院半导体研究所 | P-type gate enhanced gallium nitride-based high-mobility transistor structure and manufacturing method thereof |
| CN113838931A (en) * | 2021-08-23 | 2021-12-24 | 华灿光电（浙江）有限公司 | High electron mobility transistor chip and preparation method thereof |
| CN115579392A (en) * | 2022-12-09 | 2023-01-06 | 泉州市三安集成电路有限公司 | P-HEMT semiconductor structure and manufacturing method thereof |
| CN115579392B (en) * | 2022-12-09 | 2023-02-14 | 泉州市三安集成电路有限公司 | P-HEMT semiconductor structure and manufacturing method thereof |
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