CN107834863B - Power supply voltage synchronous circuit and display device thereof - Google Patents

Power supply voltage synchronous circuit and display device thereof Download PDF

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Publication number
CN107834863B
CN107834863B CN201711120037.8A CN201711120037A CN107834863B CN 107834863 B CN107834863 B CN 107834863B CN 201711120037 A CN201711120037 A CN 201711120037A CN 107834863 B CN107834863 B CN 107834863B
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voltage
power
circuit
coupled
power supply
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CN107834863A (en
Inventor
陈柏锟
罗敬谚
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AU Optronics Corp
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AU Optronics Corp
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/275—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/293—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/275—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/293—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M5/2932—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage, current or power

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a power supply voltage synchronous circuit and a display device thereof. The power supply voltage synchronization circuit comprises a comparator circuit, a voltage output judgment circuit and a synchronization control circuit. The comparator circuit provides a voltage difference between the first power supply voltage and the second power supply voltage. The voltage output judgment circuit determines to output the first power voltage or the grounding voltage according to the voltage difference and the reference voltage. The synchronous control circuit determines whether to output the first power voltage or the grounding voltage provided by the voltage output judging circuit according to the second power voltage.

Description

Power supply voltage synchronous circuit and display device thereof
Technical Field
The present invention relates to a voltage synchronization circuit, and more particularly, to a power voltage synchronization circuit and a display device thereof.
Background
In order to increase the protection capability of Electrostatic Discharge (ESD), an ESD element, such as an ESD diode or an ESD blocking circuit, is disposed between power lines (or power electrodes) of a Source Driver Integrated Circuit (SDIC) to prevent abnormal glitch and breakdown of large voltage. Most of the current source drivers for high resolution applications are designed to be half-voltage. An electrostatic discharge diode is added inside the source driver integrated circuit between a high voltage and an intermediate voltage, wherein the intermediate voltage is about half of the high voltage. The breakdown voltage of the esd diode is designed to be about equal to the middle voltage, but the high voltage is usually higher than the middle voltage, so the esd diode may be operated in the breakdown region by too high voltage, and the too high current may cause the damage of the esd diode. Therefore, how to avoid the damage of the esd diodes becomes a key issue in designing the display device.
Disclosure of Invention
The invention provides a power supply voltage synchronous circuit and a display device thereof, which can prevent an electrostatic discharge element in a source driver from being broken down due to overhigh voltage when the power supply voltage is not stable.
The invention relates to a power supply voltage synchronization circuit, which comprises a comparator circuit, a voltage output judgment circuit and a synchronization control circuit. The comparator circuit receives a first power voltage for supplying power to the source driver and a second power voltage lower than the first power voltage to provide a voltage difference between the first power voltage and the second power voltage. The voltage output judgment circuit is coupled to the comparator circuit and receives the first power voltage, the voltage difference, the reference voltage and the ground voltage to determine to output the first power voltage or the ground voltage according to the voltage difference and the reference voltage. The synchronous control circuit is coupled to the voltage output judgment circuit and a first power line of the source driver, and receives a second power voltage to determine whether to output the first power voltage or the ground voltage provided by the voltage output judgment circuit according to the second power voltage.
The display device comprises a power supply circuit, a display panel, a source driver and the power supply voltage synchronous circuit. The power supply circuit provides a first power supply voltage and a second power supply voltage lower than the first power supply voltage. The source driver is coupled to the power circuit, the power voltage synchronizing circuit and the display panel to drive the display panel by using the synchronized first power voltage and the synchronized second power voltage, wherein a first power line of the source driver is used for receiving the synchronized first power voltage, a second power line of the source driver is used for receiving the second power voltage, a first electrostatic discharge (ESD) element is arranged between the first power line and the second power line, and a second ESD element is arranged between the second power line and a ground line. The power supply voltage synchronization circuit is coupled between the power supply circuit and a first power supply line of the source driver, and determines whether to provide a first power supply voltage to the first power supply line according to a voltage difference between the first power supply voltage and a second power supply voltage.
Based on the above, the power supply voltage synchronization circuit and the display device thereof according to the embodiments of the invention compare the voltage difference between the first power supply voltage and the second power supply voltage with the reference voltage to determine whether the first power supply voltage is provided to the first power line of the source driver. Therefore, the electrostatic discharge device in the source driver can be prevented from being broken down due to the over-high voltage.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a system diagram of a display device according to an embodiment of the invention.
Fig. 2A and 2B are timing synchronization diagrams of a first power voltage and a second power voltage according to an embodiment of the invention.
FIG. 3 is a system diagram of a power supply voltage synchronization circuit according to an embodiment of the invention.
Fig. 4 is a circuit diagram of a power supply voltage synchronization circuit according to an embodiment of the invention.
Wherein, the reference numbers:
100: display device
110: power supply circuit
120: power supply voltage synchronous circuit
130: source driver
131: driving circuit
140: display panel
310: comparator circuit
320: voltage output judging circuit
330: a first voltage divider
340: voltage maintaining circuit
350: synchronous control circuit
360: push-pull circuit
370: second voltage divider
380: voltage maintaining and discharging circuit
AVDD: first power supply voltage
AVDD 1: synchronized first supply voltage
BT 1: first junction transistor
C1: first capacitor
C2: second capacitor
DVDD: main power supply voltage
ESD 1: first electrostatic protection element
ESD 2: second electrostatic protection element
GND: ground voltage
HAVDD: second supply voltage
LGD: grounding wire
LP 1: first power line
LP 2: second power line
M1: first metal oxide semiconductor transistor
M2: second metal oxide semiconductor transistor
M3: third metal oxide semiconductor transistor
R1: a first resistor
R10: tenth resistor
R11: eleventh resistor
R12: twelfth resistor
R13: thirteenth resistor
R14: fourteenth resistor
R2: second resistance
R3: third resistance
R4: fourth resistor
R5: fifth resistor
R6: sixth resistor
R7: seventh resistor
R8: eighth resistor
R9: ninth resistor
U1: operational amplifier
U2: comparator with a comparator circuit
Va: voltage difference
Vcom: common voltage
VGMA: gamma reference voltage
Vin: main power supply voltage
VP: pixel voltage
VR: reference voltage
Detailed Description
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Fig. 1 is a system diagram of a display device according to an embodiment of the invention. Referring to fig. 1, in the present embodiment, the display device 100 includes a power circuit 110, a power voltage synchronization circuit 120, a source driver 130 and a display panel 140, wherein the power circuit 110 receives a main power voltage Vin to provide a digital power voltage DVDD, a gamma reference voltage VGMA, a first power voltage AVDD, a second power voltage HAVDD and a ground voltage GND required by the source driver 130.
The source driver 130 is coupled to the power circuit 110 and the display panel 140, and for example, has at least a driving circuit 131, a first power line LP1, a second power line LP2, and a ground line LGD, which are only shown for illustrating the required parts, but not limiting other types of source drivers according to the embodiments of the invention. In other words, in some embodiments, the driving circuit 131 at least comprises a gamma voltage generator, a control logic, a data channel, etc., which may be determined by one of ordinary skill in the art.
The first power line LP1 of the source driver 130 is configured to receive a first power voltage AVDD1 (i.e., the synchronized first power voltage AVDD), the second power line LP2 is configured to receive a second power voltage HAVDD, and the ground line LGD is configured to receive a ground voltage GND, wherein the second power voltage HAVDD is smaller than the first power voltage AVDD. The driving circuit 131 provides a plurality of pixel voltages VP to the display panel 140 by using the synchronized first and second power voltages AVDD1 and HAVDD to drive the display panel 140. At least a first electrostatic discharge (ESD) protection device ESD1 is disposed between the first power line LP1 and the second power line LP2, and at least a second ESD protection device ESD2 is disposed between the second power line LP2 and the ground line LGD. The driving circuit 131 uses the synchronized first power voltage AVDD1, and the second power voltage HAVDD may be an intermediate voltage value of the gamma voltages.
The power voltage synchronizing circuit 120 is coupled between the power circuit 110 and the first power line LP2 of the source driver 130, and receives the first power voltage AVDD and the second power voltage HAVDD to determine whether to provide the first power voltage AVDD to the first power line LP1 according to a voltage difference between the first power voltage AVDD and the second power voltage HAVDD. The power voltage synchronizing circuit 120 is coupled to the display panel 140, and provides the common voltage Vcom to the display panel 140 by using the synchronized first power voltage AVDD 1. The display panel 140 can only receive the common voltage Vcom provided by the power supply voltage synchronizing circuit 120, so as to avoid an increase in power consumption caused by a pull between the power supply circuits.
In the embodiment, the power voltage synchronization circuit 120 and the source driver 130 are separately configured, but in other embodiments, the power voltage synchronization circuit 120 is configured in the source driver 130, which may vary according to the process capability, and the embodiment of the invention is not limited thereto.
Fig. 2A and 2B are timing synchronization diagrams of a first power voltage and a second power voltage according to an embodiment of the invention. Referring to fig. 1 and 2A, generally, the second power voltage HAVDD is generated by using the first power voltage AVDD, so the first power voltage AVDD generally reaches a predetermined level first, and the second power voltage HAVDD reaches the predetermined level after a predetermined time, so as to prevent the generation of the second power voltage HAVDD from affecting the stability of the first power voltage AVDD.
Then, when the first power voltage AVDD is ready, the power voltage synchronizing circuit 120 is triggered by the first power voltage AVDD to start, but the voltage difference between the first power voltage AVDD and the second power voltage HAVDD is too large, so that the first power voltage AVDD is blocked, and the synchronized first power voltage AVDD1 is still the ground voltage GND. Then, when the second power voltage HAVDD is ready, and the voltage difference between the first power voltage AVDD and the second power voltage HAVDD is smaller than the breakdown voltage of the first ESD1, the power voltage synchronization circuit 120 starts to transmit the first power voltage AVDD, so that the time points when the synchronized first power voltage AVDD1 and the synchronized second power voltage HAVDD are ready are almost the same.
Moreover, when the voltage of the second power voltage HAVDD is too low or the voltage difference between the first power voltage AVDD and the second power voltage HAVDD is too large, the source driver 130 is not stabilized yet, so the power voltage synchronization circuit 120 can pull down the common voltage Vcom to the ground voltage GND to discharge the charges in the display panel 140, thereby preventing the display panel 140 from displaying errors.
FIG. 3 is a system diagram of a power supply voltage synchronization circuit according to an embodiment of the invention. Referring to fig. 1 and fig. 3, in the present embodiment, the power voltage synchronization circuit 120 includes a comparator circuit 310, a voltage output determination circuit 320, a first voltage divider 330, a voltage maintenance circuit 340, a synchronization control circuit 350, a push-pull circuit 360, a second voltage divider 370, and a voltage maintenance and discharge circuit 380.
The comparator circuit 310 receives a first power voltage AVDD for supplying power to the source driver 130 and a second power voltage HAVDD lower than the first power voltage AVDD to provide a voltage difference Va between the first power voltage AVDD and the second power voltage HAVDD, where the voltage difference Va is the first power voltage AVDD minus the second power voltage HAVDD. The first voltage divider 330 is used to provide a reference voltage VR, wherein the reference voltage VR is less than a minimum breakdown voltage of an ESD protection device (e.g., ESD1) coupled to the first power line LP1 in the source driver 130.
The voltage output determining circuit 320 is coupled to the comparator circuit 310 and the first voltage divider 330, and receives the first power voltage AVDD, the voltage difference Va, the reference voltage VR and the ground voltage GND to determine to output the first power voltage AVDD or the ground voltage GND according to the voltage difference Va and the reference voltage VR. Further, when the voltage difference Va is greater than or equal to the reference voltage VR, the voltage output determining circuit 320 outputs the ground voltage GND; when the voltage difference Va is smaller than the reference voltage VR, the voltage output determining circuit 320 outputs the first power voltage AVDD.
The voltage holding circuit 340 is coupled to the voltage output determination circuit 320 for holding the first power voltage AVDD or the ground voltage GND provided by the voltage output determination circuit 320. The synchronous control circuit 350 is coupled to the voltage output determining circuit 320 and coupled to the first power line LP1 of the source driver 130 through the push-pull circuit 360. The second power supply voltage HAVDD is received, and whether the first power supply voltage AVDD or the ground voltage GND supplied from the voltage output determination circuit 320 is output or not is determined according to the second power supply voltage HAVDD. In other words, when the second power voltage HAVDD is less than or equal to a threshold value, the synchronous control circuit 350 is turned off, i.e., does not output the first power voltage AVDD provided by the voltage output determination circuit 320, and only outputs the ground voltage GND; when the second power voltage HAVDD is greater than the threshold, the synchronous control circuit 350 is turned on, and outputs the first power voltage AVDD or the ground voltage GND provided by the voltage output determination circuit 320.
The push-pull circuit 360 is coupled to the synchronous control circuit 350 and the first power line LP1 to enhance the synchronized first power voltage AVDD1 or the ground voltage GND provided by the synchronous control circuit 350. The second voltage divider 370 is coupled to the first power line LP1 through the push-pull circuit 360 to provide the common voltage Vcom to the display panel 140 according to the synchronized first power voltage AVDD1 or the ground voltage GND provided by the push-pull circuit 360. The voltage sustaining and discharging circuit 380 is coupled to the first power line LP1 through the push-pull circuit 360 for sustaining or discharging according to the synchronized first power voltage AVDD1 or the ground voltage GND provided by the push-pull circuit 360.
Fig. 4 is a circuit diagram of a power supply voltage synchronization circuit according to an embodiment of the invention. Referring to fig. 3 and 4, in the present embodiment, the comparator circuit 310 includes an operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The operational amplifier U1 has a first input terminal (here, a negative input terminal is taken as an example), a second input terminal (here, a positive input terminal is taken as an example), and an output terminal for providing the voltage difference Va. The first resistor R1 is coupled between the second power supply voltage HAVDD and the first input terminal of the operational amplifier U1. The second resistor R2 is coupled between the first power voltage AVDD and the second input terminal of the operational amplifier U1. The third resistor R3 is coupled between the second input terminal of the operational amplifier U1 and the ground voltage GND. The fourth resistor R4 is coupled between the first input terminal of the operational amplifier U1 and the output terminal of the operational amplifier U1.
In the present embodiment, the first voltage divider 330 includes a fifth resistor R5 and a sixth resistor R6. The fifth resistor R5 is coupled between the first power voltage AVDD and the reference voltage VR. The sixth resistor R6 is coupled between the reference voltage VR and the ground voltage GND. The resistance of the sixth resistor R6 is shown to be variable, but in other embodiments, the resistance of the fifth resistor R5 may be variable, or the resistances of the fifth resistor R5 and the sixth resistor R6 may be variable, which may depend on the circuit design, and the embodiment of the invention is not limited thereto.
In the present embodiment, the voltage output judging circuit 320 includes a comparator U2. The comparator U2 has a first terminal (here, a negative input terminal is taken as an example) for receiving the voltage difference Va, a second terminal (here, a positive input terminal is taken as an example) for receiving the reference voltage VR, a positive power terminal for receiving the first power voltage AVDD, a negative power terminal for receiving the ground voltage GND, and output terminals coupled to the ninth resistor R9 and the tenth resistor R10 of the synchronization control circuit 350. The voltage sustaining circuit 340 includes a first capacitor C1 coupled between the output terminal of the comparator U2 and the ground voltage GND.
In the present embodiment, the synchronous control circuit 350 includes a first junction transistor BT1, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and a first mos transistor M1. The first junction transistor BT1 has a base, a collector, and an emitter receiving a ground voltage GND. The seventh resistor R7 is coupled between the second power voltage HAVDD and the base of the first junction transistor BT 1. The eighth resistor R8 is coupled between the base of the first junction transistor BT1 and the ground voltage GND, wherein the resistance of the eighth resistor R8 is variable, but in other embodiments, the resistance of the seventh resistor R7 may be variable, or the resistances of the seventh resistor R7 and the eighth resistor R8 may be variable, which may depend on the circuit design, and the embodiments of the invention are not limited thereto. The ninth resistor R9 is coupled between the voltage output determination circuit 320 and the collector of the first junction transistor BT 1. The first mos transistor M1 has a gate coupled to the collector of the first junction transistor BT1, a drain, and a source receiving the ground voltage GND. The tenth resistor R10 is coupled between the voltage output determination circuit 320 and the drain of the first mos transistor M1.
In the present embodiment, the push-pull circuit 360 includes a second mos transistor M2, a third mos transistor M3 and an eleventh resistor R11. The second mos transistor M2 has a gate of the synchronous control circuit 350, a drain coupled to the eleventh resistor R11, and a source coupled to the first power line LP 1. The third mos transistor M3 has a gate coupled to the synchronous control circuit 350, a source coupled to the first power line LP1, and a drain receiving the ground voltage GND. The eleventh resistor R11 is coupled between the first power voltage AVDD and the drain of the second mos transistor M2.
In the present embodiment, the second voltage divider 370 includes a twelfth resistor R12 and a thirteenth resistor R13. The twelfth resistor R12 is coupled between the first power line LP1 and the common voltage Vcom. The thirteenth resistor R13 is coupled between the common voltage Vcom and the ground voltage GND, wherein the resistance of the thirteenth resistor R13 is variable, but in other embodiments, the resistance of the twelfth resistor R12 may be variable, or the resistances of the eleventh resistor R11 and the twelfth resistor R12 may be variable, which may depend on the circuit design, and the embodiment of the invention is not limited thereto.
In the present embodiment, the voltage sustaining and discharging circuit 380 includes a fourteenth resistor R14 and a second capacitor C2. The fourteenth resistor R14 is coupled between the first power line LP1 and the ground voltage GND. The second capacitor C2 is coupled between the first power line LP1 and the ground voltage GND.
When the main power supply voltage Vin is turned on, the power ready sequence is Vin → DVDD → AVDD → VGMA/HAVDD. Next, the first power supply voltage AVDD and the second power supply voltage HAVDD output a voltage difference Va after passing through a subtractor mainly composed of an operational amplifier U1. When the voltage difference Va is greater than or equal to a breakdown voltage of the ESD protection device (e.g., ESD1), the comparator U2 outputs the ground voltage GND; when the voltage difference Va is smaller than a breakdown voltage of the ESD protection device (e.g., ESD1), the comparator U2 outputs the first power voltage AVDD. The breakdown voltage of the ESD protection device (e.g., ESD1) may depend on the design of the source driver, but the embodiment of the invention is not limited thereto.
The voltage timing synchronization output of the synchronization control circuit 350 is controlled as follows while the comparator circuit 310 determines the voltage difference Va between the first power supply voltage AVDD and the second power supply voltage HAVDD. When the second power voltage HAVDD is established, the synchronous control circuit 350 is triggered by the second power voltage HAVDD, and the comparator circuit 310 and the voltage output determination circuit 320 are used to reestablish the timing of the power voltage as Vin → DVDD → AVDD/VGMA/HAVDD.
Further, when the voltage difference Va is greater than or equal to the breakdown voltage of the esd protection device (e.g., EDS1), the comparator U2 outputs the ground voltage GND, wherein the third mos transistor M3 is turned on, and the first mos transistor M1 and the second mos transistor M2 are turned off. At this time, the synchronized first power voltage AVDD1 is the ground voltage, and the display panel 140 displays a black image, so as to prevent the ESD protection device (e.g., ESD1) from operating in the breakdown region and introducing a large current, which may cause the source driver 130 to be damaged or the power circuit 110 to be turned off.
When the voltage difference Va is smaller than a breakdown voltage of the ESD protection device (e.g., ESD1), the comparator U2 outputs a first power voltage AVDD, wherein the first junction transistor BT1 and the second mos transistor M2 are turned on, the first mos transistor M1 and the third mos transistor M3 are turned off, and the synchronized first power voltage AVDD1 is the first power voltage AVDD, and the display panel 140 displays normally.
On the other hand, during the power-up process, when the second power voltage HAVDD is not yet established, the first mos transistor M1 is turned on, and the first junction transistor BT1 is turned off. At this time, the second mos transistor M2 is turned off, the third mos transistor M3 is turned on, the synchronized first power voltage AVDD1 and the common voltage Vcom are the ground voltage GND, and the display panel 140 displays a black image under the condition that the liquid crystal has no voltage difference, so that the power voltage setup timing of the source driver 130 is not synchronized and an abnormality is prevented from being generated due to violation of the operation rule. On the other hand, when the power-on is in the ready state or in the abnormal state, the power voltage synchronizing circuit 120 makes the pixel voltage VP and the common voltage Vcom both be the ground voltage GND, so as to quickly clear the liquid crystal charges, prevent the unnecessary accumulation of charges, and reduce the residual charges left after the last power-off, so as to improve the problems of flash (flicker) and image sticking.
In addition, at the power-off timing, all power supplies are in a Floating state, wherein the discharge timing is different due to the design or load of the display panel 140, and the power supply voltage synchronizing circuit 120 can make the synchronized first power supply voltage AVDD1 and the common voltage Vcom be the ground voltage GND regardless of the discharge sequence of AVDD/HAVDD/GMA. The discharge (off) timing of the power supply voltage is, for example: (a) vin → AVDD/HAVDD/VGMA → DVDD (black picture); (b) vin → HAVDD/VGMA → AVDD → DVDD (black picture); (c) vin → AVDD → HAVDD/VGMA → DVDD (black picture).
Therefore, the power voltage synchronizing circuit 120 can first pull down the first power voltage AVDD and the common voltage Vcom to the ground voltage GND through the time difference between the first power voltage AVDD and the second power voltage HAVDD when the display device 100 is turned on or turned off, so as to achieve the functions of fast discharging and clearing charges in the display panel 140, reduce the charge residue of liquid crystal cells (not shown) in the display panel 140, reduce the turn-on flicker, and improve the image residue is (image sticking).
In summary, the power voltage synchronization circuit and the display device thereof according to the embodiments of the invention compare a voltage difference between the first power voltage and the second power voltage with the reference voltage to determine whether the first power voltage is provided to the first power line of the source driver. Therefore, the electrostatic discharge device in the source driver can be prevented from being broken down due to the over-high voltage. And when the source driver is not operated stably, the power voltage synchronous circuit can pull down the common voltage to the grounding voltage so as to discharge the charges in the display panel, thereby avoiding the display error of the display panel.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims (20)

1. A supply voltage synchronization circuit, comprising:
a comparator circuit receiving a first power voltage for supplying power to a source driver and a second power voltage lower than the first power voltage to provide a voltage difference between the first power voltage and the second power voltage;
a voltage output judgment circuit coupled to the comparator circuit and receiving the first power voltage, the voltage difference, a reference voltage and a ground voltage to determine to output the first power voltage or the ground voltage according to the voltage difference and the reference voltage;
a voltage maintaining circuit coupled to the voltage output judging circuit for maintaining the first power voltage or the ground voltage provided by the voltage output judging circuit;
a synchronous control circuit coupled to the voltage output judgment circuit and the voltage maintaining circuit, and receiving the second power voltage to determine whether to output a voltage according to the second power voltage, wherein the voltage is the synchronized first power voltage or the ground voltage provided by the voltage output judgment circuit; and
a push-pull circuit coupled to the synchronous control circuit and receiving the synchronized first power voltage or the ground voltage provided by the synchronous control circuit output, so as to provide the synchronized first power voltage or the ground voltage correspondingly to the first power line according to the synchronized first power voltage or the ground voltage output by the synchronous control circuit.
2. The power supply voltage synchronization circuit of claim 1, wherein the voltage difference is the first power supply voltage minus the second power supply voltage.
3. The supply voltage synchronization circuit of claim 2, wherein the comparator circuit comprises:
an operational amplifier having a first input terminal, a second input terminal and an output terminal for providing the voltage difference;
a first resistor coupled between the second power voltage and the first input terminal of the operational amplifier;
a second resistor coupled between the first power voltage and the second input terminal of the operational amplifier;
a third resistor coupled between the second input terminal of the operational amplifier and the ground voltage; and
the fourth resistor is coupled between the first input end of the operational amplifier and the output end of the operational amplifier.
4. The power supply voltage synchronization circuit of claim 1, further comprising a first voltage divider for providing the reference voltage.
5. The supply voltage synchronization circuit of claim 4, wherein the first voltage divider comprises:
a fifth resistor coupled between the first power voltage and the reference voltage; and
and a sixth resistor coupled between the reference voltage and the ground voltage.
6. The power supply voltage synchronization circuit of claim 1, wherein the voltage output determination circuit comprises:
a comparator having a first terminal for receiving the voltage difference, a second terminal for receiving the reference voltage, a positive power terminal for receiving the first power voltage, a negative power terminal for receiving the ground voltage, and an output terminal coupled to the synchronous control circuit.
7. The power supply voltage synchronization circuit of claim 1, wherein the voltage maintenance circuit comprises a first capacitor.
8. The power supply voltage synchronization circuit of claim 1, wherein the synchronization control circuit comprises:
a first bipolar junction transistor having a base, a collector and an emitter for receiving the ground voltage;
a seventh resistor coupled between the second power voltage and the base;
an eighth resistor coupled between the base and the ground voltage;
a ninth resistor coupled between the voltage output determining circuit and the collector;
a first MOS transistor having a gate coupled to the collector, a drain, and a source for receiving the ground voltage; and
and a tenth resistor coupled between the voltage output determination circuit and the drain of the first MOS transistor.
9. The power supply voltage synchronization circuit of claim 1, wherein the push-pull circuit enhances the first power supply voltage or the ground voltage after synchronization provided by the synchronization control circuit.
10. The supply voltage synchronization circuit of claim 9, wherein the push-pull circuit comprises:
a second MOS transistor having a gate coupled to the synchronous control circuit, a drain, and a source coupled to the first power line;
a third MOS transistor having a gate coupled to the synchronous control circuit, a source coupled to the first power line, and a drain receiving the ground voltage; and
an eleventh resistor coupled between the first power voltage and the drain of the second MOS transistor.
11. The power supply voltage synchronization circuit of claim 1, further comprising a second voltage divider coupled to the synchronization control circuit for providing a common voltage to a display panel according to the synchronized first power supply voltage or the ground voltage provided by the synchronization control circuit.
12. The power supply voltage synchronization circuit of claim 11, wherein the second voltage divider comprises:
a twelfth resistor coupled between the first power line and the common voltage; and
a thirteenth resistor coupled between the common voltage and the ground voltage.
13. The power supply voltage synchronization circuit of claim 1, further comprising a voltage sustaining and discharging circuit coupled to the synchronization control circuit for sustaining or discharging according to the synchronized first power supply voltage or the ground voltage provided by the synchronization control circuit.
14. The power supply voltage synchronization circuit of claim 13, wherein the voltage sustaining and discharging circuit comprises:
a fourteenth resistor coupled between the first power line and the ground voltage; and
and the second capacitor is coupled between the first power line and the grounding voltage.
15. The power supply voltage synchronization circuit of claim 1, wherein the second power supply voltage is an intermediate voltage value of gamma voltages provided by the synchronized first power supply voltage.
16. The power supply voltage synchronization circuit of claim 1, wherein the reference voltage is less than a minimum breakdown voltage of a plurality of ESD protection devices coupled to the first power line in the source driver.
17. A display device, comprising:
a power circuit providing a first power voltage and a second power voltage lower than the first power voltage;
a display panel;
a source driver coupled to the power circuit and the display panel to drive the display panel by using the first power voltage and the second power voltage, wherein a first power line of the source driver is used for receiving the first power voltage, a second power line of the source driver is used for receiving the second power voltage, a first electrostatic protection element is arranged between the first power line and the second power line, and a second electrostatic protection element is arranged between the second power line and a ground line; and
the power supply voltage synchronization circuit of claim 1, coupled between the power supply circuit and the first power line of the source driver, for determining whether to provide the synchronized first power voltage to the first power line according to a voltage difference between the first power voltage and the second power voltage.
18. The display device as claimed in claim 17, wherein the power voltage synchronizing circuit is disposed in the source driver.
19. The display device of claim 18, wherein the power voltage synchronization circuit is separately configured from the source driver.
20. The display device as claimed in claim 18, wherein the power voltage synchronizing circuit is coupled to the display panel to provide a common voltage to the display panel.
CN201711120037.8A 2017-08-30 2017-11-14 Power supply voltage synchronous circuit and display device thereof Active CN107834863B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200511836A (en) * 2003-09-05 2005-03-16 Sanyo Electric Co Liquid crystal display controller
CN1992495A (en) * 2005-12-20 2007-07-04 国际整流器公司 Input voltage sensing circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6678133B2 (en) * 2001-03-09 2004-01-13 Micron Technology, Inc. Electrostatic discharge protection with input impedance
JP2005043435A (en) * 2003-07-23 2005-02-17 Renesas Technology Corp Display driving controller and its driving method, electronic equipment, and semiconductor integrated circuit
JP5017032B2 (en) * 2007-09-14 2012-09-05 パナソニック株式会社 Voltage generation circuit
JP2011181848A (en) * 2010-03-03 2011-09-15 Sharp Corp Esd protection circuit and semiconductor device equipped with the same
JP2016092536A (en) * 2014-10-31 2016-05-23 ルネサスエレクトロニクス株式会社 Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200511836A (en) * 2003-09-05 2005-03-16 Sanyo Electric Co Liquid crystal display controller
CN1992495A (en) * 2005-12-20 2007-07-04 国际整流器公司 Input voltage sensing circuit

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