CN114974150A - Discharge circuit, discharge method and display device - Google Patents

Discharge circuit, discharge method and display device Download PDF

Info

Publication number
CN114974150A
CN114974150A CN202110209388.6A CN202110209388A CN114974150A CN 114974150 A CN114974150 A CN 114974150A CN 202110209388 A CN202110209388 A CN 202110209388A CN 114974150 A CN114974150 A CN 114974150A
Authority
CN
China
Prior art keywords
circuit
sub
discharge
display device
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110209388.6A
Other languages
Chinese (zh)
Inventor
张强
董殿正
王光兴
黄海琴
许文鹏
林万
王雷阳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Beijing BOE Display Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202110209388.6A priority Critical patent/CN114974150A/en
Publication of CN114974150A publication Critical patent/CN114974150A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0257Reduction of after-image effects

Abstract

A discharge circuit, a discharge method and a display device are provided. The discharge circuit includes: the display device comprises a control sub-circuit, a first discharging sub-circuit and a second discharging sub-circuit, wherein when the control sub-circuit detects that the display device is in a first state in a shutdown process, the control sub-circuit outputs a first control signal to the first discharging sub-circuit, and the first discharging sub-circuit provides a signal of a first power supply end to a first node so as to discharge pixels of the display panel; when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to a second discharge sub-circuit; the second discharge sub-circuit provides a signal of a ground terminal to the first node. In the solution provided in this embodiment, during the shutdown process, the signal at the ground terminal is provided to the first node, so that the output voltage of the gate driving circuit is stabilized at or close to the ground voltage, thereby reducing the interference of the dc-coupled electric field on the optimal Vcom setting, and improving the image sticking problem of the display system.

Description

Discharge circuit, discharge method and display device
Technical Field
The present disclosure relates to display technologies, and more particularly, to a discharge circuit, a discharge method, and a display device.
Background
In the aspect of displaying the afterimage representation of the product, the narrow afterimage refers to the picture residual caused by the Aging black and white block (Mosaic) picture. The main reason for this residue is the imbalance of black and white frame driving, which causes the difference after long-term accumulation. This difference can leave the black and white frames in the next frame, which can cause the problem of visible afterimage. The afterimage in a broad sense includes the problem of picture retention caused by random pictures, such as a station caption of a certain television station for long-term viewing, or a news program host.
In the estimation of the afterimage mechanism, it is known from the output characteristics of a Thin Film Transistor (TFT) that the magnitude of the current changes with the change of the source voltage when the gate voltage is constant. Thus, the leakage of the pixel under positive and negative frame voltages is different. And the difference between the positive and negative frame pixel voltages can generate direct current offset (DC), so that ions are gathered into an internal electric field to form an afterimage.
The fluctuation of the common Voltage (VCOM) itself, or unstable factors such as the electric field in the liquid crystal and the coupling electric field, for example, the variation of the upper and lower voltages or the illumination condition, may cause the variation of the integrated electric field. If the product common Voltage (VCOM) is set under varying electric field conditions, a direct current offset (DC) is generated. The larger the set common Voltage (VCOM) bias, the higher the Flicker (Flicker) value after the product reaches a relatively stable electric field, and the more serious the afterimage.
Disclosure of Invention
The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.
The embodiment of the application provides a discharge circuit, a discharge method and a display device, and residual images are improved.
In one aspect, an embodiment of the present application provides a discharge circuit applied to a display device including a display substrate and a gate driving circuit, the discharge circuit including: a control sub-circuit, a first discharging sub-circuit and a second discharging sub-circuit, wherein the first discharging sub-circuit is respectively connected to the control sub-circuit, a first power terminal and a first node, the second discharging sub-circuit is respectively connected to the control sub-circuit, the first node and a ground terminal, and the first node is connected to the gate driving circuit, wherein:
the control sub-circuit is configured to output a first control signal to the first discharging sub-circuit when detecting that the display device is in a first state in a shutdown process; when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to the second discharging sub-circuit;
the first discharge sub-circuit is configured to provide a signal of the first power supply end to the first node when receiving the first control signal so that the gate driving circuit controls the pixels of the display panel to discharge;
the second discharge sub-circuit is configured to provide a signal of the ground terminal to the first node when receiving the second control signal.
In an exemplary embodiment, the detecting that the display apparatus is in the first state during shutdown includes: detecting that a logic input voltage of the display device is powered down to a first voltage threshold;
the detecting that the display device is in a second state in the shutdown process comprises: detecting that the logic input voltage of the display device is powered down to a second voltage threshold value, wherein the second voltage threshold value is smaller than the first voltage threshold value.
In an exemplary embodiment, the first discharging sub-circuit is further configured to turn off between the first power supply terminal and the first node when the logic input voltage of the display apparatus is powered down to a second voltage threshold.
In an exemplary embodiment, the first discharge sub-circuit includes: and a control electrode of the first transistor is connected with the control sub-circuit, a first electrode of the first transistor is connected with the first power supply end, and a second electrode of the first transistor is connected with the first node.
In an exemplary embodiment, the second discharge sub-circuit includes: and a control electrode of the second transistor is connected with the control sub-circuit, a first electrode of the second transistor is connected with the first node, and a second electrode of the second transistor is connected with the grounding terminal.
In an exemplary embodiment, the discharge circuit further comprises a third discharge sub-circuit connecting the control sub-circuit, a second power supply terminal, and the first node, wherein:
the control sub-circuit is further configured to output a third control signal to the third discharging sub-circuit when detecting that the display device is in a first state in a shutdown process; when the display device is detected to be started, outputting a fourth control signal to the third discharge sub-circuit;
the third discharge sub-circuit is configured to turn off the second power supply terminal and the first node when receiving the third control signal; and when receiving the fourth control signal, providing the signal of the second power supply end to the first node.
In an exemplary embodiment, the third discharge sub-circuit includes: and a control electrode of the third transistor is connected with the control sub-circuit, a first electrode of the third transistor is connected with the first node, and a second electrode of the third transistor is connected with the second power supply end.
In another aspect, an embodiment of the present disclosure provides a display device including the discharge circuit.
In another aspect, an embodiment of the present disclosure provides a discharging method applied to the discharging circuit, including:
when the display device is detected to be in a first state in the shutdown process, outputting a first control signal to the first discharge sub-circuit; the first discharge sub-circuit provides a signal of the first power supply end to the first node so that the gate driving circuit controls the display panel to discharge;
when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to the second discharging sub-circuit; and when the second discharge sub-circuit receives the second control signal, the second discharge sub-circuit provides a signal of the grounding terminal to the first node.
In an exemplary embodiment, the detecting that the display apparatus is in the first state during shutdown includes: detecting that a logic input voltage of the display device is powered down to a first voltage threshold;
the detecting that the display device is in a second state in the shutdown process comprises: detecting that the logic input voltage of the display device is powered down to a second voltage threshold value, wherein the second voltage threshold value is smaller than the first voltage threshold value.
In an exemplary embodiment, applied to the above discharge circuit, the discharge method further includes,
when the display device is detected to be started, outputting a fourth control signal to the third discharge sub-circuit; when the third discharge sub-circuit receives the fourth control signal, the third discharge sub-circuit provides the signal of the second power supply end to the first node;
when the display device is detected to be in a first state in the shutdown process, outputting a third control signal to the third discharging sub-circuit; and when the third discharging sub-circuit receives the third control signal, the second power supply end and the first node are turned off.
The embodiment of the application comprises a discharge circuit, a discharge method and a display device, wherein the discharge circuit is applied to the display device comprising a display substrate and a grid drive circuit, and comprises the following components: a control sub-circuit, a first discharging sub-circuit and a second discharging sub-circuit, wherein the first discharging sub-circuit is respectively connected to the control sub-circuit, a first power terminal and a first node, the second discharging sub-circuit is respectively connected to the control sub-circuit, the first node and a ground terminal, and the first node is connected to the gate driving circuit, wherein: the control sub-circuit is configured to output a first control signal to the first discharging sub-circuit when detecting that the display device is in a first state in a shutdown process; when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to the second discharging sub-circuit; the first discharge sub-circuit is configured to provide a signal of the first power supply end to the first node when receiving the first control signal so that the gate driving circuit controls the pixels of the display panel to discharge; the second discharge sub-circuit is configured to provide a signal of the ground terminal to the first node when receiving the second control signal. In the scheme provided by this embodiment, in the shutdown process, the signal of the ground terminal is provided to the first node, so that the output voltage of the gate driving circuit is stabilized at or close to the ground voltage, and thus the weak dc electric field of the display device is smaller, the interference of the dc coupling electric field on the setting of the optimal Vcom is reduced, and the image sticking problem of the display system is improved.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Other aspects will be apparent upon reading and understanding the attached drawings and detailed description.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention.
FIG. 1 is a schematic diagram of the electric coupling waveform under BM;
FIG. 2 is a schematic diagram of a discharge circuit provided in an exemplary embodiment;
FIG. 3 is a schematic diagram of a first discharge sub-circuit provided in an exemplary embodiment;
FIG. 4 is a schematic diagram of a second discharge sub-circuit provided in an exemplary embodiment;
FIG. 5 is a schematic diagram of a discharge circuit provided in an exemplary embodiment;
FIG. 6 is a schematic diagram of a third discharge sub-circuit provided in an exemplary embodiment;
FIG. 7 is a schematic diagram of a discharge circuit provided in an exemplary embodiment;
FIG. 8 is a flowchart of a discharge method provided in an exemplary embodiment.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the present application, the embodiments and features of the embodiments may be arbitrarily combined with each other without conflict.
The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs.
The ordinal numbers such as "first", "second", "third", etc., in this disclosure are provided to avoid confusion among the constituent elements, and do not indicate any order, number, or importance.
In the present disclosure, a transistor refers to an element including at least three terminals of a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. In the present disclosure, the channel region refers to a region through which current mainly flows.
In the present disclosure, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors of opposite polarities, or in the case where the direction of current flow during circuit operation changes, the functions of the "source electrode" and the "drain electrode" may be interchanged. Therefore, in the present disclosure, "source electrode" and "drain electrode" may be interchanged with each other.
In the present disclosure, "connected" includes a case where constituent elements are connected together by an element having some sort of electrical action. The "element having a certain electric function" is not particularly limited as long as it can transmit and receive an electric signal between connected components. Examples of the "element having some kind of electric function" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.
Currently, for the problem of image sticking of the display system, the main process influencing factor is setting the optimal common voltage (Vcom) value. Flicker under the optimal Vcom of a certain product under an ideal state can reach a lower degree, so that the problem of image sticking caused by a built-in electric field due to unbalanced alternating current drive is avoided.
The setting of the optimal Vcom value is mainly affected by Flicker drift. Under the condition of rapid change of multiple electric fields of the on-off machine, flickers approach to the time required for stabilization, and under the influence of conditions such as DC and the like, the stabilization process can also be accompanied with the establishment of the electric field, so that the optimal Vcom is directly influenced, and the residual image problem is caused.
The current research on electric fields is mainly divided into two main categories: strong alternating current electric field generated by alternating current driving and weak direct current electric field generated by coupling. Wherein the strong alternating electric field can be guided by setting of the driving signal; the research of the weak direct current electric field is limited, and the influence factors are many, which are usually important influence points of the afterimage problem.
From the above two main types of electric field effects, the two types of electric fields interact with each other during a period of powering on and powering off the display system. The time and degree of the influence of the weak direct current electric field on the power-on are complex, so that the difficulty of setting the optimal Vcom is caused. From the comprehensive electric field influence of a display system, the stable state after the interaction influence after power-on is mainly influenced by a strong alternating current electric field; similarly, the interaction effect after power-off is mainly affected by the weak dc electric field. Since the strength of the weak dc field is related to the material, the down-coupling state and the down-time, this field is always in a variation.
The weak dc electric field may exist in each layer structure of the Panel (Panel), such as a Black Matrix (BM) or the like. The main source of the weak dc electric field is the coupling of the driving signal after power-off, and the most important influence is found to be the Gate (Gate) signal. Fig. 1 is a voltage waveform diagram of the BM layer after being powered down under the signal coupling condition. As shown in fig. 1, BM powering down mainly goes through 3 processes:
before power is turned off: mainly coupled by a Gate open (a signal Gout at the output end of the Gate driving circuit or a clock signal GOA-CLK of the Gate driving circuit) signal, and is relatively balanced;
discharge (Discharge): the Discharge circuit pulls the first power supply end VGH, and BM signals are pulled up by the voltage coupling of the dropped VGH;
after Discharge: the Discharge circuit pulls the second power supply end VGL, and the BM signal is pulled down by the recovered VGL voltage.
Because the weak direct current electric field is coupled by VGH and VGL after the power is cut off to the current product, its voltage height and positive negative are not certain. In combination with the effect of power-down time, uncertainty of interaction effects after power-up is caused, and finally, the optimal Vcom setting is affected. For example, for the BM detection of 2 hours under the actual display system, the absolute value of the charged voltage is greater than 3V, and the weak dc electric field of this strength inevitably has a large influence on the optimal Vcom setting for power-up.
In the embodiment of the disclosure, the voltage at the output terminal of the gate driver is stabilized at the ground voltage by changing the working mode of the existing display system, so that the weak dc electric field is relatively stable, and the purpose of improving the shutdown weak dc electric field is achieved, thereby greatly reducing the interference of the dc coupling electric field on the setting of the optimal Vcom, and improving the image sticking problem of the display system.
Fig. 2 is a schematic diagram of a discharge circuit according to an embodiment of the disclosure. As shown in fig. 2, the discharge circuit is applied to a display device including a display substrate and a gate driving circuit, and may include: a control sub-circuit, a first discharging sub-circuit and a second discharging sub-circuit, the first discharging sub-circuit is respectively connected to the control sub-circuit, a first power terminal VGH and a first node a, the second discharging sub-circuit is respectively connected to the control sub-circuit, the first node a and a ground terminal GND, the first node a is connected to the gate driving circuit, wherein:
the control sub-circuit is configured to output a first control signal to the first discharging sub-circuit when detecting that the display device is in a first state in a shutdown process; when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to the second discharging sub-circuit;
the first discharge sub-circuit is configured to, upon receiving the first control signal, supply a signal of the first power supply terminal VGH to the first node a, so that the gate driving circuit controls the pixels of the display panel to discharge;
the second discharge sub-circuit is configured to provide a signal of the ground terminal GND to the first node when receiving the second control signal.
In the scheme provided by this embodiment, in the shutdown process, the signal of the ground terminal is provided to the first node, so that the output voltage of the gate driving circuit is stabilized at or close to the ground voltage, and thus the weak dc electric field of the display device is smaller, the interference of the dc coupling electric field on the setting of the optimal Vcom is reduced, and the image sticking problem of the display system is improved.
In an exemplary embodiment, the detecting that the display apparatus is in the first state during shutdown includes: detecting that a logic input voltage of the display device is powered down to a first voltage threshold; the detecting that the display device is in a second state in the shutdown process comprises: detecting that the logic input voltage of the display device is powered down to a second voltage threshold value, wherein the second voltage threshold value is smaller than the first voltage threshold value. The first voltage threshold and the second voltage threshold can be set according to requirements. The detection modes of the first state and the second state are only examples, and other modes can be provided for detection as required. The second state is a state subsequent to the first state in the power down process.
The logic input voltage of the display device is, for example, the input voltage VIN of a driving Integrated Circuit (IC) of the display device or a voltage obtained by dividing VIN. The detection that the display device is in the first state in the shutdown process can be realized by using an XON function of the display device, that is, when the logic input voltage drops to a certain value, the XON function is turned on, that is, an XON signal is generated, and the XON signal can be used as a first control signal. The XON signal may be generated using a first voltage comparator. The second control signal may be generated using a second voltage comparator.
In an exemplary embodiment, the first power source terminal may be a high-level signal, and the first node a may be connected to a low-level terminal of the gate driving circuit. The gate driving circuit may include a plurality of shift registers, and an output terminal of each shifter is connected to one gate line. When the display panel works normally, one output end of the plurality of output ends of the grid driving circuit outputs a high level, and the other output ends output a low level, so that pixels connected with corresponding grid lines are started, and when the display panel is shut down, the output end of the grid driving circuit outputs a signal of the low level end of the grid driving circuit. When the display panel is shut down, the logic input voltage starts to be powered down, when the logic input voltage is powered down to the first voltage threshold value, the signal of the first power supply end VGH is provided to the first node A, the voltage of the low-level end of the grid driving circuit is pulled up to the voltage signal (high-level signal) of the first voltage end VGH, so that all output ends of the grid driving circuit output the voltage signal (high-level signal) of the voltage end VGH, all pixels connected with grid lines are turned on, pixel discharge is realized, and shutdown ghost can be eliminated. When the logic input voltage is powered down to the second voltage threshold, the signal of the ground terminal GND is provided to the first node a, that is, the signal of the ground terminal GND is provided to the low-level terminal of the gate driving circuit, so that all output terminals of the gate driving circuit output the voltage (zero voltage or near zero voltage) of the ground terminal, and the change is small along with the extension of power-down time, the weak-current electric field is small and stable, the interference of the direct-current coupling electric field on the setting of the optimal Vcom is greatly reduced, and the image sticking problem of the display system is improved.
In an exemplary embodiment, the first discharging sub-circuit is further configured to turn off the first power supply terminal VGH and the first node a when the logic input voltage of the display apparatus is powered down to a second voltage threshold. For example, a suitable second voltage threshold may be selected, so that when the logic input voltage of the display device is powered down to the second voltage threshold, the first power supply terminal VGH and the first node a are turned off; alternatively, when the logic input voltage is powered down to the second voltage threshold, the control sub-circuit may output a control signal to the control electrode of the first transistor T1 to turn off the first transistor T1, thereby turning off the first power supply terminal VGH and the first node a.
In an exemplary embodiment, the control sub-circuit may include a first control unit that controls the first discharge sub-circuit and a subsequent third discharge sub-circuit, and a second control unit that controls the second discharge sub-circuit, and the first control unit and the second control unit may share a power supply with a driving IC of the display panel, or the first control unit may share a power supply with a driving IC of the display panel and the second control unit may be controlled using an independent power supply. When the second control unit and the driving IC of the display panel share the power supply, the chip cannot normally work due to power failure to a certain degree, so that the second threshold voltage is greater than the lowest voltage of the chip for normal work, at the moment, the time from the power failure of the first threshold voltage to the second threshold voltage is possibly short, the display panel is insufficiently discharged, but the scheme is low in cost and is economical. When the second control unit uses an independent power supply (independent of the power supply of the display panel) to control, a lower second voltage threshold can be set, the time from the power failure of the first voltage threshold to the second voltage threshold is longer, the display panel can conveniently perform full discharge, and the ghost eliminating effect is better.
In an exemplary embodiment, the control sub-circuit may be provided externally of the display device or may be integrated in an integrated circuit chip of the display device.
In an exemplary implementation, the voltage signal of the first power source terminal VGH may be a turn-on voltage signal of the thin film transistor.
Fig. 3 is a schematic diagram of a first discharge sub-circuit provided in an exemplary embodiment. As shown in fig. 3, the first discharge sub-circuit may include a first transistor T1, a control electrode of the first transistor T1 is connected to the control sub-circuit, a first electrode is connected to the first power source terminal VGH, and a second electrode is connected to the first node a.
In an exemplary embodiment, the first transistor T1 is, for example, a P-type transistor, and when the logic input voltage is powered down to a first voltage threshold during the power-down process of the display device, the control sub-circuit outputs a low-level signal to the control electrode of the first transistor T1, the first transistor T1 is turned on, and the voltage signal of the first power source terminal VGH is applied to the first node a.
Fig. 4 is a schematic diagram of a second discharge sub-circuit provided in an exemplary embodiment. As shown in fig. 4, the second discharge sub-circuit may include: and a second transistor T2, wherein a control electrode of the second transistor T2 is connected to the control sub-circuit, a first electrode is connected to the first node a, and a second electrode is connected to the ground terminal GND.
In an exemplary embodiment, the second transistor T2 is, for example, an N-type transistor, and when the logic input voltage drops to a second voltage threshold during the power-down process of the display device, the control sub-circuit outputs a high-level signal to the control electrode of the second transistor T2, the second transistor T2 is turned on, and the voltage signal of the ground GND is applied to the first node a.
Fig. 5 is a schematic diagram of a discharge circuit provided in an exemplary embodiment. As shown in fig. 5, the discharge circuit may further include: a third discharge sub-circuit connected to the control sub-circuit, a second power supply terminal VGL, and the first node A, wherein:
the control sub-circuit is further configured to output a third control signal to the third discharging sub-circuit when detecting that the display device is in a first state in a shutdown process; when the display device is detected to be started, outputting a fourth control signal to the third discharge sub-circuit;
the third discharge sub-circuit is configured to turn off the second power source terminal VGL and the first node a when receiving the third control signal; and provides the signal of the second power source terminal VGL to the first node a upon receiving the fourth control signal.
In an exemplary embodiment, the second power source terminal VGL is, for example, a low-level signal, and the third discharge sub-circuit provides the low-level signal to the low-level terminal of the display panel when the display device is powered on. When the display device is turned off, the second power supply terminal VGL and the first node a are turned off, so that the display panel is convenient to discharge.
FIG. 6 is a schematic diagram of a third discharge sub-circuit provided in an exemplary embodiment. The third discharge sub-circuit may include: and a third transistor T3, wherein a control electrode of the third transistor T3 is connected to the control sub-circuit, a first electrode is connected to the first node a, and a second electrode is connected to the second power source terminal VGL.
In an exemplary embodiment, the second power source terminal VGL is, for example, a low level signal, the third transistor is, for example, an N-type transistor, when the display device is powered on, the control sub-circuit outputs a high level signal to the third transistor T3, the third transistor T3 is turned on, the voltage of the second power source terminal VGL is provided to the first node a, when the logic input voltage is dropped to the first voltage threshold during the power-down process of the display device, the control sub-circuit outputs a low level signal to the control electrode of the third transistor T3, the third transistor T3 is turned off, and the voltage between the second power source terminal VGL and the first node a is turned off.
Exemplary structures of the first discharge sub-circuit, the second discharge sub-circuit, and the third discharge sub-circuit are given in the above-described embodiments. It is easily understood by those skilled in the art that the implementation of the first, second, and third discharge sub-circuits is not limited thereto as long as the functions thereof can be implemented.
Fig. 7 is a schematic diagram of a discharge circuit according to an embodiment of the disclosure. As shown in fig. 7, the discharge circuit may include a control sub-circuit, a first discharge sub-circuit, a second discharge sub-circuit and a third discharge sub-circuit, the first discharge sub-circuit includes a first transistor T1, a control electrode of the first transistor T1 is connected to the control sub-circuit, a first electrode is connected to the first power supply terminal VGH, a second electrode is connected to the first node a, the second discharge sub-circuit includes a second transistor T2, a control electrode of the second transistor T2 is connected to the control sub-circuit, a first electrode is connected to the first node a, a second electrode is connected to the ground terminal GND, the third discharge sub-circuit includes a third transistor T3, a control electrode of the third transistor T3 is connected to the control sub-circuit, a first electrode is connected to the first node a, a second electrode is connected to the second power supply terminal VGL, the first node a is connected to the equivalent unit 10, the equivalent unit 10 is an equivalent circuit of a gate driving circuit and a display panel.
The following describes a technical solution of an embodiment of the present application, taking a discharge circuit shown in fig. 7 as an example. In this embodiment, the first transistor T1 may be a P-type transistor, and the second transistor T2 and the third transistor T3 may be N-type transistors. The first power source terminal VGH may be connected to a high level signal, and the second power source terminal VGL may be connected to a low level signal.
In the shutdown process of the display device, when the logic input voltage of the display device is powered down to the first voltage threshold, the control sub-circuit outputs a low level signal to the first transistor T1, the first transistor T1 is turned on, the voltage of the first power supply terminal VGH is loaded to the first node a, and all output ends of the gate driving circuit all output voltage signals (high level) of the first power supply terminal VGH, so that all pixels connected with gate lines are turned on, pixel discharge is realized, and shutdown ghost can be eliminated. The control sub-circuit outputs a low level signal to the third transistor T3, turning off the third transistor T3; the control sub-circuit outputs a low level signal to the second transistor T2, turning off the second transistor T2;
when the logic input voltage is powered down to the second voltage threshold, the voltage of the first power supply terminal VGH cannot turn on the first transistor T1, the first transistor T1 is turned off, the third transistor T3 is kept turned off, the control sub-circuit outputs a high level signal to the second transistor T2, the second transistor T2 is turned on, and the voltage of the ground terminal GND is loaded to the first node a, so that all output terminals of the gate driving circuit output the voltage (zero voltage or near zero voltage) of the ground terminal GND, and the change is small along with the extension of the power-down time.
When the second discharge sub-circuit is not arranged in the discharge circuit, and the display device is turned off, the first transistor T1 is turned on after the power-off triggers XON (shutdown ghost elimination), the voltage of the first power supply terminal VGH is loaded to the first node a, and the display panel performs discharge. In the power-off process, as the logic input voltage decreases, after the first transistor switch T1 is turned off, if the turn-on condition of the third transistor T3 is satisfied, the third transistor T3 is turned on, the voltage of the second power source terminal VGL is applied to the first node a, if the turn-on condition of the third transistor T3 is not satisfied, the third transistor T3 is turned on, at this time, the voltage of the first node a is not constant (floating), and the third transistor T3 is turned on after the display device is powered on, and the voltage of the second power source terminal VGL is applied to the first node a. In this scheme, after power-off, the voltage of the first node a may be the voltage of the second power source terminal VGL, and may also be variable, and even if the voltage of the first node a is the voltage of the second power source terminal VGL, the voltage of the second power source terminal VGL is variable during power-off, and therefore, finally, the voltage of the first node a is variable, which results in an unstable weak current electric field, and is not favorable for setting the optimal Vcom to improve the afterimage. In the scheme provided by this embodiment, after power down, the voltage of the first node a is the voltage of the ground terminal GND, the voltage value is stable, and the weak dc electric field after power down of the display system is stable, so that the influence of the weak dc electric field on the comprehensive electric field during power up is greatly improved, and finally, the accurate and controllable setting of the optimal Vcom is realized, thereby achieving the purpose of improving the afterimage.
The embodiment of the disclosure also provides a display device, which comprises the discharge circuit provided by the embodiment. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. The display device may further include a gate driving circuit and a display panel. The gate driving circuit may include a plurality of shift registers. The display device may be an Organic Light Emitting Diode (OLED) display device, a liquid crystal display device, or the like.
Fig. 8 is a flowchart of a discharging method provided in an embodiment of the present disclosure, and a discharging circuit applied in the foregoing embodiment includes:
step 801, when detecting that the display device is in a first state in a shutdown process, outputting a first control signal to the first discharging sub-circuit; the first discharge sub-circuit provides a signal of the first power supply end to the first node so that the gate driving circuit controls the display panel to discharge;
step 802, when detecting that the display device is in a second state in the shutdown process, outputting a second control signal to the second discharge sub-circuit; and when the second discharge sub-circuit receives the second control signal, the second discharge sub-circuit provides a signal of the grounding terminal to the first node.
In the discharging method provided by this embodiment, after the shutdown, the signal of the ground terminal is provided to the first node, so that the output terminal of the gate driving circuit is stabilized at the voltage of the ground terminal, and the weak dc electric field after the power-off of the display system is stabilized, thereby greatly improving the influence on the integrated electric field when the display system is powered on, and finally achieving the accurate and controllable setting of the optimal Vcom, thereby achieving the purpose of improving the afterimage.
In an exemplary embodiment, the first control signal is, for example, a low level signal, and the second control signal is, for example, a high level signal.
In an exemplary embodiment, the detecting that the display apparatus is in the first state during shutdown includes: detecting that a logic input voltage of the display device is powered down to a first voltage threshold;
the detecting that the display device is in a second state in the shutdown process comprises: detecting that the logic input voltage of the display device is powered down to a second voltage threshold value, wherein the second voltage threshold value is smaller than the first voltage threshold value.
In an exemplary embodiment, the discharge circuit may include a third discharge sub-circuit, the discharge method further includes,
when the display device is detected to be started, outputting a fourth control signal to the third discharge sub-circuit; when the third discharge sub-circuit receives the fourth control signal, the third discharge sub-circuit provides the signal of the second power supply end to the first node;
when the display device is detected to be in a first state in the shutdown process, outputting a third control signal to the third discharge sub-circuit; and when the third discharging sub-circuit receives the third control signal, the second power supply end and the first node are turned off.
In an exemplary embodiment, the fourth control signal is, for example, a high level signal, and the third control signal is, for example, a low level signal.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (11)

1. A discharge circuit applied to a display device including a display substrate and a gate driving circuit, the discharge circuit comprising: a control sub-circuit, a first discharging sub-circuit and a second discharging sub-circuit, wherein the first discharging sub-circuit is respectively connected to the control sub-circuit, a first power terminal and a first node, the second discharging sub-circuit is respectively connected to the control sub-circuit, the first node and a ground terminal, and the first node is connected to the gate driving circuit, wherein:
the control sub-circuit is configured to output a first control signal to the first discharging sub-circuit when detecting that the display device is in a first state in a shutdown process; when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to the second discharging sub-circuit;
the first discharge sub-circuit is configured to provide a signal of the first power supply end to the first node when receiving the first control signal so that the gate driving circuit controls the pixels of the display panel to discharge;
the second discharge sub-circuit is configured to provide a signal of the ground terminal to the first node when receiving the second control signal.
2. The discharge circuit of claim 1,
the detecting that the display device is in a first state in a shutdown process comprises: detecting that a logic input voltage of the display device is powered down to a first voltage threshold;
the detecting that the display device is in a second state in the shutdown process comprises: detecting that the logic input voltage of the display device is powered down to a second voltage threshold value, wherein the second voltage threshold value is smaller than the first voltage threshold value.
3. The discharge circuit of claim 1, wherein the first discharge sub-circuit is further configured to turn off the first power terminal and the first node when a logic input voltage of the display device is powered down to a second voltage threshold.
4. The discharge circuit of claim 1, wherein the first discharge sub-circuit comprises: and a control electrode of the first transistor is connected with the control sub-circuit, a first electrode of the first transistor is connected with the first power supply end, and a second electrode of the first transistor is connected with the first node.
5. The discharge circuit of claim 1, wherein the second discharge sub-circuit comprises: and a control electrode of the second transistor is connected with the control sub-circuit, a first electrode of the second transistor is connected with the first node, and a second electrode of the second transistor is connected with the grounding terminal.
6. The discharge circuit of any one of claims 1 to 5, further comprising a third discharge sub-circuit, said third discharge sub-circuit connecting said control sub-circuit, a second power supply terminal, and said first node, wherein:
the control sub-circuit is further configured to output a third control signal to the third discharging sub-circuit when detecting that the display apparatus is in a first state during shutdown; when the display device is detected to be started, outputting a fourth control signal to the third discharge sub-circuit;
the third discharge sub-circuit is configured to turn off the second power supply terminal and the first node when receiving the third control signal; and when receiving the fourth control signal, providing the signal of the second power supply end to the first node.
7. The discharge circuit of claim 6, wherein the third discharge sub-circuit comprises: and a control electrode of the third transistor is connected with the control sub-circuit, a first electrode of the third transistor is connected with the first node, and a second electrode of the third transistor is connected with the second power supply end.
8. A display device comprising the discharge circuit according to any one of claims 1 to 7.
9. A discharge method applied to the discharge circuit according to any one of claims 1 to 7, comprising:
when detecting that the display device is in a first state in the shutdown process, outputting a first control signal to the first discharging sub-circuit; the first discharge sub-circuit provides a signal of the first power supply end to the first node so that the gate driving circuit controls the display panel to discharge;
when the display device is detected to be in a second state in the shutdown process, outputting a second control signal to the second discharge sub-circuit; and when the second discharge sub-circuit receives the second control signal, the second discharge sub-circuit provides a signal of the grounding terminal to the first node.
10. The discharge method according to claim 9,
the detecting that the display device is in a first state in a shutdown process comprises: detecting that a logic input voltage of the display device is powered down to a first voltage threshold;
the detecting that the display device is in a second state in a shutdown process comprises: detecting that a logic input voltage of the display device is powered down to a second voltage threshold, wherein the second voltage threshold is smaller than the first voltage threshold.
11. The discharging method according to claim 9, applied to the discharging circuit according to claim 6, further comprising,
when the display device is detected to be started, outputting a fourth control signal to the third discharge sub-circuit; when the third discharge sub-circuit receives the fourth control signal, the third discharge sub-circuit provides the signal of the second power supply end to the first node;
when the display device is detected to be in a first state in the shutdown process, outputting a third control signal to the third discharging sub-circuit; and when the third discharging sub-circuit receives the third control signal, the second power supply end and the first node are turned off.
CN202110209388.6A 2021-02-24 2021-02-24 Discharge circuit, discharge method and display device Pending CN114974150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110209388.6A CN114974150A (en) 2021-02-24 2021-02-24 Discharge circuit, discharge method and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110209388.6A CN114974150A (en) 2021-02-24 2021-02-24 Discharge circuit, discharge method and display device

Publications (1)

Publication Number Publication Date
CN114974150A true CN114974150A (en) 2022-08-30

Family

ID=82974181

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110209388.6A Pending CN114974150A (en) 2021-02-24 2021-02-24 Discharge circuit, discharge method and display device

Country Status (1)

Country Link
CN (1) CN114974150A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115831031A (en) * 2023-02-07 2023-03-21 深圳市微源半导体股份有限公司 Level conversion circuit, display panel and display device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020056618A (en) * 2000-12-29 2002-07-10 구본준, 론 위라하디락사 Liquid Crystal Display Panel for In-Plane Switching
CN102522070A (en) * 2011-12-24 2012-06-27 西安启芯微电子有限公司 Control circuit for eliminating glittering and shutdown ghosting phenomena of thin film field effect transistor
CN103389590A (en) * 2013-08-06 2013-11-13 南京中电熊猫液晶显示科技有限公司 Liquid crystal display booting residual image improvement method and circuit thereof
CN108231030A (en) * 2018-01-29 2018-06-29 京东方科技集团股份有限公司 Discharge circuit, charging method and display device
CN108962170A (en) * 2018-07-26 2018-12-07 京东方科技集团股份有限公司 Shut down discharge circuit, display base plate and shutdown charging method
CN109147641A (en) * 2018-09-10 2019-01-04 合肥鑫晟光电科技有限公司 Power-off ghost shadow eliminates circuit, shift register cell and display device
CN109785788A (en) * 2019-03-29 2019-05-21 京东方科技集团股份有限公司 Level processing circuit, gate driving circuit and display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020056618A (en) * 2000-12-29 2002-07-10 구본준, 론 위라하디락사 Liquid Crystal Display Panel for In-Plane Switching
CN102522070A (en) * 2011-12-24 2012-06-27 西安启芯微电子有限公司 Control circuit for eliminating glittering and shutdown ghosting phenomena of thin film field effect transistor
CN103389590A (en) * 2013-08-06 2013-11-13 南京中电熊猫液晶显示科技有限公司 Liquid crystal display booting residual image improvement method and circuit thereof
CN108231030A (en) * 2018-01-29 2018-06-29 京东方科技集团股份有限公司 Discharge circuit, charging method and display device
CN108962170A (en) * 2018-07-26 2018-12-07 京东方科技集团股份有限公司 Shut down discharge circuit, display base plate and shutdown charging method
CN109147641A (en) * 2018-09-10 2019-01-04 合肥鑫晟光电科技有限公司 Power-off ghost shadow eliminates circuit, shift register cell and display device
CN109785788A (en) * 2019-03-29 2019-05-21 京东方科技集团股份有限公司 Level processing circuit, gate driving circuit and display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115831031A (en) * 2023-02-07 2023-03-21 深圳市微源半导体股份有限公司 Level conversion circuit, display panel and display device

Similar Documents

Publication Publication Date Title
CN108257570B (en) Control circuit for eliminating shutdown ghost, control method thereof and liquid crystal display device
US9767758B2 (en) Driving apparatus of display panel and driving method thereof, display device
KR101327491B1 (en) Power generation unit for liquid crystal display device
CN108231022B (en) Driving circuit and driving method of liquid crystal display device and liquid crystal display device
US10916214B2 (en) Electrical level processing circuit, gate driving circuit and display device
US8054263B2 (en) Liquid crystal display having discharging circuit
US8754838B2 (en) Discharge circuit and display device with the same
US20080084371A1 (en) Liquid crystal display for preventing residual image phenomenon and related method thereof
US8890801B2 (en) Electrophoresis display device and driving method
US11605360B2 (en) Circuit and method for preventing screen flickering, drive circuit for display panel, and display apparatus
CN109859703B (en) Display control device, display control method, and display apparatus
CN108962119B (en) Level shift circuit, driving method thereof and display device
TWI618045B (en) Pixel driving circuit
US20190213968A1 (en) Array substrate, method for driving the same, and display apparatus
CN107622759B (en) Pixel control circuit, control method thereof and display
CN114974150A (en) Discharge circuit, discharge method and display device
CN109637478B (en) Display device and driving method
US20080042952A1 (en) Power supply circuit of liquid crystal display for reducing residual image
CN114724525B (en) Display device, panel driving circuit thereof and charge discharging method
KR102507332B1 (en) Gate driver and display device having the same
CN211181608U (en) Power supply time sequence control circuit and display device
CN113436587A (en) Regulating circuit
US8373693B2 (en) Potential generation circuit and liquid crystal display device
KR20100034242A (en) Lcd driver
CN110890048B (en) Gamma voltage generation circuit and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination