CN107768142A - Thin film capacitor for lifting dielectric constant and preparation method thereof - Google Patents

Thin film capacitor for lifting dielectric constant and preparation method thereof Download PDF

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Publication number
CN107768142A
CN107768142A CN201610692995.1A CN201610692995A CN107768142A CN 107768142 A CN107768142 A CN 107768142A CN 201610692995 A CN201610692995 A CN 201610692995A CN 107768142 A CN107768142 A CN 107768142A
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insulating barrier
metal level
coated
processing module
module
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钱明谷
郑敦仁
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YUBANG ELECTRONIC (WUXI) CO Ltd
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YUBANG ELECTRONIC (WUXI) CO Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/33Thin- or thick-film capacitors 
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nanotechnology (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Composite Materials (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

The present invention discloses a kind of for lifting thin film capacitor of dielectric constant and preparation method thereof.The preparation method of thin film capacitor includes:First, a bearing substrate is placed on a machine table, wherein machine table has multiple machining areas along a plane formula production line sequential;Then, alternately multiple metal levels and multiple insulating barrier of the storehouse on bearing substrate are formed, to complete the making of a multilayer stack structure;Then, two end-electrode structures are formed, are tossed about end with being respectively coated by the two-phase of multilayer stack structure.The present invention passes through the processing of machine table so that multiple metal levels and multiple insulating barriers can alternately storehouse be on bearing substrate, whereby to complete the making of the multilayer stack structure of thin film capacitor.Each insulating barrier includes an insulation material layer and multiple Nanometer materials being mixed into insulation material layer, whereby to increase the dielectric constant of multilayer stack structure.

Description

Thin film capacitor for lifting dielectric constant and preparation method thereof
Technical field
The present invention relates to a kind of thin film capacitor and preparation method thereof, is used to lift dielectric constant more particularly to a kind of Thin film capacitor and preparation method thereof.
Background technology
Capacitor has been widely used for consumer electrical home appliances, computer motherboard and its periphery, power supply unit, led to The basic module of product and automobile etc. is interrogated, its main effect includes:Filtering, bypass, rectification, coupling, decoupling, phase inversion etc..It is One of indispensable component in electronic product.Capacitor has different kenels according to different material and purposes.Including aluminum Electrochemical capacitor, tantalum matter electrochemical capacitor, laminated ceramic electric capacity, thin-film capacitor etc..Thin film capacitor produced by prior art Overall structure is excessively complicated and needs to improve, and the dielectric constant that the thin film capacitor produced by prior art can be provided It is too low and need to improve.
The content of the invention
The technical problems to be solved by the invention are, provide in view of the shortcomings of the prior art a kind of normal for lifting dielectric Several thin film capacitor and preparation method thereof.
In order to solve above-mentioned technical problem, a wherein technical scheme of the present invention is to provide a kind of for carrying The preparation method for rising the thin film capacitor of dielectric constant, it includes:First, a bearing substrate is placed on a machine table, Wherein, the machine table has multiple machining areas along a plane formula production line sequential, and the machine table Include a metal level processing module and an insulating barrier processing module in each described machining area;Then, by positioned at the 1st The metal level processing module in the individual machining area, to be coated with one the 1st metal level on the bearing substrate;So Afterwards, by the insulating barrier processing module in the 1st machining area, to be coated with one the 1st insulating barrier in described The 1st metal level is covered on bearing substrate;Next, n times repeat step is sequentially performed, to complete a multilayer stack The making of structure;Finally, two end-electrode structures are formed, are tossed about end with being respectively coated by the two-phase of the multilayer stack structure Portion.For further, repeated described in n times the order of step for the 1st, 2,3 ..., n times, and each described repeat step bag Include:First, by the metal level processing module in the N+1 machining areas, to be coated with the N+1 metal Layer is in covering the n-th metal level on insulating barrier described in n-th;Then, by the N+1 machining areas The insulating barrier processing module, be coated with the N+1 insulating barrier in described in n-th on insulating barrier and covering the N+1 institute State metal level.Wherein, each described insulating barrier includes an insulation material layer and multiple is mixed into the insulation material layer Nanometer material, to increase the dielectric constant of the multilayer stack structure.
Further, each described metal level processing module includes metal level coating module and one first baking Module, and each described insulating barrier processing module includes insulating barrier coating module and one second baking module.
Further, by the metal level processing module in the 1st machining area, to be coated with 1 metal level still further comprises in the step on the bearing substrate:First, by positioned at the 1st processing Metal level coating module in region, to be coated with the 1st metal level on the bearing substrate;Then, position is passed through First baking module in the 1st machining area, to toast the 1st metal level.
Further, by the insulating barrier processing module in the 1st machining area, to be coated with 1 insulating barrier still further comprises in the step of covering the 1st metal level on the bearing substrate:First, Module is coated with by the insulating barrier in the 1st machining area, held with being coated with the 1st insulating barrier in described The 1st metal level is covered on carried base board;Then, second baking in the 1st machining area is passed through Module, to toast the 1st insulating barrier.
Further, by the metal level processing module in N+1 machining areas, with coating The N+1 metal levels also further wrap in the step of covering the n-th metal level on insulating barrier described in n-th Include:First, module is coated with by the metal level in the N+1 machining areas, to be coated with the N+1 gold Category layer is in covering the n-th metal level on insulating barrier described in n-th;Then, by positioned at the N+1 machining areas Interior first baking module, to toast the N+1 metal levels.
Further, by the insulating barrier processing module in N+1 machining areas, with coating The N+1 insulating barriers are also further in the step of covering the N+1 metal levels on insulating barrier described in n-th Including:First, module is coated with by the insulating barrier in the N+1 machining areas, it is described to be coated with N+1 Insulating barrier is in covering the N+1 metal level on insulating barrier described in n-th;Then, by positioned at the N+1 processing Second baking module in region, to toast the N+1 insulating barriers.
In order to solve above-mentioned technical problem, an other technical scheme of the present invention is to provide a kind of for carrying The preparation method for rising the thin film capacitor of dielectric constant, it includes:First, a bearing substrate is placed on a machine table, Wherein, the machine table has an at least machining area, includes edge at least one machining area of the machine table A metal level processing module and an insulating barrier processing module for one plane formula production line sequential;Then, by least The metal level processing module of the machine table in one machining area, to form multiple metal levels, and by The insulating barrier processing module of the machine table at least one machining area, to form multiple insulating barriers, wherein Alternately storehouse is on the bearing substrate for multiple metal levels and multiple insulating barriers, to complete a multilayer stack The making of structure;Then, two end-electrode structures are formed, are tossed about end with being respectively coated by the two-phase of the multilayer stack structure Portion.Wherein, each described insulating barrier includes an insulation material layer and multiple nm materials being mixed into the insulation material layer Material, to increase the dielectric constant of the multilayer stack structure.
Further, the machine table includes one and is used to point-blank drive the bearing substrate by least described in one The transmission mechanism of machining area, and a room temperature environment is provided at least one machining area, wherein, the metal level processing mould Block includes metal level coating module and first baking for toasting the metal level for being used to form the metal level Module, and the insulating barrier processing module includes an insulating barrier coating module and one for being used to form the insulating barrier for drying The second baking module of the insulating barrier is baked, wherein, each described end-electrode structure includes one and is used to coat the multiple field First clad of the side end of stack architecture, one are used for the second clad for coating first clad and a use In the 3rd clad for coating second clad, wherein, the plane formula production line is a flat annular line.
In order to solve above-mentioned technical problem, yet another aspect in addition of the present invention is to provide one kind and is used for The thin film capacitor of dielectric constant is lifted, it includes:By the multilayer stack structure produced by a machine table and Two end-electrode structures.The multilayer stack structure includes a bearing substrate, multiple metal levels and multiple insulating barriers, and more The individual metal level and multiple insulating barriers alternately storehouse on the bearing substrate.Two end-electrode structures point The two-phase for not coating the multilayer stack structure is tossed about end.Wherein, each described insulating barrier includes an insulation material layer And multiple Nanometer materials being mixed into the insulation material layer, to increase the dielectric constant of the multilayer stack structure.Its In, the machine table has multiple machining areas along a plane formula production line sequential, and the machine table is every Include the metal level processing module and one for forming the corresponding metal level in one machining area to be used for Form the insulating barrier processing module of the corresponding insulating barrier.
Further, each described Nanometer material is nm graphene, carbon nanotube, nm metal wire and nm Any one either one kind among metallic particles is by nm graphene, carbon nanotube, nm metal wire and nm metal Any two or more mixed nanocomposites formed among particle, wherein, each described end-electrode structure includes One is used to coat the first clad of the side end of the multilayer stack structure, one for coating first clad The second clad and one be used to coat the 3rd clad of second clad, wherein, the multilayer stack structure And two end-electrode structures are all coated by a packing colloid, and described in two two in electrical contact of conductive pin difference End-electrode structure and exposed from the packing colloid and go out.
The beneficial effects of the present invention are the thin-film capacitor for being used to be lifted dielectric constant that technical solution of the present invention is provided Device and preparation method thereof, it can be by the way that " each described insulating barrier includes an insulation material layer and multiple is mixed into the insulation The technical characteristic of Nanometer material in material layer, to increase the dielectric constant of the multilayer stack structure " is described thin to be lifted The overall dielectric constant of membrane capacitance.
For the enabled feature and technology contents for being further understood that the present invention, refer to below in connection with the present invention specifically Bright and accompanying drawing, however the accompanying drawing provided be merely provided for refer to explanation, not be used for the present invention is any limitation as.
Brief description of the drawings
Fig. 1 is the flow that the present invention is used to lift a portion of the preparation method of the thin film capacitor of dielectric constant Figure.
Fig. 2 is the flow that the present invention is used to lift the another part of the preparation method of the thin film capacitor of dielectric constant Figure.
Fig. 3 is the functional block diagram of machine table of the present invention.
Fig. 4 is the schematic diagram of machine table of the present invention.
Fig. 5 is metal level processing module and insulating barrier processing module in the 1st machining area of machine table of the present invention Schematic diagram.
Fig. 6 is that machine table of the present invention is coated with the 1st insulating barrier on the 1st metal level in the 1st machining area Diagrammatic cross-section.
Fig. 7 is metal level processing module and insulating barrier processing module in the 2nd machining area of machine table of the present invention Schematic diagram.
Fig. 8 is that machine table of the present invention is coated with the 2nd insulating barrier on the 2nd metal level in the 2nd machining area Diagrammatic cross-section.
Fig. 9 is metal level processing module and insulating barrier processing module in the 3rd machining area of machine table of the present invention Schematic diagram.
Figure 10 is that machine table of the present invention is coated with the 3rd insulating barrier on the 3rd metal level in the 3rd machining area Diagrammatic cross-section.
Figure 11 is the diagrammatic cross-section that the present invention is used to lift the thin film capacitor of dielectric constant.
Figure 12 is that the cut-away section of the multilayer stack structure of thin film capacitor of the present invention for lifting dielectric constant shows It is intended to.
Figure 13 is that the present invention is applied to the first thin film capacitor encapsulation knot for lifting the thin film capacitor of dielectric constant The diagrammatic cross-section of structure.
Figure 14 is that the present invention is applied to second of thin film capacitor encapsulation knot for lifting the thin film capacitor of dielectric constant The diagrammatic cross-section of structure.
Embodiment
Be below illustrated by particular specific embodiment it is presently disclosed about " be used for lift the thin of dielectric constant The embodiment of membrane capacitance and preparation method thereof ", those skilled in the art can understand this by content disclosed in this specification The advantages of invention and effect.The present invention can be implemented or applied by other different specific embodiments, in this specification Every details may be based on different viewpoints and application, in the lower various modifications of progress without departing from the spirit and change.In addition, The accompanying drawing of the present invention is only simple schematically illustrate, not according to the description of actual size, is stated.Following embodiment will be entered One step describes the correlation technique content of the present invention, but disclosure of that and the technical scope for being not used to the limitation present invention in detail.
Refer to shown in Fig. 1 to Figure 12, the present invention provides a kind of making for being used to lift the thin film capacitor Z of dielectric constant Method, it includes:First, coordinate shown in Fig. 1 to Fig. 5, a bearing substrate 10 is placed on a machine table M, wherein processing Board M has multiple machining area R along a plane formula production line sequential, and machine table M each processing district Include an a metal level processing module X and insulating barrier processing module Y (S100) in the R of domain;Then, coordinate Fig. 1, Fig. 2, Fig. 3 with And shown in Fig. 5, by the metal level processing module X in the 1st machining area R (R1), to be coated with one the 1st metal level 11 In (S102) on bearing substrate 10;Then, coordinate shown in Fig. 1, Fig. 2, Fig. 3 and Fig. 5, by positioned at the 1st machining area R (R1) the insulating barrier processing module Y in, to be coated with one the 1st insulating barrier 12 in the 1st metal level of covering on bearing substrate 10 11(S104);Then, coordinate shown in Fig. 1 to Fig. 4 and Fig. 7 to Figure 11, n times repeat step is sequentially performed, to complete a multilayer The making of formula stack architecture 1, wherein n times repeat the order of step for the 1st, 2,3 ..., n times.It is worth noting that, above-mentioned steps In used coating (coating) spraying (spraying) can also be used or print (printing) to replace.
First, especially to illustrate that, for example, as shown in figure 4, multiple machining area R can give birth to along a plane formula Producing line sequential, that is to say, that this plane formula production line does not have too big high low head.In addition, this plane formula produces Line can be straight line or non-rectilinear production line or the production line for encompassing a circle.Furthermore machine table M includes one For point-blank drive bearing substrate 10 sequentially by multiple machining area R transmission mechanism T (such as using transmission belt coordinate it is more Individual roller bearing drives), and can provide a room temperature environment in each machining area R, that is to say, that in each machining area R A vacuum environment need not be additionally provided, as long as but providing about 25 DEG C of normal temperature working environment.
Furthermore, for example, coordinate shown in Fig. 3 and Fig. 5, each metal level processing module X includes one and is used to be formed The metal level coating modules A of metal level 11 and a first baking module B for toasting formed metal level 11, and often One insulating barrier processing module Y includes an insulating barrier coating module C and one for being used to be formed insulating barrier 12 and is used to toast institute's shape Into insulating barrier 12 the second baking module D.
For further, coordinate shown in Fig. 1 to Fig. 5, passing through the metal level in the 1st machining area R (R1) Processing module X, to be coated with the 1st metal level 11 in the step S102 on bearing substrate 10, still further comprise:First, lead to The metal level coating modules A crossed in the 1st machining area R (R1), to be coated with the 1st metal level 11 on bearing substrate 10 (S102a);Then, by the first baking module B in the 1st machining area R (R1), to toast the 1st metal level 11 (S102b), whereby to cause metal level 11 to be hardened.
From the above, coordinate shown in Fig. 1 to Fig. 5, processed by the insulating barrier in the 1st machining area R (R1) Module Y, to be coated with the 1st insulating barrier 12 in the step S104 on the 1st metal level 11, still further comprise:First, pass through Insulating barrier coating module C in the 1st machining area R (R1), to be coated with the 1st insulating barrier 12 on bearing substrate 10 Cover the 1st metal level 11 (S104a);Then, by the second baking module D in the 1st machining area R (R1), with The 1st insulating barrier 12 (S104b) is toasted, whereby to cause insulating barrier 12 to be hardened.
It is noted that coordinating shown in Fig. 5 and Fig. 6, each insulating barrier 12 belongs to composite layer, and each Individual insulating barrier 12 still further comprises an insulation material layer 120 and multiple Nanometer materials being mixed into insulation material layer 120 121, whereby to increase the dielectric constant of multilayer stack structure 1.For example, Nanometer material 121 can be nm graphene, how Rice carbon pipe, nm metal wire, nm metallic particles, ceramic material (such as oxide, nitride or carbide etc.) and Any one among high polymer material, or Nanometer material 121 can also be it is a kind of by nm graphene, carbon nanotube, Nm metal wire, nm metallic particles, ceramic material (such as oxide, nitride or carbide etc.) and macromolecule material Any two or more mixed nanocomposites formed among material.
For further, coordinate shown in Fig. 1 to Fig. 9, in sequentially n times repeat step is performed, each repeat step Including:First, by the metal level processing module X in the N+1 machining area R, to be coated with the N+1 metal level 11 In covering n-th metal level 11 (S106) on n-th insulating barrier 12;Then, by the N+1 machining area R Insulating barrier processing module Y, to be coated with the N+1 insulating barrier 12 in the N+1 metal level 11 of covering on n-th insulating barrier 12 (S108)。
For further, coordinate shown in Fig. 1 to Fig. 9, add by the metal level in the N+1 machining area R Work module X, to be coated with the N+1 metal level 11 in the step of covering n-th metal level 11 on n-th insulating barrier 12, also Further comprise:First, modules A is coated with by the metal level in the N+1 machining area R, to be coated with the N+1 metal Layer 11 on n-th insulating barrier 12 in covering n-th metal level 11 (S106a);Then, by positioned at the N+1 machining area R The first interior baking module B, to toast the N+1 metal level 11 (S106b), whereby to cause the N+1 metal level 11 hard Change.Furthermore by the insulating barrier processing module Y in the N+1 machining area R, be coated with the N+1 insulating barrier 12 in In the step of covering the N+1 metal level 11 on n-th insulating barrier 12, still further comprise:First, by positioned at N+1 Insulating barrier coating module C in individual machining area R, to be coated with the N+1 insulating barrier 12 in covering the on n-th insulating barrier 12 N+1 metal level 11 (S108a);Then, by the second baking module D in the N+1 machining area R, to toast N + 1 insulating barrier 12 (S108b), whereby to cause the N+1 insulating barrier 12 to be hardened.
For example, coordinate shown in Fig. 2, Fig. 4 and Fig. 7, (the 1st repeat step is namely performed) as N=1, it is first First, modules A is coated with by the metal level in the 2nd machining area R (R2), it is exhausted in the 1st to be coated with the 2nd metal level 11 The 1st metal level 11 is covered in edge layer 12;Then, by the first baking module B in the 2nd machining area R (R2), To toast the 2nd metal level 11;Then, module C is coated with by the insulating barrier in the 2nd machining area R (R2), with coating 2nd insulating barrier 12 is in the 2nd metal level 11 of covering on the 1st insulating barrier 12;Then, by positioned at the 2nd machining area R (R2) the second baking module D in, to toast the 2nd insulating barrier 12, whereby to cause the 2nd insulating barrier 12 to be hardened.
It is noted that coordinating shown in Fig. 7 and Fig. 8, each insulating barrier 12 belongs to composite layer, and each Individual insulating barrier 12 still further comprises an insulation material layer 120 and multiple Nanometer materials being mixed into insulation material layer 120 121, whereby to increase the dielectric constant of multilayer stack structure 1.For example, Nanometer material 121 can be nm graphene, how Rice carbon pipe, nm metal wire, nm metallic particles, ceramic material (such as oxide, nitride or carbide etc.) and Any one among high polymer material, or Nanometer material 121 can also be it is a kind of by nm graphene, carbon nanotube, Nm metal wire, nm metallic particles, ceramic material (such as oxide, nitride or carbide etc.) and macromolecule material Any two or more mixed nanocomposites formed among material.
For example, coordinate shown in Fig. 2, Fig. 4 and Fig. 9, (the 2nd repeat step is namely performed) as N=2, it is first First, modules A is coated with by the metal level in the 3rd machining area R (R3), it is exhausted in the 2nd to be coated with the 3rd metal level 11 The 2nd metal level 11 is covered in edge layer 12;Then, by the first baking module B in the 3rd machining area R (R3), To toast the 3rd metal level 11;Then, module C is coated with by the insulating barrier in the 3rd machining area R (R3), with coating 3rd insulating barrier 12 is in the 3rd metal level 11 of covering on the 2nd insulating barrier 12;Then, by positioned at the 3rd machining area R (R3) the second baking module D in, to toast the 3rd insulating barrier 12, whereby to cause the 3rd insulating barrier 12 to be hardened.
It is noted that coordinating shown in Fig. 9 and Figure 10, each insulating barrier 12 belongs to composite layer, and often One insulating barrier 12 still further comprises an insulation material layer 120 and multiple Nanometer materials being mixed into insulation material layer 120 121, whereby to increase the dielectric constant of multilayer stack structure 1.For example, Nanometer material 121 can be nm graphene, how Rice carbon pipe, nm metal wire, nm metallic particles, ceramic material (such as oxide, nitride or carbide etc.) and Any one among high polymer material, or Nanometer material 121 can also be it is a kind of by nm graphene, carbon nanotube, Nm metal wire, nm metallic particles, ceramic material (such as oxide, nitride or carbide etc.) and macromolecule material Any two or more mixed nanocomposites formed among material.
Furthermore coordinate shown in Fig. 1, Fig. 2 and Figure 11, after sequentially n times repeat step is performed, still further comprise: Two end-electrode structures 2 are formed, are tossed about end 20P (S110) with being respectively coated by the two-phase of multilayer stack structure 1, it is thin to complete Membrane capacitance Z making.For example, each end-electrode structure 2 includes a side for being used to coat multilayer stack structure 1 The second clad 22 and one that portion 20P the first clad 21, one is used to coat the first clad 21 is used to coat the second bag 3rd clad 23 of coating 22.In addition, the first clad 21, the second clad 22 and the 3rd clad 23 can be respectively Silver layer, nickel dam and tin layers, but the present invention is not illustrated with this and is limited.
In summary, coordinate shown in Fig. 1 to Figure 12, the present invention provides a kind of thin film capacitor for being used to lift dielectric constant Z preparation method, it includes:First, a bearing substrate 10 is placed on a machine table M, wherein machine table M has more Include a metal in the individual machining area R along a plane formula production line sequential, machine table M each machining area R A layer processing module X and insulating barrier processing module Y;Then, by machine table M multiple metal level processing module X, to divide Multiple metal levels 11 are not formed, and by machine table M multiple insulating barrier processing module Y, to form multiple insulating barriers respectively 12, alternately storehouse is on bearing substrate 10 for plurality of metal level 11 and multiple insulating barriers 12, to complete a multiple field heap The making of stack architecture 1;Then, two end-electrode structures 2 are formed, are tossed about end with being respectively coated by the two-phase of multilayer stack structure 1 Portion 20P.
Whereby, coordinate shown in Figure 11 and Figure 12, the present invention provides a kind of thin film capacitor for being used to lift dielectric constant Z, it includes:One multilayer stack structure 1 and two end-electrode structures 2.Multilayer stack structure 1 includes a bearing substrate 10th, multiple metal levels 11 and multiple insulating barriers 12, and alternately storehouse exists for multiple metal levels 11 and multiple insulating barriers 12 On bearing substrate 10.The end 20P in addition, the two-phase that two end-electrode structures 2 are respectively coated by multilayer stack structure 1 is tossed about.Separately Outside, each insulating barrier 12 belongs to composite layer, and each insulating barrier 12 still further comprises an insulation material layer 120 And multiple Nanometer materials 121 being mixed into insulation material layer 120, whereby to increase the dielectric constant of multilayer stack structure 1. For example, Nanometer material 121 can be nm graphene, carbon nanotube, nm metal wire, nm metallic particles, ceramic material Any one among (such as oxide, nitride or carbide etc.) and high polymer material, or Nanometer material 121 can also be a kind of by nm graphene, carbon nanotube, nm metal wire, nm metallic particles, ceramic material (such as oxygen Compound, nitride or carbide etc.) and high polymer material among any two or more mixed nms formed answer Condensation material.
It is worth noting that, in the other possible embodiments of the present invention, machine table M can be with least one processing Include processing along a metal level of a plane formula production line sequential in region R, machine table M an at least machining area R A module X and insulating barrier processing module Y, and plane formula production line can be a flat annular line.
What deserves to be explained is lifting for wherein one, coordinate shown in Figure 11 and Figure 13, thin film capacitor Z can first allow One packing colloid P (can be as made by insulating materials) is packaged, and then again leads two that are electrically connected at thin film capacitor Z Electric pin L extends to packing colloid P outside from thin film capacitor Z, is tied whereby with completing the encapsulation of one of which thin film capacitor The making of structure.In addition, lift it is other coordinate shown in Figure 11 and Figure 14 for one, thin film capacitor Z can first allow a packaging plastic Body P is packaged, and the thin film capacitor Z packaged by packed colloid P then is contained in into a metal shell H (such as aluminum hull) again It is interior, two conductive pin L for being electrically connected at thin film capacitor Z are finally extended to metal shell H's from thin film capacitor Z again Outside, whereby to complete the making of another thin film capacitor encapsulating structure.That is, multilayer stack structure 1 and two Individual end-electrode structure 2 can all be coated by a packing colloid P, and two conductive pin L can distinguish two termination electrodes in electrical contact Structure 2 and exposed from packing colloid P and go out.However, the thin film capacitor encapsulating structure of the present invention is not with above-mentioned institute's illustrated example It is limited.
In summary, the beneficial effects of the present invention are what technical solution of the present invention was provided is used to lift dielectric constant Thin film capacitor Z and preparation method thereof, it can be by the way that " insulating barrier 12 includes an insulation material layer 120 and multiple is mixed into absolutely The technical characteristic of Nanometer material 121 in edge material layer 120, to increase the dielectric constant of multilayer stack structure 1 ", with lifting Thin film capacitor Z overall dielectric constant, and then effectively lift thin film capacitor Z piece electrical performance, wherein electric property Including:Lift heat endurance, lifting capacitance (Capacitance, Cap), reduce equivalent series resistance (Equivalent Series Resistance, ESR), reduce fissipation factor (Dissipation Factor, DF), reduce leakage current (Leakage Current, LC) etc..
Further for, technical solution of the present invention provided be used for lifted dielectric constant thin film capacitor Z and its Preparation method, its can by " machine table M have multiple machining area R " along a plane formula production line sequential and " include an a metal level processing module X and insulating barrier processing module Y " skill in machine table M each machining area R Art feature so that multiple metal level 11 and multiple insulating barriers 12 can alternately storehouse be on bearing substrate 10, whereby with complete Into the making of thin film capacitor Z multilayer stack structure 1.
Content disclosed above is only the preferred possible embodiments of the present invention, and the right for not thereby limiting to the present invention will The protection domain asked, so every equivalence techniques change done with description of the invention and accompanying drawing content, is both contained in this In the scope of the claims of invention.

Claims (10)

1. a kind of preparation method for being used to lift the thin film capacitor of dielectric constant, it is characterised in that described to be used to lift dielectric The preparation method of the thin film capacitor of constant includes:
One bearing substrate is placed on a machine table, wherein, the machine table has multiple along a plane formula production line The machining area of sequential, and the machine table each described machining area in include a metal level processing module with An and insulating barrier processing module;
By the metal level processing module in the 1st machining area, to be coated with one the 1st metal level in described On bearing substrate;
By the insulating barrier processing module in the 1st machining area, to be coated with one the 1st insulating barrier in described The 1st metal level is covered on bearing substrate;
N times repeat step is sequentially performed, to complete the making of a multilayer stack structure, wherein, the suitable of step is repeated described in n times Sequence is the 1st, 2,3 ..., n times, and each described repeat step includes:
By the metal level processing module in N+1 machining areas, be coated with the N+1 metal level in The n-th metal level is covered described in n-th on insulating barrier;And
By the insulating barrier processing module in N+1 machining areas, be coated with the N+1 insulating barrier in The N+1 metal levels are covered described in n-th on insulating barrier;And
Two end-electrode structures are formed, are tossed about end with being respectively coated by the two-phase of the multilayer stack structure;
Wherein, each described insulating barrier includes an insulation material layer and multiple nm materials being mixed into the insulation material layer Material, to increase the dielectric constant of the multilayer stack structure.
2. the preparation method according to claim 1 for being used to lift the thin film capacitor of dielectric constant, it is characterised in that institute Stating machine table includes a transmission mechanism for being used to point-blank drive the bearing substrate sequentially to pass through multiple machining areas, And a room temperature environment is provided in each described machining area, wherein, each described metal level processing module includes a metal Layer coating module and one first baking module, and each described insulating barrier processing module include insulating barrier coating module with And one second baking module, wherein, each described end-electrode structure includes one and is used to coat the multilayer stack structure First clad of the side end, one be used for the second clad for coating first clad and one be used to coating it is described 3rd clad of the second clad.
3. the preparation method according to claim 2 for being used to lift the thin film capacitor of dielectric constant, it is characterised in that By the metal level processing module in the 1st machining area, held with being coated with the 1st metal level in described In step on carried base board, still further comprise:
Module is coated with by the metal level in the 1st machining area, to be coated with the 1st metal level in institute State on bearing substrate;And
By first baking module in the 1st machining area, to toast the 1st metal level.
4. the preparation method according to claim 2 for being used to lift the thin film capacitor of dielectric constant, it is characterised in that By the insulating barrier processing module in the 1st machining area, held with being coated with the 1st insulating barrier in described In the step of covering the 1st metal level on carried base board, still further comprise:
Module is coated with by the insulating barrier in the 1st machining area, to be coated with the 1st insulating barrier in institute State on bearing substrate and cover the 1st metal level;And
By second baking module in the 1st machining area, to toast the 1st insulating barrier.
5. the preparation method according to claim 2 for being used to lift the thin film capacitor of dielectric constant, it is characterised in that By the metal level processing module in N+1 machining areas, to be coated with the N+1 metal levels in the In the step of covering the n-th metal level on N number of insulating barrier, still further comprise:
Module is coated with by the metal level in the N+1 machining areas, to be coated with the N+1 metal levels In the n-th metal level is covered described in n-th on insulating barrier;And
By first baking module in the N+1 machining areas, to toast the N+1 metal levels.
6. the preparation method according to claim 2 for being used to lift the thin film capacitor of dielectric constant, it is characterised in that By the insulating barrier processing module in N+1 machining areas, to be coated with the N+1 insulating barriers in the In the step of covering the N+1 metal levels on N number of insulating barrier, still further comprise:
Module is coated with by the insulating barrier in the N+1 machining areas, to be coated with the N+1 insulating barriers In the N+1 metal level is covered described in n-th on insulating barrier;And
By second baking module in the N+1 machining areas, to toast the N+1 insulating barriers.
7. a kind of preparation method for being used to lift the thin film capacitor of dielectric constant, it is characterised in that described to be used to lift dielectric The preparation method of the thin film capacitor of constant includes:
One bearing substrate is placed on a machine table, wherein, the machine table has an at least machining area, described to add Include at least one machining area of work board along a metal level processing module of a plane formula production line sequential with An and insulating barrier processing module;
By the metal level processing module of the machine table at least one machining area, to form multiple gold Belong to layer, and by the insulating barrier processing module of the machine table at least one machining area, it is more to be formed Alternately storehouse is on the bearing substrate for individual insulating barrier, the plurality of metal level and multiple insulating barriers, with complete Into the making of a multilayer stack structure;And
Two end-electrode structures are formed, are tossed about end with being respectively coated by the two-phase of the multilayer stack structure;
Wherein, each described insulating barrier includes an insulation material layer and multiple nm materials being mixed into the insulation material layer Material, to increase the dielectric constant of the multilayer stack structure.
8. the preparation method according to claim 7 for being used to lift the thin film capacitor of dielectric constant, it is characterised in that institute Stating machine table includes a transmission mechanism for being used to point-blank drive the bearing substrate to pass through at least one machining area, and One room temperature environment is provided at least one machining area, wherein, it is described for being formed that the metal level processing module includes one The metal level coating module of metal level and first baking module for toasting the metal level, and the insulating barrier is processed Module includes insulating barrier coating module and second baking for toasting the insulating barrier for being used to form the insulating barrier Grilled mold block, wherein, each described end-electrode structure includes a side end for being used to coat the multilayer stack structure The first clad, one be used for coat first clad the second clad and one be used for coat second clad The 3rd clad, wherein, the plane formula production line is a flat annular line.
A kind of 9. thin film capacitor for being used to lift dielectric constant, it is characterised in that the film for being used to lift dielectric constant Capacitor includes:
Pass through the multilayer stack structure produced by a machine table;And
Two end-electrode structures, the two-phase that two end-electrode structures are respectively coated by the multilayer stack structure are tossed about end Portion;
Wherein, the multilayer stack structure includes a bearing substrate, multiple metal levels and multiple insulating barriers, and multiple described Metal level and multiple insulating barriers alternately storehouse on the bearing substrate;
Wherein, each described insulating barrier includes an insulation material layer and multiple nm materials being mixed into the insulation material layer Material, to increase the dielectric constant of the multilayer stack structure;
Wherein, the machine table has multiple machining areas along a plane formula production line sequential, and the processing machine Include in each of platform machining area a metal level processing module for being used to forming the corresponding metal level and The one insulating barrier processing module for forming the corresponding insulating barrier.
10. the thin film capacitor according to claim 9 for being used to lift dielectric constant, it is characterised in that described in each Nanometer material be nm graphene, carbon nanotube, nm metal wire and nm metallic particles among any one either It is a kind of by any two or more mixed among nm graphene, carbon nanotube, nm metal wire and nm metallic particles The nanocomposite formed, wherein, each described end-electrode structure includes one and is used to coat the multilayer stack structure The side end the first clad, one be used for coat first clad the second clad and one be used for coat institute The 3rd clad of the second clad is stated, wherein, the multilayer stack structure and two end-electrode structures are all by one Packing colloid is coated, and two conductive pins distinguish two end-electrode structures in electrical contact and naked from the packing colloid Reveal.
CN201610692995.1A 2016-08-19 2016-08-19 Thin film capacitor for lifting dielectric constant and preparation method thereof Pending CN107768142A (en)

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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09232174A (en) * 1996-02-23 1997-09-05 Murata Mfg Co Ltd Laminated type ceramic electronic component and its manufacture
CN1448966A (en) * 2002-03-29 2003-10-15 Uht株式会社 Manufacturing installation for multi-layered electronic parts
CN1540692A (en) * 2003-04-08 2004-10-27 阿维科斯公司 Plated terminal
CN1716473A (en) * 2004-06-29 2006-01-04 王蕾雅 Method for producing multilayer ceramic capacitor using vacuum sputtering method
CN1838350A (en) * 2005-03-24 2006-09-27 三星电机株式会社 Multi-layer ceramic capacitor and production method thereof
CN1967751A (en) * 2005-11-14 2007-05-23 通用电气公司 Film capacitors with improved dielectric properties
CN101285548A (en) * 2008-05-22 2008-10-15 上海交通大学 High vacuum multiple layer heat insulation quilt manufacture method
CN101543811A (en) * 2008-03-26 2009-09-30 黄志宏 Method, equipment and system for glue spreading of base plate
CN101714453A (en) * 2008-09-30 2010-05-26 通用电气公司 Film capacitor
CN202258814U (en) * 2011-09-16 2012-05-30 扬州日精电子有限公司 Film capacitor
US20120168207A1 (en) * 2011-01-05 2012-07-05 Samhwa Capacitor Co., Ltd. Flexible multilayer type thin film capacitor and embedded printed circuit board using the same
US8997321B2 (en) * 2009-03-26 2015-04-07 Tdk Corporation Method of manufacturing a thin film capacitor having separated dielectric films
CN104903982A (en) * 2012-11-21 2015-09-09 3M创新有限公司 Multilayer film including first and second dielectric layers

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09232174A (en) * 1996-02-23 1997-09-05 Murata Mfg Co Ltd Laminated type ceramic electronic component and its manufacture
CN1448966A (en) * 2002-03-29 2003-10-15 Uht株式会社 Manufacturing installation for multi-layered electronic parts
CN1540692A (en) * 2003-04-08 2004-10-27 阿维科斯公司 Plated terminal
CN1716473A (en) * 2004-06-29 2006-01-04 王蕾雅 Method for producing multilayer ceramic capacitor using vacuum sputtering method
CN1838350A (en) * 2005-03-24 2006-09-27 三星电机株式会社 Multi-layer ceramic capacitor and production method thereof
CN1967751A (en) * 2005-11-14 2007-05-23 通用电气公司 Film capacitors with improved dielectric properties
CN101543811A (en) * 2008-03-26 2009-09-30 黄志宏 Method, equipment and system for glue spreading of base plate
CN101285548A (en) * 2008-05-22 2008-10-15 上海交通大学 High vacuum multiple layer heat insulation quilt manufacture method
CN101714453A (en) * 2008-09-30 2010-05-26 通用电气公司 Film capacitor
US8997321B2 (en) * 2009-03-26 2015-04-07 Tdk Corporation Method of manufacturing a thin film capacitor having separated dielectric films
US20120168207A1 (en) * 2011-01-05 2012-07-05 Samhwa Capacitor Co., Ltd. Flexible multilayer type thin film capacitor and embedded printed circuit board using the same
CN202258814U (en) * 2011-09-16 2012-05-30 扬州日精电子有限公司 Film capacitor
CN104903982A (en) * 2012-11-21 2015-09-09 3M创新有限公司 Multilayer film including first and second dielectric layers

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Application publication date: 20180306